fdce57a042
Currently, Application Processors (non-boot CPUs) are started by MD code at SI_SUB_CPU, but they are kept waiting in a "pen" until SI_SUB_SMP at which point they are released to run kernel threads. SI_SUB_SMP is one of the last SYSINIT levels, so APs don't enter the scheduler and start running threads until fairly late in the boot. This change moves SI_SUB_SMP up to just before software interrupt threads are created allowing the APs to start executing kernel threads much sooner (before any devices are probed). This allows several initialization routines that need to perform initialization on all CPUs to now perform that initialization in one step rather than having to defer the AP initialization to a second SYSINIT run at SI_SUB_SMP. It also permits all CPUs to be available for handling interrupts before any devices are probed. This last feature fixes a problem on with interrupt vector exhaustion. Specifically, in the old model all device interrupts were routed onto the boot CPU during boot. Later after the APs were released at SI_SUB_SMP, interrupts were redistributed across all CPUs. However, several drivers for multiqueue hardware allocate N interrupts per CPU in the system. In a system with many CPUs, just a few drivers doing this could exhaust the available pool of interrupt vectors on the boot CPU as each driver was allocating N * mp_ncpu vectors on the boot CPU. Now, drivers will allocate interrupts on their desired CPUs during boot meaning that only N interrupts are allocated from the boot CPU instead of N * mp_ncpu. Some other bits of code can also be simplified as smp_started is now true much earlier and will now always be true for these bits of code. This removes the need to treat the single-CPU boot environment as a special case. As a transition aid, the new behavior is available under a new kernel option (EARLY_AP_STARTUP). This will allow the option to be turned off if need be during initial testing. I plan to enable this on x86 by default in a followup commit in the next few days and to have all platforms moved over before 11.0. Once the transition is complete, the option will be removed along with the !EARLY_AP_STARTUP code. These changes have only been tested on x86. Other platform maintainers are encouraged to port their architectures over as well. The main things to check for are any uses of smp_started in MD code that can be simplified and SI_SUB_SMP SYSINITs in MD code that can be removed in the EARLY_AP_STARTUP case (e.g. the interrupt shuffling). PR: kern/199321 Reviewed by: markj, gnn, kib Sponsored by: Netflix
434 lines
10 KiB
C
434 lines
10 KiB
C
/*
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* CDDL HEADER START
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*
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* The contents of this file are subject to the terms of the
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* Common Development and Distribution License, Version 1.0 only
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* (the "License"). You may not use this file except in compliance
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* with the License.
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*
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* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
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* or http://www.opensolaris.org/os/licensing.
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* See the License for the specific language governing permissions
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* and limitations under the License.
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*
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* When distributing Covered Code, include this CDDL HEADER in each
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* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
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* If applicable, add the following below this CDDL HEADER, with the
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* fields enclosed by brackets "[]" replaced with your own identifying
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* information: Portions Copyright [yyyy] [name of copyright owner]
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*
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* CDDL HEADER END
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*
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* $FreeBSD$
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*
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*/
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/*
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* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
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* Use is subject to license terms.
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*/
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/*
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* Copyright (c) 2011, Joyent, Inc. All rights reserved.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/types.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/kmem.h>
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#include <sys/smp.h>
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#include <sys/dtrace_impl.h>
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#include <sys/dtrace_bsd.h>
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#include <machine/clock.h>
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#include <machine/frame.h>
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#include <vm/pmap.h>
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extern void dtrace_getnanotime(struct timespec *tsp);
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int dtrace_invop(uintptr_t, struct trapframe *, uintptr_t);
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typedef struct dtrace_invop_hdlr {
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int (*dtih_func)(uintptr_t, struct trapframe *, uintptr_t);
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struct dtrace_invop_hdlr *dtih_next;
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} dtrace_invop_hdlr_t;
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dtrace_invop_hdlr_t *dtrace_invop_hdlr;
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int
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dtrace_invop(uintptr_t addr, struct trapframe *frame, uintptr_t eax)
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{
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dtrace_invop_hdlr_t *hdlr;
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int rval;
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for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next)
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if ((rval = hdlr->dtih_func(addr, frame, eax)) != 0)
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return (rval);
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return (0);
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}
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void
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dtrace_invop_add(int (*func)(uintptr_t, struct trapframe *, uintptr_t))
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{
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dtrace_invop_hdlr_t *hdlr;
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hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP);
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hdlr->dtih_func = func;
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hdlr->dtih_next = dtrace_invop_hdlr;
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dtrace_invop_hdlr = hdlr;
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}
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void
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dtrace_invop_remove(int (*func)(uintptr_t, struct trapframe *, uintptr_t))
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{
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dtrace_invop_hdlr_t *hdlr = dtrace_invop_hdlr, *prev = NULL;
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for (;;) {
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if (hdlr == NULL)
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panic("attempt to remove non-existent invop handler");
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if (hdlr->dtih_func == func)
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break;
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prev = hdlr;
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hdlr = hdlr->dtih_next;
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}
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if (prev == NULL) {
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ASSERT(dtrace_invop_hdlr == hdlr);
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dtrace_invop_hdlr = hdlr->dtih_next;
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} else {
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ASSERT(dtrace_invop_hdlr != hdlr);
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prev->dtih_next = hdlr->dtih_next;
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}
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kmem_free(hdlr, 0);
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}
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/*ARGSUSED*/
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void
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dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit))
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{
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(*func)(0, (uintptr_t) addr_PTmap);
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}
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void
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dtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg)
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{
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cpuset_t cpus;
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if (cpu == DTRACE_CPUALL)
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cpus = all_cpus;
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else
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CPU_SETOF(cpu, &cpus);
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smp_rendezvous_cpus(cpus, smp_no_rendevous_barrier, func,
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smp_no_rendevous_barrier, arg);
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}
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static void
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dtrace_sync_func(void)
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{
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}
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void
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dtrace_sync(void)
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{
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dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL);
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}
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#ifdef notyet
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void
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dtrace_safe_synchronous_signal(void)
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{
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kthread_t *t = curthread;
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struct regs *rp = lwptoregs(ttolwp(t));
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size_t isz = t->t_dtrace_npc - t->t_dtrace_pc;
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ASSERT(t->t_dtrace_on);
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/*
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* If we're not in the range of scratch addresses, we're not actually
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* tracing user instructions so turn off the flags. If the instruction
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* we copied out caused a synchonous trap, reset the pc back to its
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* original value and turn off the flags.
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*/
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if (rp->r_pc < t->t_dtrace_scrpc ||
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rp->r_pc > t->t_dtrace_astpc + isz) {
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t->t_dtrace_ft = 0;
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} else if (rp->r_pc == t->t_dtrace_scrpc ||
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rp->r_pc == t->t_dtrace_astpc) {
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rp->r_pc = t->t_dtrace_pc;
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t->t_dtrace_ft = 0;
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}
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}
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int
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dtrace_safe_defer_signal(void)
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{
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kthread_t *t = curthread;
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struct regs *rp = lwptoregs(ttolwp(t));
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size_t isz = t->t_dtrace_npc - t->t_dtrace_pc;
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ASSERT(t->t_dtrace_on);
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/*
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* If we're not in the range of scratch addresses, we're not actually
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* tracing user instructions so turn off the flags.
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*/
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if (rp->r_pc < t->t_dtrace_scrpc ||
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rp->r_pc > t->t_dtrace_astpc + isz) {
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t->t_dtrace_ft = 0;
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return (0);
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}
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/*
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* If we have executed the original instruction, but we have performed
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* neither the jmp back to t->t_dtrace_npc nor the clean up of any
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* registers used to emulate %rip-relative instructions in 64-bit mode,
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* we'll save ourselves some effort by doing that here and taking the
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* signal right away. We detect this condition by seeing if the program
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* counter is the range [scrpc + isz, astpc).
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*/
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if (rp->r_pc >= t->t_dtrace_scrpc + isz &&
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rp->r_pc < t->t_dtrace_astpc) {
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#ifdef __amd64
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/*
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* If there is a scratch register and we're on the
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* instruction immediately after the modified instruction,
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* restore the value of that scratch register.
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*/
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if (t->t_dtrace_reg != 0 &&
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rp->r_pc == t->t_dtrace_scrpc + isz) {
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switch (t->t_dtrace_reg) {
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case REG_RAX:
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rp->r_rax = t->t_dtrace_regv;
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break;
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case REG_RCX:
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rp->r_rcx = t->t_dtrace_regv;
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break;
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case REG_R8:
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rp->r_r8 = t->t_dtrace_regv;
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break;
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case REG_R9:
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rp->r_r9 = t->t_dtrace_regv;
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break;
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}
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}
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#endif
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rp->r_pc = t->t_dtrace_npc;
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t->t_dtrace_ft = 0;
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return (0);
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}
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/*
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* Otherwise, make sure we'll return to the kernel after executing
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* the copied out instruction and defer the signal.
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*/
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if (!t->t_dtrace_step) {
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ASSERT(rp->r_pc < t->t_dtrace_astpc);
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rp->r_pc += t->t_dtrace_astpc - t->t_dtrace_scrpc;
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t->t_dtrace_step = 1;
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}
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t->t_dtrace_ast = 1;
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return (1);
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}
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#endif
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static int64_t tgt_cpu_tsc;
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static int64_t hst_cpu_tsc;
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static int64_t tsc_skew[MAXCPU];
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static uint64_t nsec_scale;
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/* See below for the explanation of this macro. */
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#define SCALE_SHIFT 28
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static void
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dtrace_gethrtime_init_cpu(void *arg)
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{
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uintptr_t cpu = (uintptr_t) arg;
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if (cpu == curcpu)
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tgt_cpu_tsc = rdtsc();
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else
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hst_cpu_tsc = rdtsc();
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}
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#ifdef EARLY_AP_STARTUP
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static void
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dtrace_gethrtime_init(void *arg)
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{
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struct pcpu *pc;
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uint64_t tsc_f;
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cpuset_t map;
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int i;
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#else
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/*
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* Get the frequency and scale factor as early as possible so that they can be
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* used for boot-time tracing.
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*/
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static void
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dtrace_gethrtime_init_early(void *arg)
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{
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uint64_t tsc_f;
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#endif
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/*
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* Get TSC frequency known at this moment.
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* This should be constant if TSC is invariant.
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* Otherwise tick->time conversion will be inaccurate, but
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* will preserve monotonic property of TSC.
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*/
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tsc_f = atomic_load_acq_64(&tsc_freq);
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/*
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* The following line checks that nsec_scale calculated below
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* doesn't overflow 32-bit unsigned integer, so that it can multiply
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* another 32-bit integer without overflowing 64-bit.
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* Thus minimum supported TSC frequency is 62.5MHz.
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*/
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KASSERT(tsc_f > (NANOSEC >> (32 - SCALE_SHIFT)),
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("TSC frequency is too low"));
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/*
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* We scale up NANOSEC/tsc_f ratio to preserve as much precision
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* as possible.
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* 2^28 factor was chosen quite arbitrarily from practical
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* considerations:
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* - it supports TSC frequencies as low as 62.5MHz (see above);
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* - it provides quite good precision (e < 0.01%) up to THz
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* (terahertz) values;
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*/
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nsec_scale = ((uint64_t)NANOSEC << SCALE_SHIFT) / tsc_f;
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#ifndef EARLY_AP_STARTUP
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}
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SYSINIT(dtrace_gethrtime_init_early, SI_SUB_CPU, SI_ORDER_ANY,
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dtrace_gethrtime_init_early, NULL);
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static void
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dtrace_gethrtime_init(void *arg)
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{
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struct pcpu *pc;
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cpuset_t map;
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int i;
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#endif
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/* The current CPU is the reference one. */
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sched_pin();
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tsc_skew[curcpu] = 0;
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CPU_FOREACH(i) {
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if (i == curcpu)
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continue;
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pc = pcpu_find(i);
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CPU_SETOF(PCPU_GET(cpuid), &map);
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CPU_SET(pc->pc_cpuid, &map);
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smp_rendezvous_cpus(map, NULL,
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dtrace_gethrtime_init_cpu,
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smp_no_rendevous_barrier, (void *)(uintptr_t) i);
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tsc_skew[i] = tgt_cpu_tsc - hst_cpu_tsc;
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}
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sched_unpin();
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}
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#ifdef EARLY_AP_STARTUP
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SYSINIT(dtrace_gethrtime_init, SI_SUB_DTRACE, SI_ORDER_ANY,
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dtrace_gethrtime_init, NULL);
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#else
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SYSINIT(dtrace_gethrtime_init, SI_SUB_SMP, SI_ORDER_ANY, dtrace_gethrtime_init,
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NULL);
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#endif
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/*
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* DTrace needs a high resolution time function which can
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* be called from a probe context and guaranteed not to have
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* instrumented with probes itself.
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*
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* Returns nanoseconds since boot.
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*/
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uint64_t
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dtrace_gethrtime()
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{
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uint64_t tsc;
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uint32_t lo;
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uint32_t hi;
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/*
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* We split TSC value into lower and higher 32-bit halves and separately
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* scale them with nsec_scale, then we scale them down by 2^28
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* (see nsec_scale calculations) taking into account 32-bit shift of
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* the higher half and finally add.
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*/
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tsc = rdtsc() - tsc_skew[curcpu];
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lo = tsc;
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hi = tsc >> 32;
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return (((lo * nsec_scale) >> SCALE_SHIFT) +
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((hi * nsec_scale) << (32 - SCALE_SHIFT)));
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}
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uint64_t
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dtrace_gethrestime(void)
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{
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struct timespec current_time;
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dtrace_getnanotime(¤t_time);
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return (current_time.tv_sec * 1000000000ULL + current_time.tv_nsec);
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}
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/* Function to handle DTrace traps during probes. See amd64/amd64/trap.c. */
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int
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dtrace_trap(struct trapframe *frame, u_int type)
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{
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/*
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* A trap can occur while DTrace executes a probe. Before
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* executing the probe, DTrace blocks re-scheduling and sets
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* a flag in its per-cpu flags to indicate that it doesn't
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* want to fault. On returning from the probe, the no-fault
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* flag is cleared and finally re-scheduling is enabled.
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*
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* Check if DTrace has enabled 'no-fault' mode:
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*/
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if ((cpu_core[curcpu].cpuc_dtrace_flags & CPU_DTRACE_NOFAULT) != 0) {
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/*
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* There are only a couple of trap types that are expected.
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* All the rest will be handled in the usual way.
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*/
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switch (type) {
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/* General protection fault. */
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case T_PROTFLT:
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/* Flag an illegal operation. */
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cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_ILLOP;
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/*
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* Offset the instruction pointer to the instruction
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* following the one causing the fault.
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*/
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frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip);
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return (1);
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/* Page fault. */
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case T_PAGEFLT:
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/* Flag a bad address. */
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cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR;
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cpu_core[curcpu].cpuc_dtrace_illval = frame->tf_addr;
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/*
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* Offset the instruction pointer to the instruction
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* following the one causing the fault.
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*/
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frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip);
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return (1);
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default:
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/* Handle all other traps in the usual way. */
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break;
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}
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}
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/* Handle the trap in the usual way. */
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return (0);
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}
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