Kristof Provost b865714d95 riscv pmap: zero reserved pte bits in ppn ... The top 10 bits of a pte are reserved by specification[1] and are not part of the PPN. [1] 'Volume II: RISC-V Privileged Architectures V20190608-Priv-MSU-Ratified', '4.4.1 Addressing and Memory Protection', page 72: "The PTE format for Sv39 is shown in Figure 4.18. ... Bits 63–54 are reserved for future use and must be zeroed by software for forward compatibility." Submitted by: Nathaniel Filardo <nwf20@cl.cam.ac.uk> Reviewed by: kp, mhorne Differential Revision: https://reviews.freebsd.org/D25523		2020-07-01 19:15:43 +00:00
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conf	Retire the GENERICSF kernel config.	2020-04-27 21:51:22 +00:00
include	riscv pmap: zero reserved pte bits in ppn	2020-07-01 19:15:43 +00:00
riscv	riscv pmap: zero reserved pte bits in ppn	2020-07-01 19:15:43 +00:00
sifive	riscv/sifive: add FE310 Always-on driver	2020-04-02 00:33:15 +00:00