b9eabb421b
in that it provides an abstract (intermediate) representation for instructions. This significantly improves working with instructions such as emulation of instructions that are not implemented by the hardware (e.g. long branch) or enhancing implemented instructions (e.g. handling of misaligned memory accesses). Not to mention that it's much easier to print instructions. Functions are included that provide a textual representation for opcodes, completers and operands. The disassembler supports all ia64 instructions defined by revision 2.1 of the SDM (Oct 2002).
345 lines
9.1 KiB
C
345 lines
9.1 KiB
C
/*
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* Copyright (c) 2000-2003 Marcel Moolenaar
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <ia64/disasm/disasm_int.h>
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#include <ia64/disasm/disasm.h>
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/*
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* Mnemonics (keep in sync with enum asm_op).
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*/
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static const char *asm_mnemonics[] = {
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NULL,
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"add", "addl", "addp4", "adds", "alloc", "and", "andcm",
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"br", "break", "brl", "brp", "bsw",
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"chk", "clrrrb", "cmp", "cmp4", "cmp8xchg16", "cmpxchg1", "cmpxchg2",
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"cmpxchg4", "cmpxchg8", "cover", "czx1", "czx2",
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"dep",
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"epc", "extr",
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"famax", "famin", "fand", "fandcm", "fc", "fchkf", "fclass", "fclrf",
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"fcmp", "fcvt", "fetchadd4", "fetchadd8", "flushrs", "fma", "fmax",
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"fmerge", "fmin", "fmix", "fms", "fnma", "for", "fpack", "fpamax",
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"fpamin", "fpcmp", "fpcvt", "fpma", "fpmax", "fpmerge", "fpmin",
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"fpms", "fpnma", "fprcpa", "fprsqrta", "frcpa", "frsqrta", "fselect",
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"fsetc", "fswap", "fsxt", "fwb", "fxor",
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"getf",
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"invala", "itc", "itr",
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"ld1", "ld16", "ld2", "ld4", "ld8", "ldf", "ldf8", "ldfd", "ldfe",
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"ldfp8", "ldfpd", "ldfps", "ldfs", "lfetch", "loadrs",
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"mf", "mix1", "mix2", "mix4", "mov", "movl", "mux1", "mux2",
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"nop",
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"or",
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"pack2", "pack4", "padd1", "padd2", "padd4", "pavg1", "pavg2",
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"pavgsub1", "pavgsub2", "pcmp1", "pcmp2", "pcmp4", "pmax1", "pmax2",
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"pmin1", "pmin2", "pmpy2", "pmpyshr2", "popcnt", "probe", "psad1",
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"pshl2", "pshl4", "pshladd2", "pshr2", "pshr4", "pshradd2", "psub1",
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"psub2", "psub4", "ptc", "ptr",
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"rfi", "rsm", "rum",
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"setf", "shl", "shladd", "shladdp4", "shr", "shrp", "srlz", "ssm",
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"st1", "st16", "st2", "st4", "st8", "stf", "stf8", "stfd", "stfe",
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"stfs", "sub", "sum", "sxt1", "sxt2", "sxt4", "sync",
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"tak", "tbit", "thash", "tnat", "tpa", "ttag",
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"unpack1", "unpack2", "unpack4",
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"xchg1", "xchg2", "xchg4", "xchg8", "xma", "xor",
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"zxt1", "zxt2", "zxt4"
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};
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/*
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* Completers (keep in sync with enum asm_cmpltr_type).
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*/
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static const char *asm_completers[] = {
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"",
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".0", ".1",
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".a", ".acq", ".and",
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".b", ".bias",
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".c.clr", ".c.clr.acq", ".c.nc", ".call", ".cexit", ".cloop", ".clr",
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".ctop",
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".d", ".dc.dc", ".dc.nt", ".dpnt", ".dptk",
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".e", ".eq", ".excl", ".exit", ".exp",
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".f", ".fault", ".few", ".fill", ".fx", ".fxu",
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".g", ".ga", ".ge", ".gt",
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".h", ".hu",
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".i", ".ia", ".imp",
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".l", ".le", ".loop", ".lr", ".lt", ".ltu",
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".m", ".many",
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".nc", ".ne", ".neq", ".nl", ".nle", ".nlt", ".nm", ".nr", ".ns",
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".nt.dc", ".nt.nt", ".nt.tk", ".nt1", ".nt2", ".nta", ".nz",
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".or", ".or.andcm", ".ord",
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".pr",
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".r", ".raz", ".rel", ".ret", ".rw",
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".s", ".s0", ".s1", ".s2", ".s3", ".sa", ".se", ".sig", ".spill",
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".spnt", ".sptk", ".sss",
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".tk.dc", ".tk.nt", ".tk.tk", ".trunc",
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".u", ".unc", ".unord", ".uss", ".uus", ".uuu",
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".w", ".wexit", ".wtop",
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".x", ".xf",
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".z"
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};
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void
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asm_completer(const struct asm_cmpltr *c, char *buf)
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{
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strcpy(buf, asm_completers[c->c_type]);
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}
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void
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asm_mnemonic(enum asm_op op, char *buf)
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{
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strcpy(buf, asm_mnemonics[(op < ASM_OP_INTERNAL_OPCODES) ? op : 0]);
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}
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void
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asm_operand(const struct asm_oper *o, char *buf, uint64_t ip)
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{
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const char *n;
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n = NULL;
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switch (o->o_type) {
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case ASM_OPER_AREG:
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switch ((int)o->o_value) {
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case AR_K0: n = "k0"; break;
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case AR_K1: n = "k1"; break;
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case AR_K2: n = "k2"; break;
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case AR_K3: n = "k3"; break;
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case AR_K4: n = "k4"; break;
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case AR_K5: n = "k5"; break;
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case AR_K6: n = "k6"; break;
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case AR_K7: n = "k7"; break;
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case AR_RSC: n = "rsc"; break;
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case AR_BSP: n = "bsp"; break;
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case AR_BSPSTORE: n = "bspstore"; break;
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case AR_RNAT: n = "rnat"; break;
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case AR_FCR: n = "fcr"; break;
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case AR_EFLAG: n = "eflag"; break;
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case AR_CSD: n = "csd"; break;
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case AR_SSD: n = "ssd"; break;
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case AR_CFLG: n = "cflg"; break;
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case AR_FSR: n = "fsr"; break;
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case AR_FIR: n = "fir"; break;
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case AR_FDR: n = "fdr"; break;
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case AR_CCV: n = "ccv"; break;
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case AR_UNAT: n = "unat"; break;
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case AR_FPSR: n = "fpsr"; break;
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case AR_ITC: n = "itc"; break;
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case AR_PFS: n = "pfs"; break;
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case AR_LC: n = "lc"; break;
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case AR_EC: n = "ec"; break;
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default:
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sprintf(buf, "ar%d", (int)o->o_value);
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return;
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}
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sprintf(buf, "ar.%s", n);
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return;
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case ASM_OPER_BREG:
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if (o->o_value != 0)
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sprintf(buf, "b%d", (int)o->o_value);
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else
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strcpy(buf, "rp");
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return;
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case ASM_OPER_CPUID:
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n = "cpuid";
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break;
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case ASM_OPER_CREG:
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switch ((int)o->o_value) {
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case CR_DCR: n = "dcr"; break;
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case CR_ITM: n = "itm"; break;
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case CR_IVA: n = "iva"; break;
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case CR_PTA: n = "pta"; break;
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case CR_IPSR: n = "ipsr"; break;
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case CR_ISR: n = "isr"; break;
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case CR_IIP: n = "iip"; break;
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case CR_IFA: n = "ifa"; break;
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case CR_ITIR: n = "itir"; break;
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case CR_IIPA: n = "iipa"; break;
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case CR_IFS: n = "ifs"; break;
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case CR_IIM: n = "iim"; break;
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case CR_IHA: n = "iha"; break;
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case CR_LID: n = "lid"; break;
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case CR_IVR: n = "ivr"; break;
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case CR_TPR: n = "tpr"; break;
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case CR_EOI: n = "eoi"; break;
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case CR_IRR0: n = "irr0"; break;
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case CR_IRR1: n = "irr1"; break;
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case CR_IRR2: n = "irr2"; break;
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case CR_IRR3: n = "irr3"; break;
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case CR_ITV: n = "itv"; break;
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case CR_PMV: n = "pmv"; break;
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case CR_CMCV: n = "cmcv"; break;
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case CR_LRR0: n = "lrr0"; break;
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case CR_LRR1: n = "lrr1"; break;
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default:
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sprintf(buf, "cr%d", (int)o->o_value);
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return;
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}
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sprintf(buf, "cr.%s", n);
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return;
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case ASM_OPER_DBR:
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n = "dbr";
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break;
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case ASM_OPER_DISP:
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sprintf(buf, "%lx", ip + o->o_value);
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return;
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case ASM_OPER_DTR:
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n = "dtr";
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break;
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case ASM_OPER_FREG:
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sprintf(buf, "f%d", (int)o->o_value);
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return;
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case ASM_OPER_GREG:
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break;
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case ASM_OPER_IBR:
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n = "ibr";
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break;
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case ASM_OPER_IMM:
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sprintf(buf, "0x%lx", o->o_value);
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return;
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case ASM_OPER_IP:
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strcpy(buf, "ip");
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return;
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case ASM_OPER_ITR:
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n = "itr";
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break;
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case ASM_OPER_MEM:
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n = "";
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break;
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case ASM_OPER_MSR:
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n = "msr";
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break;
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case ASM_OPER_PKR:
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n = "pkr";
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break;
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case ASM_OPER_PMC:
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n = "pmc";
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break;
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case ASM_OPER_PMD:
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n = "pmd";
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break;
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case ASM_OPER_PR:
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strcpy(buf, "pr");
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return;
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case ASM_OPER_PR_ROT:
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strcpy(buf, "pr.rot");
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return;
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case ASM_OPER_PREG:
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sprintf(buf, "p%d", (int)o->o_value);
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return;
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case ASM_OPER_PSR:
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strcpy(buf, "psr");
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return;
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case ASM_OPER_PSR_L:
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strcpy(buf, "psr.l");
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return;
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case ASM_OPER_PSR_UM:
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strcpy(buf, "psr.um");
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return;
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case ASM_OPER_RR:
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n = "rr";
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break;
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case ASM_OPER_NONE:
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KASSERT(0, ("foo"));
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break;
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}
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if (n != NULL)
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buf += sprintf(buf, "%s[", n);
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switch ((int)o->o_value) {
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case 1: strcpy(buf, "gp"); buf += 2; break;
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case 12: strcpy(buf, "sp"); buf += 2; break;
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case 13: strcpy(buf, "tp"); buf += 2; break;
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default: buf += sprintf(buf, "r%d", (int)o->o_value); break;
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}
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if (n != NULL)
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strcpy(buf, "]");
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}
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void
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asm_print_bundle(const struct asm_bundle *b, uint64_t ip)
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{
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asm_print_inst(b, 0, ip);
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asm_print_inst(b, 1, ip);
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asm_print_inst(b, 2, ip);
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}
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void
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asm_print_inst(const struct asm_bundle *b, int slot, uint64_t ip)
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{
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char buf[32];
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const struct asm_inst *i;
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const char *tmpl;
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int n, w;
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tmpl = b->b_templ + slot;
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if (*tmpl == ';' || (slot == 2 && b->b_templ[1] == ';'))
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tmpl++;
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i = b->b_inst + slot;
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if (*tmpl == 'L' || i->i_op == ASM_OP_NONE)
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return;
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/* Address + slot. */
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printf("%lx[%c] ", ip + slot, *tmpl);
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/* Predicate. */
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if (i->i_oper[0].o_value != 0) {
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asm_operand(i->i_oper+0, buf, ip);
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w = printf("(%s)", buf);
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} else
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w = 0;
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while (w++ < 8)
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printf(" ");
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/* Mnemonic & completers. */
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asm_mnemonic(i->i_op, buf);
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w = printf(buf);
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n = 0;
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while (n < i->i_ncmpltrs) {
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asm_completer(i->i_cmpltr + n, buf);
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w += printf(buf);
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n++;
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}
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while (w++ < 15)
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printf(" ");
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printf(" ");
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/* Operands. */
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n = 1;
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while (n < 7 && i->i_oper[n].o_type != ASM_OPER_NONE) {
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if (n > 1) {
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if (n == i->i_srcidx)
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printf(" = ");
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else
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printf(", ");
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}
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asm_operand(i->i_oper + n, buf, ip);
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printf(buf);
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n++;
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}
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printf("\n");
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}
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