freebsd-dev/sys/arm64
Andrew Turner ad020198ff Stop performing a full icache sync when the DIC and IDC flags are set
The DIC and IDC bits in the CTR_EL0 register signal to the kernel when it
can relax the instruction cache synchronisation operations. The IDC bit
means we can relax cleaning the data cache to the point of unification
while the DIC bit means we don't need to invalidate the instruction cache
for data coherence. In both cases an appropriate barrier is still needed.

For now only implement the case where both bits are set, as is the case
on the Neoverse-N1 as used in the Amazon AWS Graviton 2 CPU. Note that
this behaviour is a optional on the N1 so we may later need to implement
only one or the other bit being set.

There is a tunable to disable each flag on boot.

Testing on a 4 core Graviton 2 instance found a significant improvement
in sys and real time when running "make buildkernel -j4", with no
significant difference in user time.

Reviewed by:	markj
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D24853
2020-05-19 16:04:27 +00:00
..
acpica Ignore the SMMUv3 and PMCG interrupt controller in the IORT tables 2020-01-31 09:51:38 +00:00
arm64 Stop performing a full icache sync when the DIC and IDC flags are set 2020-05-19 16:04:27 +00:00
broadcom Add genet driver for Raspberry Pi 4B Ethernet 2020-04-22 00:42:10 +00:00
cavium Rename the ThunderX CPU identification macros to include the X. This is the 2018-06-13 12:17:11 +00:00
cloudabi32 Use uintptr_t instead of register_t * for the stack base. 2019-12-03 23:17:54 +00:00
cloudabi64 Use uintptr_t instead of register_t * for the stack base. 2019-12-03 23:17:54 +00:00
conf Add genet driver for Raspberry Pi 4B Ethernet 2020-04-22 00:42:10 +00:00
coresight Extract eventfilter declarations to sys/_eventfilter.h 2019-05-20 00:38:23 +00:00
include Stop performing a full icache sync when the DIC and IDC flags are set 2020-05-19 16:04:27 +00:00
intel Add support for Intel Stratix 10 platform. 2019-09-13 16:50:57 +00:00
linux Convert canary, execpathp, and pagesizes to pointers. 2020-04-16 21:53:17 +00:00
qualcomm Enable Qualcomm Debug Subsystem (QDSS) block on MSM8916 SoC. 2018-04-10 12:53:48 +00:00
rockchip Don't try to re-initialize already preseted regulator. 2020-04-29 13:45:21 +00:00