4edef187b8
I/O windows, the default is to preserve the firmware-assigned resources. PCI bus numbers are only managed if NEW_PCIB is enabled and the architecture defines a PCI_RES_BUS resource type. - Add a helper API to create top-level PCI bus resource managers for each PCI domain/segment. Host-PCI bridge drivers use this API to allocate bus numbers from their associated domain. - Change the PCI bus and CardBus drivers to allocate a bus resource for their bus number from the parent PCI bridge device. - Change the PCI-PCI and PCI-CardBus bridge drivers to allocate the full range of bus numbers from secbus to subbus from their parent bridge. The drivers also always program their primary bus register. The bridge drivers also support growing their bus range by extending the bus resource and updating subbus to match the larger range. - Add support for managing PCI bus resources to the Host-PCI bridge drivers used for amd64 and i386 (acpi_pcib, mptable_pcib, legacy_pcib, and qpi_pcib). - Define a PCI_RES_BUS resource type for amd64 and i386. Reviewed by: imp MFC after: 1 month
71 lines
2.9 KiB
C
71 lines
2.9 KiB
C
/*-
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* Copyright (c) 2000 Peter Wemm <peter@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _X86_LEGACYVAR_H_
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#define _X86_LEGACYVAR_H_
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enum legacy_device_ivars {
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LEGACY_IVAR_PCIDOMAIN,
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LEGACY_IVAR_PCIBUS,
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LEGACY_IVAR_PCISLOT,
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LEGACY_IVAR_PCIFUNC
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};
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#define LEGACY_ACCESSOR(var, ivar, type) \
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__BUS_ACCESSOR(legacy, var, LEGACY, ivar, type)
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LEGACY_ACCESSOR(pcidomain, PCIDOMAIN, uint32_t)
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LEGACY_ACCESSOR(pcibus, PCIBUS, uint32_t)
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LEGACY_ACCESSOR(pcislot, PCISLOT, int)
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LEGACY_ACCESSOR(pcifunc, PCIFUNC, int)
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#undef LEGACY_ACCESSOR
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int legacy_pcib_maxslots(device_t dev);
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uint32_t legacy_pcib_read_config(device_t dev, u_int bus, u_int slot,
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u_int func, u_int reg, int bytes);
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int legacy_pcib_read_ivar(device_t dev, device_t child, int which,
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uintptr_t *result);
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void legacy_pcib_write_config(device_t dev, u_int bus, u_int slot,
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u_int func, u_int reg, uint32_t data, int bytes);
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int legacy_pcib_write_ivar(device_t dev, device_t child, int which,
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uintptr_t value);
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struct resource *legacy_pcib_alloc_resource(device_t dev, device_t child,
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int type, int *rid, u_long start, u_long end, u_long count, u_int flags);
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int legacy_pcib_adjust_resource(device_t dev, device_t child, int type,
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struct resource *r, u_long start, u_long end);
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int legacy_pcib_release_resource(device_t dev, device_t child, int type,
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int rid, struct resource *r);
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int legacy_pcib_alloc_msi(device_t pcib, device_t dev, int count,
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int maxcount, int *irqs);
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int legacy_pcib_alloc_msix(device_t pcib, device_t dev, int *irq);
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int legacy_pcib_map_msi(device_t pcib, device_t dev, int irq,
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uint64_t *addr, uint32_t *data);
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#endif /* !_X86_LEGACYVAR_H_ */
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