0f0819525b
consist of a ARM926EJ-S processor core with up to 512 Kbytes of on-chip flash. Tested with SAM9XE512.
227 lines
5.8 KiB
C
227 lines
5.8 KiB
C
/*-
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* Copyright (c) 2010 Greg Ansley. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* The SAM9 watchdog hardware can be programed only once. So we set the
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* hardware watchdog to 16 s in wdt_attach and only reset it in the wdt_tick
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* handler. The watchdog is halted in processor debug mode.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kdb.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/systm.h>
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#include <sys/watchdog.h>
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#include <machine/bus.h>
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#include <arm/at91/at91var.h>
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#include <arm/at91/at91_wdtreg.h>
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struct wdt_softc {
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struct mtx sc_mtx;
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device_t sc_dev;
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struct resource *mem_res;
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struct callout tick_ch;
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eventhandler_tag sc_wet;
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void *intrhand;
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u_int cmd;
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u_int interval;
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};
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static inline uint32_t
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RD4(struct wdt_softc *sc, bus_size_t off)
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{
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return (bus_read_4(sc->mem_res, off));
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}
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static inline void
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WR4(struct wdt_softc *sc, bus_size_t off, uint32_t val)
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{
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bus_write_4(sc->mem_res, off, val);
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}
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static int
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wdt_intr(void *argp)
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{
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struct wdt_softc *sc = argp;
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if (RD4(sc, WDT_SR) & (WDT_WDUNF | WDT_WDERR)) {
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#if defined(KDB) && !defined(KDB_UNATTENDED)
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kdb_backtrace();
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kdb_enter(KDB_WHY_WATCHDOG, "watchdog timeout");
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#else
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panic("watchdog timeout");
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#endif
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}
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return (FILTER_STRAY);
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}
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/* User interface, see watchdog(9) */
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static void
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wdt_watchdog(void *argp, u_int cmd, int *error)
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{
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struct wdt_softc *sc = argp;
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u_int interval;
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mtx_lock(&sc->sc_mtx);
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*error = 0;
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sc->cmd = 0;
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interval = cmd & WD_INTERVAL;
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if (interval > WD_TO_16SEC)
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*error = EOPNOTSUPP;
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else if (interval > 0)
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sc->cmd = interval | WD_ACTIVE;
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/* We cannot turn off our watchdog so if user
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* fails to turn us on go to passive mode. */
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if ((sc->cmd & WD_ACTIVE) == 0)
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sc->cmd = WD_PASSIVE;
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mtx_unlock(&sc->sc_mtx);
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}
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/* This routine is called no matter what state the user sets the
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* watchdog mode to. Called at a rate that is slightly less than
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* half the hardware timeout. */
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static void
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wdt_tick(void *argp)
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{
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struct wdt_softc *sc = argp;
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mtx_assert(&sc->sc_mtx, MA_OWNED);
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if (sc->cmd & (WD_ACTIVE | WD_PASSIVE))
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WR4(sc, WDT_CR, WDT_KEY|WDT_WDRSTT);
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sc->cmd &= WD_PASSIVE;
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callout_reset(&sc->tick_ch, sc->interval, wdt_tick, sc);
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}
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static int
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wdt_probe(device_t dev)
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{
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if (at91_is_sam9() || at91_is_sam9xe()) {
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device_set_desc(dev, "WDT");
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return (0);
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}
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return (ENXIO);
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}
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static int
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wdt_attach(device_t dev)
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{
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static struct wdt_softc *sc;
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struct resource *irq;
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uint32_t wdt_mr;
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int rid, err;
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sc = device_get_softc(dev);
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sc->cmd = WD_PASSIVE;
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sc->sc_dev = dev;
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mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "at91_wdt", MTX_DEF);
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callout_init_mtx(&sc->tick_ch, &sc->sc_mtx, 0);
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rid = 0;
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sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->mem_res == NULL)
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panic("couldn't allocate wdt register resources");
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wdt_mr = RD4(sc, WDT_MR);
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if ((wdt_mr & WDT_WDRSTEN) == 0)
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device_printf(dev, "Watchdog disabled! (Boot ROM?)\n");
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else {
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#ifdef WDT_RESET
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/* Rude, full reset of whole system on watch dog timeout */
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WR4(sc, WDT_MR, WDT_WDDBGHLT | WDT_WDD(0xC00)|
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WDT_WDRSTEN| WDT_WDV(0xFFF));
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#else
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/* Generate stack trace and panic on watchdog timeout*/
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WR4(sc, WDT_MR, WDT_WDDBGHLT | WDT_WDD(0xC00)|
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WDT_WDFIEN| WDT_WDV(0xFFF));
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#endif
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/*
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* This may have been set by Boot ROM so register value may
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* not be what we just requested since this is a write once
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* register.
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*/
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wdt_mr = RD4(sc, WDT_MR);
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if (wdt_mr & WDT_WDFIEN) {
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rid = 0;
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irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE | RF_SHAREABLE);
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if (!irq)
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panic("could not allocate interrupt.\n");
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err = bus_setup_intr(dev, irq, INTR_TYPE_CLK, wdt_intr,
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NULL, sc, &sc->intrhand);
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}
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/* interval * hz */
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sc->interval = (((wdt_mr & WDT_WDV(~0)) + 1) * WDT_DIV) /
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(WDT_CLOCK/hz);
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device_printf(dev, "watchdog timeout: %d seconds\n",
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sc->interval / hz);
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/* Slightly less than 1/2 of watchdog hardware timeout */
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sc->interval = (sc->interval/2) - (sc->interval/20);
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callout_reset(&sc->tick_ch, sc->interval, wdt_tick, sc);
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/* Register us as a watchdog */
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sc->sc_wet = EVENTHANDLER_REGISTER(watchdog_list,
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wdt_watchdog, sc, 0);
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}
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return (0);
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}
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static device_method_t wdt_methods[] = {
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DEVMETHOD(device_probe, wdt_probe),
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DEVMETHOD(device_attach, wdt_attach),
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DEVMETHOD_END
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};
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static driver_t wdt_driver = {
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"at91_wdt",
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wdt_methods,
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sizeof(struct wdt_softc),
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};
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static devclass_t wdt_devclass;
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DRIVER_MODULE(at91_wdt, atmelarm, wdt_driver, wdt_devclass, NULL, NULL);
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