Nathan Whitehorn 0b8a792e0b Make devices with registers into the KVA region work reliably. Without this, ... previous KVA allocations (which the PMAP lazily invalidates) in TLB0 could shadow device maps in TLB1. Add a big block comment about some of the caveats with this approach.		2013-10-26 20:57:26 +00:00
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copyinout.c	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
interrupt.c	Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)	2011-06-23 22:21:28 +00:00
locore.S	Bump initial TLB size. The kernel is not necessarily less than 16 MB any	2013-10-26 19:49:09 +00:00
machdep_e500.c	Interrelated improvements to early boot mappings:	2013-10-26 18:18:14 +00:00
machdep_ppc4xx.c	Extract vendor specific Book-E pieces into separate files and have a common	2012-05-30 17:34:40 +00:00
machdep.c	Handle (in a slightly ugly way) ePAPR-type loaders that just place a	2013-10-26 19:50:40 +00:00
mp_cpudep.c	Add SMP support on U3-based G5 systems. This does not yet work perfectly:	2009-10-23 03:17:02 +00:00
platform_bare.c	A quick addendum: the standard says that timebase-frequency can be either	2013-10-23 14:34:04 +00:00
pmap.c	Make devices with registers into the KVA region work reliably. Without this,	2013-10-26 20:57:26 +00:00
swtch.S	MFppc64:	2010-07-13 05:32:19 +00:00
trap_subr.S	Fix a typo that resulted in or-ing PTE_UW twice whrn PTE_SW was needed.	2012-07-02 21:21:12 +00:00
trap.c	userret() already checks for td_locks when INVARIANTS is enabled, so	2012-09-08 18:27:11 +00:00