dc4ee6ca91
make use of it where possible. This primarily brings in support for newer hardware, and FreeBSD is not yet able to support the abundance of IRQs on new hardware and many features in the Ethernet driver. Because of the changes to IRQs in the Simple Executive, we have to maintain our own list of Octeon IRQs now, which probably can be pared-down and be specific to the CIU interrupt unit soon, and when other interrupt mechanisms are added they can maintain their own definitions. Remove unmasking of interrupts from within the UART device now that the function used is no longer present in the Simple Executive. The unmasking seems to have been gratuitous as this is more properly handled by the buses above the UART device, and seems to work on that basis.
170 lines
4.6 KiB
C
170 lines
4.6 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* interface to the serial port UART hardware
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*
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* <hr>$Revision: 70030 $<hr>
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*
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*/
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#ifndef __CVMX_UART_H__
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#define __CVMX_UART_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define CVMX_UART_NUM_PORTS 2
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#define CVMX_UART_TX_FIFO_SIZE 64
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#define CVMX_UART_RX_FIFO_SIZE 64
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/* CSR typedefs have been moved to cvmx-uart-defs.h */
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typedef void (*cvmx_uart_intr_handler_t)(int, uint64_t[], void *);
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extern void cvmx_uart_enable_intr(int, cvmx_uart_intr_handler_t);
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extern int cvmx_uart_setup2(int, int, int);
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extern int cvmx_uart_setup(int);
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/* Defined in libc. */
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unsigned __octeon_uart_trylock (void);
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void __octeon_uart_unlock (void);
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/**
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* Get a single byte from serial port.
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*
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* @param uart_index Uart to read from (0 or 1)
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* @return The byte read
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*/
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static inline uint8_t cvmx_uart_read_byte(int uart_index)
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{
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cvmx_uart_lsr_t lsrval;
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/* Spin until data is available */
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do
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{
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lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(uart_index));
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} while (!lsrval.s.dr);
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/* Read and return the data */
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return cvmx_read_csr(CVMX_MIO_UARTX_RBR(uart_index));
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}
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/**
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* Get a single byte from serial port with a timeout.
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*
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* @param uart_index Uart to read from (0 or 1)
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* @param timedout Record if a timeout has happened
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* @param timeout the timeout count
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* @return The byte read
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*/
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static inline uint8_t cvmx_uart_read_byte_with_timeout(int uart_index, int *timedout, volatile unsigned timeout)
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{
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cvmx_uart_lsr_t lsrval;
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/* Spin until data is available */
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*timedout = 0;
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do
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{
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if(timeout == 0)
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{
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*timedout = 1;
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return -1;
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}
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lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(uart_index));
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timeout --;
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} while (!lsrval.s.dr);
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/* Read and return the data */
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return cvmx_read_csr(CVMX_MIO_UARTX_RBR(uart_index));
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}
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/**
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* Put a single byte to uart port.
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*
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* @param uart_index Uart to write to (0 or 1)
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* @param ch Byte to write
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*/
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static inline void cvmx_uart_write_byte(int uart_index, uint8_t ch)
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{
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cvmx_uart_lsr_t lsrval;
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/* Spin until there is room */
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do
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{
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lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(uart_index));
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}
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while (lsrval.s.thre == 0);
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/* Write the byte */
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cvmx_write_csr(CVMX_MIO_UARTX_THR(uart_index), ch);
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}
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/**
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* Write a string to the uart
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*
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* @param uart_index Uart to use (0 or 1)
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* @param str String to write
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*/
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static inline void cvmx_uart_write_string(int uart_index, const char *str)
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{
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/* Just loop writing one byte at a time */
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while (*str)
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{
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cvmx_uart_write_byte(uart_index, *str);
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str++;
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}
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CVM_UART_H__ */
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