dc4ee6ca91
make use of it where possible. This primarily brings in support for newer hardware, and FreeBSD is not yet able to support the abundance of IRQs on new hardware and many features in the Ethernet driver. Because of the changes to IRQs in the Simple Executive, we have to maintain our own list of Octeon IRQs now, which probably can be pared-down and be specific to the CIU interrupt unit soon, and when other interrupt mechanisms are added they can maintain their own definitions. Remove unmasking of interrupts from within the UART device now that the function used is no longer present in the Simple Executive. The unmasking seems to have been gratuitous as this is more properly handled by the buses above the UART device, and seems to work on that basis.
226 lines
8.1 KiB
C
226 lines
8.1 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2011 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* Interface to Octeon boot structure
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*
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* <hr>$Revision: $<hr>
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*/
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#ifndef __OCTEON_BOOT_INFO_H__
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#define __OCTEON_BOOT_INFO_H__
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#include <linux/types.h>
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#include <asm/octeon/cvmx-asm.h>
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#else
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#include "cvmx-asm.h"
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#endif
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#ifndef __ASSEMBLY__
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/*
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* This structure is access by bootloader, Linux kernel and the Linux
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* user space utility "bootoct".
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* In the bootloader, this structure is accessed by assembly code in start.S,
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* so any changes to content or size must be reflected there as well.
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* This is placed at a fixed address in DRAM, so that cores can access it
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* when they come out of reset. It is used to setup the minimal bootloader
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* runtime environment (stack, but no heap, global data ptr) that is needed
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* by the non-boot cores to setup the environment for the applications.
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* The boot_info_addr is the address of a boot_info_block_t structure
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* which contains more core-specific information.
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*
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* The Linux kernel and the Linux bootoct utility access this structure for
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* implementing CPU hotplug functionality and booting of idle cores with SE
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* apps respectively.
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*
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*/
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typedef struct
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{
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/* First stage address - in ram instead of flash */
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uint64_t code_addr;
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/* Setup code for application, NOT application entry point */
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uint32_t app_start_func_addr;
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/* k0 is used for global data - needs to be passed to other cores */
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uint32_t k0_val;
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/* Address of boot info block structure */
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uint64_t boot_info_addr;
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uint32_t flags; /* flags */
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uint32_t pad;
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} boot_init_vector_t;
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#if defined(__ASM_GBL_DATA_H) /* defined above */
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/*
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* Definition of a data structure to mimic the old u-boot gd_t data structure.
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*/
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#undef GD_TMP_STR_SIZE
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#define GD_TMP_STR_SIZE 32
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#define LINUX_APP_GLOBAL_DATA_MAGIC 0x221eb111476f410full
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#define LINUX_APP_GLOBAL_DATA_VERSION 2
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struct linux_app_global_data {
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bd_t *bd;
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unsigned long flags;
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unsigned long baudrate;
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unsigned long have_console; /* serial_init() was called */
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uint64_t ram_size; /* RAM size */
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uint64_t reloc_off; /* Relocation Offset */
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unsigned long env_addr; /* Address of Environment struct */
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unsigned long env_valid; /* Checksum of Environment valid? */
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unsigned long cpu_clock_mhz; /* CPU clock speed in MHz */
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unsigned long ddr_clock_mhz; /* DDR clock (not data rate!) in MHz */
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unsigned long ddr_ref_hertz; /* DDR Ref clock Hertz */
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int mcu_rev_maj;
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int mcu_rev_min;
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int console_uart;
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/* EEPROM data structures as read from EEPROM or populated by other
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* means on boards without an EEPROM
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*/
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octeon_eeprom_board_desc_t board_desc;
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octeon_eeprom_clock_desc_t clock_desc;
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octeon_eeprom_mac_addr_t mac_desc;
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void **jt; /* jump table, not used */
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char *err_msg; /* pointer to error message to save
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* until console is up. Not used.
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*/
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union {
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struct { /* Keep under 32 bytes! */
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uint64_t magic;
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uint32_t version;
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uint32_t fdt_addr;
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};
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char tmp_str[GD_TMP_STR_SIZE];
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};
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unsigned long uboot_flash_address; /* Address of normal bootloader
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* in flash
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*/
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unsigned long uboot_flash_size; /* Size of normal bootloader */
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uint64_t dfm_ram_size; /* DFM RAM size */
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};
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typedef struct linux_app_global_data linux_app_global_data_t;
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/* Flags for linux_app_global_data */
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#define LA_GD_FLG_RELOC 0x0001 /* Code was relocated to RAM */
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#define LA_GD_FLG_DEVINIT 0x0002 /* Devices have been initialized */
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#define LA_GD_FLG_SILENT 0x0004 /* Silent mode */
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#define LA_GD_FLG_CLOCK_DESC_MISSING 0x0008
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#define LA_GD_FLG_BOARD_DESC_MISSING 0x0010
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#define LA_GD_FLG_DDR_VERBOSE 0x0020
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#define LA_GD_FLG_DDR0_CLK_INITIALIZED 0x0040
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#define LA_GD_FLG_DDR1_CLK_INITIALIZED 0x0080
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#define LA_GD_FLG_DDR2_CLK_INITIALIZED 0x0100
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#define LA_GD_FLG_DDR3_CLK_INITIALIZED 0x0200
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#define LA_GD_FLG_FAILSAFE_MODE 0x0400 /* Use failsafe mode */
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#define LA_GD_FLG_DDR_TRACE_INIT 0x0800
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#define LA_GD_FLG_DFM_CLK_INITIALIZED 0x1000
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#define LA_GD_FLG_DFM_VERBOSE 0x2000
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#define LA_GD_FLG_DFM_TRACE_INIT 0x4000
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#define LA_GD_FLG_MEMORY_PRESERVED 0x8000
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#define LA_GD_FLG_RAM_RESIDENT 0x10000 /* RAM boot detected */
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#endif /* __ASM_GBL_DATA_H */
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/*
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* Definition of a data structure setup by the bootloader to enable Linux to
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* launch SE apps on idle cores.
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*/
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struct linux_app_boot_info
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{
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uint32_t labi_signature;
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uint32_t start_core0_addr;
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uint32_t avail_coremask;
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uint32_t pci_console_active;
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uint32_t icache_prefetch_disable;
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uint64_t InitTLBStart_addr;
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uint32_t start_app_addr;
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uint32_t cur_exception_base;
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uint32_t no_mark_private_data;
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uint32_t compact_flash_common_base_addr;
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uint32_t compact_flash_attribute_base_addr;
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uint32_t led_display_base_addr;
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#if defined(__ASM_GBL_DATA_H) /* defined above */
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linux_app_global_data_t gd;
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#endif
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};
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typedef struct linux_app_boot_info linux_app_boot_info_t;
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#endif
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/* If not to copy a lot of bootloader's structures
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here is only offset of requested member */
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#define AVAIL_COREMASK_OFFSET_IN_LINUX_APP_BOOT_BLOCK 0x765c
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/* hardcoded in bootloader */
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#define LABI_ADDR_IN_BOOTLOADER 0x700
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#define LINUX_APP_BOOT_BLOCK_NAME "linux-app-boot"
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#define LABI_SIGNATURE 0xAABBCC01
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/* from uboot-headers/octeon_mem_map.h */
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#if defined(CVMX_BUILD_FOR_LINUX_KERNEL) || defined(CVMX_BUILD_FOR_TOOLCHAIN)
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#define EXCEPTION_BASE_INCR (4 * 1024)
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#endif
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/* Increment size for exception base addresses (4k minimum) */
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#define EXCEPTION_BASE_BASE 0
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#define BOOTLOADER_PRIV_DATA_BASE (EXCEPTION_BASE_BASE + 0x800)
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#define BOOTLOADER_BOOT_VECTOR (BOOTLOADER_PRIV_DATA_BASE)
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#define BOOTLOADER_DEBUG_TRAMPOLINE (BOOTLOADER_BOOT_VECTOR + BOOT_VECTOR_SIZE) /* WORD */
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#define BOOTLOADER_DEBUG_TRAMPOLINE_CORE (BOOTLOADER_DEBUG_TRAMPOLINE + 4) /* WORD */
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#define OCTEON_EXCEPTION_VECTOR_BLOCK_SIZE (CVMX_MAX_CORES*EXCEPTION_BASE_INCR) /* 32 4k blocks */
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#define BOOTLOADER_DEBUG_REG_SAVE_BASE (EXCEPTION_BASE_BASE + OCTEON_EXCEPTION_VECTOR_BLOCK_SIZE)
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#define BOOT_VECTOR_NUM_WORDS (8)
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#define BOOT_VECTOR_SIZE ((CVMX_MAX_CORES*4)*BOOT_VECTOR_NUM_WORDS)
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#endif /* __OCTEON_BOOT_INFO_H__ */
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