..
_align.h
_bus.h
_inttypes.h
_limits.h
_stdint.h
_types.h
Do not include float interfaces when using libsa.
2018-02-23 04:04:25 +00:00
asm.h
Permit supervisor to access user VA space for certain functions only.
2018-09-05 11:34:58 +00:00
atomic.h
Implement atomic_swap_{int,long,ptr}(9).
2018-08-07 18:56:51 +00:00
bus_dma.h
bus.h
clock.h
counter.h
Back pcpu zone with domain correct pages
2018-07-06 02:06:03 +00:00
cpu.h
RISC-V: Implement get_cyclecount(9).
2018-11-13 18:20:27 +00:00
cpufunc.h
Rename sptbr to satp per v1.10 of the privileged architecture spec.
2018-12-07 15:55:23 +00:00
db_machdep.h
dump.h
efi.h
elf.h
Consolidate identical ELF auxargs type defintions.
2018-10-22 22:24:32 +00:00
encoding.h
Add RISC-V instructions encoding.
2018-08-13 16:07:18 +00:00
endian.h
exec.h
float.h
floatingpoint.h
fpe.h
Various fixes for floating point on RISC-V.
2018-09-19 23:45:18 +00:00
frame.h
ieeefp.h
in_cksum.h
intr.h
o Add driver for PLIC (Platform-Level Interrupt Controller) device.
2018-06-12 17:45:15 +00:00
kdb.h
Various fixes for TLB management on RISC-V.
2018-10-15 18:56:54 +00:00
machdep.h
md_var.h
memdev.h
minidump.h
ofw_machdep.h
param.h
pcb.h
pcpu.h
pmap.h
Support RISC-V implementations that do not manage the A and D bits
2018-10-18 15:25:07 +00:00
pmc_mdep.h
proc.h
profile.h
SPDX: Consider code from Carnegie-Mellon University.
2017-11-30 15:48:35 +00:00
psl.h
pte.h
Restrict setting PTE execute permissions on RISC-V.
2018-11-01 22:23:15 +00:00
ptrace.h
reg.h
reloc.h
resource.h
riscvreg.h
RISC-V: Add macros for reading performance counter CSRs.
2018-11-13 18:12:06 +00:00
runq.h
sbi.h
Various fixes for TLB management on RISC-V.
2018-10-15 18:56:54 +00:00
setjmp.h
Fix setjmp for RISC-V:
2018-07-23 09:54:28 +00:00
sf_buf.h
signal.h
smp.h
o Add driver for PLIC (Platform-Level Interrupt Controller) device.
2018-06-12 17:45:15 +00:00
stack.h
stdarg.h
Use standard pattern for stdargs.h
2018-02-12 14:48:05 +00:00
sysarch.h
trap.h
ucontext.h
vdso.h
vm.h
vmparam.h
Update the description of the address space layout on RISC-V.
2018-12-07 15:56:40 +00:00
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