3e13ea16a6
An attempt to write to FCR register may corrupt transmit FIFO, so we should wait for the FIFO to be empty before we can modify it. MFC after: 1 week
255 lines
6.5 KiB
C
255 lines
6.5 KiB
C
/*-
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* Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* UART driver for Tegra SoCs.
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*/
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/sysctl.h>
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#include <machine/bus.h>
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#include <dev/extres/clk/clk.h>
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#include <dev/extres/hwreset/hwreset.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_cpu.h>
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#include <dev/uart/uart_cpu_fdt.h>
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#include <dev/uart/uart_bus.h>
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#include <dev/uart/uart_dev_ns8250.h>
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#include <dev/ic/ns16550.h>
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#include "uart_if.h"
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/*
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* High-level UART interface.
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*/
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struct tegra_softc {
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struct ns8250_softc ns8250_base;
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clk_t clk;
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hwreset_t reset;
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};
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/*
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* UART class interface.
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*/
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static int
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tegra_uart_attach(struct uart_softc *sc)
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{
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int rv;
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struct ns8250_softc *ns8250 = (struct ns8250_softc*)sc;
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struct uart_bas *bas = &sc->sc_bas;
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rv = ns8250_bus_attach(sc);
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if (rv != 0)
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return (rv);
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ns8250->ier_rxbits = 0x1d;
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ns8250->ier_mask = 0xc0;
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ns8250->ier = uart_getreg(bas, REG_IER) & ns8250->ier_mask;
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ns8250->ier |= ns8250->ier_rxbits;
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uart_setreg(bas, REG_IER, ns8250->ier);
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uart_barrier(bas);
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return (0);
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}
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static void
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tegra_uart_grab(struct uart_softc *sc)
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{
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struct uart_bas *bas = &sc->sc_bas;
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struct ns8250_softc *ns8250 = (struct ns8250_softc*)sc;
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u_char ier;
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/*
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* turn off all interrupts to enter polling mode. Leave the
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* saved mask alone. We'll restore whatever it was in ungrab.
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* All pending interrupt signals are reset when IER is set to 0.
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*/
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uart_lock(sc->sc_hwmtx);
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ier = uart_getreg(bas, REG_IER);
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uart_setreg(bas, REG_IER, ier & ns8250->ier_mask);
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while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0)
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;
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uart_setreg(bas, REG_FCR, 0);
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uart_barrier(bas);
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uart_unlock(sc->sc_hwmtx);
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}
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static void
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tegra_uart_ungrab(struct uart_softc *sc)
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{
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struct ns8250_softc *ns8250 = (struct ns8250_softc*)sc;
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struct uart_bas *bas = &sc->sc_bas;
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/*
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* Restore previous interrupt mask
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*/
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uart_lock(sc->sc_hwmtx);
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uart_setreg(bas, REG_FCR, ns8250->fcr);
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uart_setreg(bas, REG_IER, ns8250->ier);
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uart_barrier(bas);
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uart_unlock(sc->sc_hwmtx);
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}
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static kobj_method_t tegra_methods[] = {
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KOBJMETHOD(uart_probe, ns8250_bus_probe),
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KOBJMETHOD(uart_attach, tegra_uart_attach),
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KOBJMETHOD(uart_detach, ns8250_bus_detach),
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KOBJMETHOD(uart_flush, ns8250_bus_flush),
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KOBJMETHOD(uart_getsig, ns8250_bus_getsig),
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KOBJMETHOD(uart_ioctl, ns8250_bus_ioctl),
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KOBJMETHOD(uart_ipend, ns8250_bus_ipend),
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KOBJMETHOD(uart_param, ns8250_bus_param),
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KOBJMETHOD(uart_receive, ns8250_bus_receive),
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KOBJMETHOD(uart_setsig, ns8250_bus_setsig),
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KOBJMETHOD(uart_transmit, ns8250_bus_transmit),
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KOBJMETHOD(uart_grab, tegra_uart_grab),
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KOBJMETHOD(uart_ungrab, tegra_uart_ungrab),
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KOBJMETHOD_END
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};
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static struct uart_class tegra_uart_class = {
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"tegra class",
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tegra_methods,
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sizeof(struct tegra_softc),
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.uc_ops = &uart_ns8250_ops,
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.uc_range = 8,
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.uc_rclk = 0,
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};
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/* Compatible devices. */
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static struct ofw_compat_data compat_data[] = {
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{"nvidia,tegra124-uart", (uintptr_t)&tegra_uart_class},
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{NULL, (uintptr_t)NULL},
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};
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UART_FDT_CLASS(compat_data);
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/*
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* UART Driver interface.
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*/
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static int
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uart_fdt_get_shift1(phandle_t node)
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{
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pcell_t shift;
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if ((OF_getencprop(node, "reg-shift", &shift, sizeof(shift))) <= 0)
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shift = 2;
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return ((int)shift);
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}
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static int
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tegra_uart_probe(device_t dev)
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{
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struct tegra_softc *sc;
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phandle_t node;
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uint64_t freq;
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int shift;
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int rv;
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const struct ofw_compat_data *cd;
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sc = device_get_softc(dev);
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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cd = ofw_bus_search_compatible(dev, compat_data);
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if (cd->ocd_data == 0)
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return (ENXIO);
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sc->ns8250_base.base.sc_class = (struct uart_class *)cd->ocd_data;
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rv = hwreset_get_by_ofw_name(dev, 0, "serial", &sc->reset);
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if (rv != 0) {
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device_printf(dev, "Cannot get 'serial' reset\n");
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return (ENXIO);
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}
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rv = hwreset_deassert(sc->reset);
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if (rv != 0) {
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device_printf(dev, "Cannot unreset 'serial' reset\n");
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return (ENXIO);
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}
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node = ofw_bus_get_node(dev);
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shift = uart_fdt_get_shift1(node);
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rv = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
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if (rv != 0) {
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device_printf(dev, "Cannot get UART clock: %d\n", rv);
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return (ENXIO);
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}
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rv = clk_enable(sc->clk);
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if (rv != 0) {
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device_printf(dev, "Cannot enable UART clock: %d\n", rv);
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return (ENXIO);
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}
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rv = clk_get_freq(sc->clk, &freq);
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if (rv != 0) {
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device_printf(dev, "Cannot enable UART clock: %d\n", rv);
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return (ENXIO);
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}
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return (uart_bus_probe(dev, shift, 0, (int)freq, 0, 0, 0));
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}
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static int
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tegra_uart_detach(device_t dev)
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{
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struct tegra_softc *sc;
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sc = device_get_softc(dev);
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if (sc->clk != NULL) {
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clk_release(sc->clk);
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}
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return (uart_bus_detach(dev));
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}
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static device_method_t tegra_uart_bus_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, tegra_uart_probe),
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DEVMETHOD(device_attach, uart_bus_attach),
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DEVMETHOD(device_detach, tegra_uart_detach),
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{ 0, 0 }
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};
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static driver_t tegra_uart_driver = {
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uart_driver_name,
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tegra_uart_bus_methods,
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sizeof(struct tegra_softc),
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};
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DRIVER_MODULE(tegra_uart, simplebus, tegra_uart_driver, uart_devclass,
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0, 0);
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