freebsd-dev/contrib/binutils/opcodes
Ryan Libby 1a11bb8f76 gnu binutils: FSGSBASE assembly/disassembly
Enable the in-tree binutils to assemble and disassemble amd64 FSGSBASE
instructions (rdfsbase, rdgsbase, wrfsbase, wrgsbase), used in the base
system since r322763.

This gives one last gasp for in-tree gcc, and provides a small
enhancement for in-tree binutils objdump.

Reviewed by:	dim, kib
Approved by:	markj (mentor)
Sponsored by:	Dell EMC Isilon
Differential Revision:	https://reviews.freebsd.org/D12222
2017-09-05 19:04:07 +00:00
..
po
aclocal.m4
alpha-dis.c
alpha-opc.c
arc-dis.c
arc-dis.h
arc-ext.c
arc-ext.h
arc-opc.c
arm-dis.c In binutils' arm-dis.c, avoid left-shifting a negative number. 2015-09-22 09:35:35 +00:00
cgen-asm.c
cgen-asm.in
cgen-dis.c
cgen-dis.in
cgen-ibld.in
cgen-opc.c
cgen.sh
ChangeLog
ChangeLog-0001
ChangeLog-0203
ChangeLog-2006
ChangeLog-9297
ChangeLog-9899
config.in
configure
configure.in
cr16-dis.c
cr16-opc.c
dep-in.sed
dis-buf.c
dis-init.c
disassemble.c
i386-dis.c gnu binutils: FSGSBASE assembly/disassembly 2017-09-05 19:04:07 +00:00
i386-gen.c
i386-opc.c
i386-opc.h gnu binutils: FSGSBASE assembly/disassembly 2017-09-05 19:04:07 +00:00
i386-opc.tbl gnu binutils: FSGSBASE assembly/disassembly 2017-09-05 19:04:07 +00:00
i386-reg.tbl
i386-tbl.h gnu binutils: FSGSBASE assembly/disassembly 2017-09-05 19:04:07 +00:00
ia64-asmtab.c
ia64-asmtab.h
ia64-dis.c
ia64-gen.c
ia64-ic.tbl
ia64-opc-a.c
ia64-opc-b.c
ia64-opc-d.c
ia64-opc-f.c
ia64-opc-i.c
ia64-opc-m.c
ia64-opc-x.c
ia64-opc.c
ia64-opc.h
ia64-raw.tbl
ia64-war.tbl
ia64-waw.tbl
MAINTAINERS
Makefile.am
Makefile.in
mep-asm.c
mep-desc.c
mep-desc.h
mep-dis.c
mep-ibld.c
mep-opc.c
mep-opc.h
mips16-opc.c
mips-dis.c
mips-opc.c
opintl.h
ppc-dis.c
ppc-opc.c Add rfdi opcode to binutils 2017-02-01 02:42:45 +00:00
s390-dis.c
s390-mkopc.c
s390-opc.c
s390-opc.txt
score-dis.c
score-opc.h
sh-dis.c
sh-opc.h
sparc-dis.c
sparc-opc.c
spu-dis.c
spu-opc.c
stamp-h.in
sysdep.h