fdce57a042
Currently, Application Processors (non-boot CPUs) are started by MD code at SI_SUB_CPU, but they are kept waiting in a "pen" until SI_SUB_SMP at which point they are released to run kernel threads. SI_SUB_SMP is one of the last SYSINIT levels, so APs don't enter the scheduler and start running threads until fairly late in the boot. This change moves SI_SUB_SMP up to just before software interrupt threads are created allowing the APs to start executing kernel threads much sooner (before any devices are probed). This allows several initialization routines that need to perform initialization on all CPUs to now perform that initialization in one step rather than having to defer the AP initialization to a second SYSINIT run at SI_SUB_SMP. It also permits all CPUs to be available for handling interrupts before any devices are probed. This last feature fixes a problem on with interrupt vector exhaustion. Specifically, in the old model all device interrupts were routed onto the boot CPU during boot. Later after the APs were released at SI_SUB_SMP, interrupts were redistributed across all CPUs. However, several drivers for multiqueue hardware allocate N interrupts per CPU in the system. In a system with many CPUs, just a few drivers doing this could exhaust the available pool of interrupt vectors on the boot CPU as each driver was allocating N * mp_ncpu vectors on the boot CPU. Now, drivers will allocate interrupts on their desired CPUs during boot meaning that only N interrupts are allocated from the boot CPU instead of N * mp_ncpu. Some other bits of code can also be simplified as smp_started is now true much earlier and will now always be true for these bits of code. This removes the need to treat the single-CPU boot environment as a special case. As a transition aid, the new behavior is available under a new kernel option (EARLY_AP_STARTUP). This will allow the option to be turned off if need be during initial testing. I plan to enable this on x86 by default in a followup commit in the next few days and to have all platforms moved over before 11.0. Once the transition is complete, the option will be removed along with the !EARLY_AP_STARTUP code. These changes have only been tested on x86. Other platform maintainers are encouraged to port their architectures over as well. The main things to check for are any uses of smp_started in MD code that can be simplified and SI_SUB_SMP SYSINITs in MD code that can be removed in the EARLY_AP_STARTUP case (e.g. the interrupt shuffling). PR: kern/199321 Reviewed by: markj, gnn, kib Sponsored by: Netflix
967 lines
23 KiB
C
967 lines
23 KiB
C
/*-
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* Copyright (c) 2010-2013 Alexander Motin <mav@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Common routines to manage event timers hardware.
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*/
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#include "opt_device_polling.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/limits.h>
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#include <sys/lock.h>
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#include <sys/kdb.h>
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#include <sys/ktr.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <sys/kernel.h>
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#include <sys/sched.h>
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#include <sys/smp.h>
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#include <sys/sysctl.h>
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#include <sys/timeet.h>
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#include <sys/timetc.h>
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#include <machine/atomic.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/smp.h>
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int cpu_deepest_sleep = 0; /* Deepest Cx state available. */
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int cpu_disable_c2_sleep = 0; /* Timer dies in C2. */
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int cpu_disable_c3_sleep = 0; /* Timer dies in C3. */
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static void setuptimer(void);
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static void loadtimer(sbintime_t now, int first);
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static int doconfigtimer(void);
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static void configtimer(int start);
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static int round_freq(struct eventtimer *et, int freq);
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static sbintime_t getnextcpuevent(int idle);
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static sbintime_t getnextevent(void);
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static int handleevents(sbintime_t now, int fake);
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static struct mtx et_hw_mtx;
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#define ET_HW_LOCK(state) \
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{ \
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if (timer->et_flags & ET_FLAGS_PERCPU) \
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mtx_lock_spin(&(state)->et_hw_mtx); \
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else \
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mtx_lock_spin(&et_hw_mtx); \
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}
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#define ET_HW_UNLOCK(state) \
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{ \
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if (timer->et_flags & ET_FLAGS_PERCPU) \
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mtx_unlock_spin(&(state)->et_hw_mtx); \
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else \
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mtx_unlock_spin(&et_hw_mtx); \
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}
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static struct eventtimer *timer = NULL;
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static sbintime_t timerperiod; /* Timer period for periodic mode. */
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static sbintime_t statperiod; /* statclock() events period. */
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static sbintime_t profperiod; /* profclock() events period. */
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static sbintime_t nexttick; /* Next global timer tick time. */
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static u_int busy = 1; /* Reconfiguration is in progress. */
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static int profiling; /* Profiling events enabled. */
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static char timername[32]; /* Wanted timer. */
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TUNABLE_STR("kern.eventtimer.timer", timername, sizeof(timername));
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static int singlemul; /* Multiplier for periodic mode. */
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SYSCTL_INT(_kern_eventtimer, OID_AUTO, singlemul, CTLFLAG_RWTUN, &singlemul,
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0, "Multiplier for periodic mode");
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static u_int idletick; /* Run periodic events when idle. */
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SYSCTL_UINT(_kern_eventtimer, OID_AUTO, idletick, CTLFLAG_RWTUN, &idletick,
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0, "Run periodic events when idle");
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static int periodic; /* Periodic or one-shot mode. */
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static int want_periodic; /* What mode to prefer. */
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TUNABLE_INT("kern.eventtimer.periodic", &want_periodic);
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struct pcpu_state {
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struct mtx et_hw_mtx; /* Per-CPU timer mutex. */
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u_int action; /* Reconfiguration requests. */
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u_int handle; /* Immediate handle resuests. */
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sbintime_t now; /* Last tick time. */
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sbintime_t nextevent; /* Next scheduled event on this CPU. */
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sbintime_t nexttick; /* Next timer tick time. */
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sbintime_t nexthard; /* Next hardclock() event. */
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sbintime_t nextstat; /* Next statclock() event. */
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sbintime_t nextprof; /* Next profclock() event. */
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sbintime_t nextcall; /* Next callout event. */
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sbintime_t nextcallopt; /* Next optional callout event. */
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int ipi; /* This CPU needs IPI. */
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int idle; /* This CPU is in idle mode. */
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};
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static DPCPU_DEFINE(struct pcpu_state, timerstate);
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DPCPU_DEFINE(sbintime_t, hardclocktime);
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/*
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* Timer broadcast IPI handler.
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*/
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int
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hardclockintr(void)
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{
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sbintime_t now;
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struct pcpu_state *state;
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int done;
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if (doconfigtimer() || busy)
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return (FILTER_HANDLED);
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state = DPCPU_PTR(timerstate);
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now = state->now;
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CTR3(KTR_SPARE2, "ipi at %d: now %d.%08x",
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curcpu, (int)(now >> 32), (u_int)(now & 0xffffffff));
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done = handleevents(now, 0);
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return (done ? FILTER_HANDLED : FILTER_STRAY);
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}
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/*
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* Handle all events for specified time on this CPU
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*/
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static int
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handleevents(sbintime_t now, int fake)
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{
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sbintime_t t, *hct;
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struct trapframe *frame;
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struct pcpu_state *state;
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int usermode;
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int done, runs;
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CTR3(KTR_SPARE2, "handle at %d: now %d.%08x",
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curcpu, (int)(now >> 32), (u_int)(now & 0xffffffff));
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done = 0;
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if (fake) {
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frame = NULL;
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usermode = 0;
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} else {
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frame = curthread->td_intr_frame;
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usermode = TRAPF_USERMODE(frame);
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}
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state = DPCPU_PTR(timerstate);
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runs = 0;
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while (now >= state->nexthard) {
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state->nexthard += tick_sbt;
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runs++;
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}
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if (runs) {
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hct = DPCPU_PTR(hardclocktime);
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*hct = state->nexthard - tick_sbt;
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if (fake < 2) {
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hardclock_cnt(runs, usermode);
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done = 1;
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}
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}
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runs = 0;
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while (now >= state->nextstat) {
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state->nextstat += statperiod;
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runs++;
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}
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if (runs && fake < 2) {
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statclock_cnt(runs, usermode);
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done = 1;
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}
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if (profiling) {
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runs = 0;
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while (now >= state->nextprof) {
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state->nextprof += profperiod;
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runs++;
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}
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if (runs && !fake) {
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profclock_cnt(runs, usermode, TRAPF_PC(frame));
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done = 1;
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}
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} else
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state->nextprof = state->nextstat;
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if (now >= state->nextcallopt) {
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state->nextcall = state->nextcallopt = SBT_MAX;
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callout_process(now);
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}
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t = getnextcpuevent(0);
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ET_HW_LOCK(state);
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if (!busy) {
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state->idle = 0;
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state->nextevent = t;
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loadtimer(now, (fake == 2) &&
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(timer->et_flags & ET_FLAGS_PERCPU));
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}
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ET_HW_UNLOCK(state);
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return (done);
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}
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/*
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* Schedule binuptime of the next event on current CPU.
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*/
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static sbintime_t
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getnextcpuevent(int idle)
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{
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sbintime_t event;
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struct pcpu_state *state;
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u_int hardfreq;
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state = DPCPU_PTR(timerstate);
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/* Handle hardclock() events, skipping some if CPU is idle. */
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event = state->nexthard;
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if (idle) {
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hardfreq = (u_int)hz / 2;
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if (tc_min_ticktock_freq > 2
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#ifdef SMP
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&& curcpu == CPU_FIRST()
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#endif
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)
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hardfreq = hz / tc_min_ticktock_freq;
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if (hardfreq > 1)
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event += tick_sbt * (hardfreq - 1);
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}
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/* Handle callout events. */
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if (event > state->nextcall)
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event = state->nextcall;
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if (!idle) { /* If CPU is active - handle other types of events. */
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if (event > state->nextstat)
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event = state->nextstat;
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if (profiling && event > state->nextprof)
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event = state->nextprof;
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}
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return (event);
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}
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/*
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* Schedule binuptime of the next event on all CPUs.
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*/
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static sbintime_t
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getnextevent(void)
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{
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struct pcpu_state *state;
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sbintime_t event;
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#ifdef SMP
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int cpu;
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#endif
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int c;
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state = DPCPU_PTR(timerstate);
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event = state->nextevent;
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c = -1;
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#ifdef SMP
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if ((timer->et_flags & ET_FLAGS_PERCPU) == 0) {
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CPU_FOREACH(cpu) {
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state = DPCPU_ID_PTR(cpu, timerstate);
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if (event > state->nextevent) {
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event = state->nextevent;
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c = cpu;
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}
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}
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}
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#endif
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CTR4(KTR_SPARE2, "next at %d: next %d.%08x by %d",
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curcpu, (int)(event >> 32), (u_int)(event & 0xffffffff), c);
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return (event);
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}
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/* Hardware timer callback function. */
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static void
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timercb(struct eventtimer *et, void *arg)
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{
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sbintime_t now;
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sbintime_t *next;
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struct pcpu_state *state;
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#ifdef SMP
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int cpu, bcast;
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#endif
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/* Do not touch anything if somebody reconfiguring timers. */
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if (busy)
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return;
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/* Update present and next tick times. */
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state = DPCPU_PTR(timerstate);
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if (et->et_flags & ET_FLAGS_PERCPU) {
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next = &state->nexttick;
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} else
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next = &nexttick;
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now = sbinuptime();
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if (periodic)
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*next = now + timerperiod;
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else
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*next = -1; /* Next tick is not scheduled yet. */
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state->now = now;
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CTR3(KTR_SPARE2, "intr at %d: now %d.%08x",
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curcpu, (int)(now >> 32), (u_int)(now & 0xffffffff));
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#ifdef SMP
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#ifdef EARLY_AP_STARTUP
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MPASS(mp_ncpus == 1 || smp_started);
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#endif
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/* Prepare broadcasting to other CPUs for non-per-CPU timers. */
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bcast = 0;
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#ifdef EARLY_AP_STARTUP
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if ((et->et_flags & ET_FLAGS_PERCPU) == 0) {
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#else
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if ((et->et_flags & ET_FLAGS_PERCPU) == 0 && smp_started) {
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#endif
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CPU_FOREACH(cpu) {
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state = DPCPU_ID_PTR(cpu, timerstate);
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ET_HW_LOCK(state);
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state->now = now;
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if (now >= state->nextevent) {
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state->nextevent += SBT_1S;
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if (curcpu != cpu) {
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state->ipi = 1;
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bcast = 1;
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}
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}
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ET_HW_UNLOCK(state);
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}
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}
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#endif
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/* Handle events for this time on this CPU. */
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handleevents(now, 0);
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#ifdef SMP
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/* Broadcast interrupt to other CPUs for non-per-CPU timers. */
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if (bcast) {
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CPU_FOREACH(cpu) {
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if (curcpu == cpu)
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continue;
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state = DPCPU_ID_PTR(cpu, timerstate);
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if (state->ipi) {
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state->ipi = 0;
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ipi_cpu(cpu, IPI_HARDCLOCK);
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}
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}
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}
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#endif
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}
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/*
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* Load new value into hardware timer.
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*/
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static void
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loadtimer(sbintime_t now, int start)
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{
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struct pcpu_state *state;
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sbintime_t new;
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sbintime_t *next;
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uint64_t tmp;
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int eq;
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if (timer->et_flags & ET_FLAGS_PERCPU) {
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state = DPCPU_PTR(timerstate);
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next = &state->nexttick;
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} else
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next = &nexttick;
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if (periodic) {
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if (start) {
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/*
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* Try to start all periodic timers aligned
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* to period to make events synchronous.
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*/
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tmp = now % timerperiod;
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new = timerperiod - tmp;
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if (new < tmp) /* Left less then passed. */
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new += timerperiod;
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CTR5(KTR_SPARE2, "load p at %d: now %d.%08x first in %d.%08x",
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curcpu, (int)(now >> 32), (u_int)(now & 0xffffffff),
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(int)(new >> 32), (u_int)(new & 0xffffffff));
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*next = new + now;
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et_start(timer, new, timerperiod);
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}
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} else {
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new = getnextevent();
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eq = (new == *next);
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CTR4(KTR_SPARE2, "load at %d: next %d.%08x eq %d",
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curcpu, (int)(new >> 32), (u_int)(new & 0xffffffff), eq);
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if (!eq) {
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*next = new;
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et_start(timer, new - now, 0);
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}
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}
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}
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/*
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* Prepare event timer parameters after configuration changes.
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*/
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static void
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setuptimer(void)
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{
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int freq;
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if (periodic && (timer->et_flags & ET_FLAGS_PERIODIC) == 0)
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periodic = 0;
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else if (!periodic && (timer->et_flags & ET_FLAGS_ONESHOT) == 0)
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periodic = 1;
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singlemul = MIN(MAX(singlemul, 1), 20);
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freq = hz * singlemul;
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while (freq < (profiling ? profhz : stathz))
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freq += hz;
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freq = round_freq(timer, freq);
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timerperiod = SBT_1S / freq;
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}
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/*
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* Reconfigure specified per-CPU timer on other CPU. Called from IPI handler.
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*/
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static int
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doconfigtimer(void)
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{
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sbintime_t now;
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struct pcpu_state *state;
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state = DPCPU_PTR(timerstate);
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switch (atomic_load_acq_int(&state->action)) {
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case 1:
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now = sbinuptime();
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ET_HW_LOCK(state);
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loadtimer(now, 1);
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ET_HW_UNLOCK(state);
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state->handle = 0;
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atomic_store_rel_int(&state->action, 0);
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return (1);
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case 2:
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ET_HW_LOCK(state);
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et_stop(timer);
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ET_HW_UNLOCK(state);
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state->handle = 0;
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atomic_store_rel_int(&state->action, 0);
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return (1);
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}
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if (atomic_readandclear_int(&state->handle) && !busy) {
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now = sbinuptime();
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handleevents(now, 0);
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return (1);
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}
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return (0);
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}
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/*
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* Reconfigure specified timer.
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* For per-CPU timers use IPI to make other CPUs to reconfigure.
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*/
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static void
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configtimer(int start)
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{
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sbintime_t now, next;
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struct pcpu_state *state;
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int cpu;
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if (start) {
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setuptimer();
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now = sbinuptime();
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} else
|
|
now = 0;
|
|
critical_enter();
|
|
ET_HW_LOCK(DPCPU_PTR(timerstate));
|
|
if (start) {
|
|
/* Initialize time machine parameters. */
|
|
next = now + timerperiod;
|
|
if (periodic)
|
|
nexttick = next;
|
|
else
|
|
nexttick = -1;
|
|
#ifdef EARLY_AP_STARTUP
|
|
MPASS(mp_ncpus == 1 || smp_started);
|
|
#endif
|
|
CPU_FOREACH(cpu) {
|
|
state = DPCPU_ID_PTR(cpu, timerstate);
|
|
state->now = now;
|
|
#ifndef EARLY_AP_STARTUP
|
|
if (!smp_started && cpu != CPU_FIRST())
|
|
state->nextevent = SBT_MAX;
|
|
else
|
|
#endif
|
|
state->nextevent = next;
|
|
if (periodic)
|
|
state->nexttick = next;
|
|
else
|
|
state->nexttick = -1;
|
|
state->nexthard = next;
|
|
state->nextstat = next;
|
|
state->nextprof = next;
|
|
state->nextcall = next;
|
|
state->nextcallopt = next;
|
|
hardclock_sync(cpu);
|
|
}
|
|
busy = 0;
|
|
/* Start global timer or per-CPU timer of this CPU. */
|
|
loadtimer(now, 1);
|
|
} else {
|
|
busy = 1;
|
|
/* Stop global timer or per-CPU timer of this CPU. */
|
|
et_stop(timer);
|
|
}
|
|
ET_HW_UNLOCK(DPCPU_PTR(timerstate));
|
|
#ifdef SMP
|
|
#ifdef EARLY_AP_STARTUP
|
|
/* If timer is global we are done. */
|
|
if ((timer->et_flags & ET_FLAGS_PERCPU) == 0) {
|
|
#else
|
|
/* If timer is global or there is no other CPUs yet - we are done. */
|
|
if ((timer->et_flags & ET_FLAGS_PERCPU) == 0 || !smp_started) {
|
|
#endif
|
|
critical_exit();
|
|
return;
|
|
}
|
|
/* Set reconfigure flags for other CPUs. */
|
|
CPU_FOREACH(cpu) {
|
|
state = DPCPU_ID_PTR(cpu, timerstate);
|
|
atomic_store_rel_int(&state->action,
|
|
(cpu == curcpu) ? 0 : ( start ? 1 : 2));
|
|
}
|
|
/* Broadcast reconfigure IPI. */
|
|
ipi_all_but_self(IPI_HARDCLOCK);
|
|
/* Wait for reconfiguration completed. */
|
|
restart:
|
|
cpu_spinwait();
|
|
CPU_FOREACH(cpu) {
|
|
if (cpu == curcpu)
|
|
continue;
|
|
state = DPCPU_ID_PTR(cpu, timerstate);
|
|
if (atomic_load_acq_int(&state->action))
|
|
goto restart;
|
|
}
|
|
#endif
|
|
critical_exit();
|
|
}
|
|
|
|
/*
|
|
* Calculate nearest frequency supported by hardware timer.
|
|
*/
|
|
static int
|
|
round_freq(struct eventtimer *et, int freq)
|
|
{
|
|
uint64_t div;
|
|
|
|
if (et->et_frequency != 0) {
|
|
div = lmax((et->et_frequency + freq / 2) / freq, 1);
|
|
if (et->et_flags & ET_FLAGS_POW2DIV)
|
|
div = 1 << (flsl(div + div / 2) - 1);
|
|
freq = (et->et_frequency + div / 2) / div;
|
|
}
|
|
if (et->et_min_period > SBT_1S)
|
|
panic("Event timer \"%s\" doesn't support sub-second periods!",
|
|
et->et_name);
|
|
else if (et->et_min_period != 0)
|
|
freq = min(freq, SBT2FREQ(et->et_min_period));
|
|
if (et->et_max_period < SBT_1S && et->et_max_period != 0)
|
|
freq = max(freq, SBT2FREQ(et->et_max_period));
|
|
return (freq);
|
|
}
|
|
|
|
/*
|
|
* Configure and start event timers (BSP part).
|
|
*/
|
|
void
|
|
cpu_initclocks_bsp(void)
|
|
{
|
|
struct pcpu_state *state;
|
|
int base, div, cpu;
|
|
|
|
mtx_init(&et_hw_mtx, "et_hw_mtx", NULL, MTX_SPIN);
|
|
CPU_FOREACH(cpu) {
|
|
state = DPCPU_ID_PTR(cpu, timerstate);
|
|
mtx_init(&state->et_hw_mtx, "et_hw_mtx", NULL, MTX_SPIN);
|
|
state->nextcall = SBT_MAX;
|
|
state->nextcallopt = SBT_MAX;
|
|
}
|
|
periodic = want_periodic;
|
|
/* Grab requested timer or the best of present. */
|
|
if (timername[0])
|
|
timer = et_find(timername, 0, 0);
|
|
if (timer == NULL && periodic) {
|
|
timer = et_find(NULL,
|
|
ET_FLAGS_PERIODIC, ET_FLAGS_PERIODIC);
|
|
}
|
|
if (timer == NULL) {
|
|
timer = et_find(NULL,
|
|
ET_FLAGS_ONESHOT, ET_FLAGS_ONESHOT);
|
|
}
|
|
if (timer == NULL && !periodic) {
|
|
timer = et_find(NULL,
|
|
ET_FLAGS_PERIODIC, ET_FLAGS_PERIODIC);
|
|
}
|
|
if (timer == NULL)
|
|
panic("No usable event timer found!");
|
|
et_init(timer, timercb, NULL, NULL);
|
|
|
|
/* Adapt to timer capabilities. */
|
|
if (periodic && (timer->et_flags & ET_FLAGS_PERIODIC) == 0)
|
|
periodic = 0;
|
|
else if (!periodic && (timer->et_flags & ET_FLAGS_ONESHOT) == 0)
|
|
periodic = 1;
|
|
if (timer->et_flags & ET_FLAGS_C3STOP)
|
|
cpu_disable_c3_sleep++;
|
|
|
|
/*
|
|
* We honor the requested 'hz' value.
|
|
* We want to run stathz in the neighborhood of 128hz.
|
|
* We would like profhz to run as often as possible.
|
|
*/
|
|
if (singlemul <= 0 || singlemul > 20) {
|
|
if (hz >= 1500 || (hz % 128) == 0)
|
|
singlemul = 1;
|
|
else if (hz >= 750)
|
|
singlemul = 2;
|
|
else
|
|
singlemul = 4;
|
|
}
|
|
if (periodic) {
|
|
base = round_freq(timer, hz * singlemul);
|
|
singlemul = max((base + hz / 2) / hz, 1);
|
|
hz = (base + singlemul / 2) / singlemul;
|
|
if (base <= 128)
|
|
stathz = base;
|
|
else {
|
|
div = base / 128;
|
|
if (div >= singlemul && (div % singlemul) == 0)
|
|
div++;
|
|
stathz = base / div;
|
|
}
|
|
profhz = stathz;
|
|
while ((profhz + stathz) <= 128 * 64)
|
|
profhz += stathz;
|
|
profhz = round_freq(timer, profhz);
|
|
} else {
|
|
hz = round_freq(timer, hz);
|
|
stathz = round_freq(timer, 127);
|
|
profhz = round_freq(timer, stathz * 64);
|
|
}
|
|
tick = 1000000 / hz;
|
|
tick_sbt = SBT_1S / hz;
|
|
tick_bt = sbttobt(tick_sbt);
|
|
statperiod = SBT_1S / stathz;
|
|
profperiod = SBT_1S / profhz;
|
|
ET_LOCK();
|
|
configtimer(1);
|
|
ET_UNLOCK();
|
|
}
|
|
|
|
/*
|
|
* Start per-CPU event timers on APs.
|
|
*/
|
|
void
|
|
cpu_initclocks_ap(void)
|
|
{
|
|
sbintime_t now;
|
|
struct pcpu_state *state;
|
|
struct thread *td;
|
|
|
|
state = DPCPU_PTR(timerstate);
|
|
now = sbinuptime();
|
|
ET_HW_LOCK(state);
|
|
state->now = now;
|
|
hardclock_sync(curcpu);
|
|
spinlock_enter();
|
|
ET_HW_UNLOCK(state);
|
|
td = curthread;
|
|
td->td_intr_nesting_level++;
|
|
handleevents(state->now, 2);
|
|
td->td_intr_nesting_level--;
|
|
spinlock_exit();
|
|
}
|
|
|
|
/*
|
|
* Switch to profiling clock rates.
|
|
*/
|
|
void
|
|
cpu_startprofclock(void)
|
|
{
|
|
|
|
ET_LOCK();
|
|
if (profiling == 0) {
|
|
if (periodic) {
|
|
configtimer(0);
|
|
profiling = 1;
|
|
configtimer(1);
|
|
} else
|
|
profiling = 1;
|
|
} else
|
|
profiling++;
|
|
ET_UNLOCK();
|
|
}
|
|
|
|
/*
|
|
* Switch to regular clock rates.
|
|
*/
|
|
void
|
|
cpu_stopprofclock(void)
|
|
{
|
|
|
|
ET_LOCK();
|
|
if (profiling == 1) {
|
|
if (periodic) {
|
|
configtimer(0);
|
|
profiling = 0;
|
|
configtimer(1);
|
|
} else
|
|
profiling = 0;
|
|
} else
|
|
profiling--;
|
|
ET_UNLOCK();
|
|
}
|
|
|
|
/*
|
|
* Switch to idle mode (all ticks handled).
|
|
*/
|
|
sbintime_t
|
|
cpu_idleclock(void)
|
|
{
|
|
sbintime_t now, t;
|
|
struct pcpu_state *state;
|
|
|
|
if (idletick || busy ||
|
|
(periodic && (timer->et_flags & ET_FLAGS_PERCPU))
|
|
#ifdef DEVICE_POLLING
|
|
|| curcpu == CPU_FIRST()
|
|
#endif
|
|
)
|
|
return (-1);
|
|
state = DPCPU_PTR(timerstate);
|
|
if (periodic)
|
|
now = state->now;
|
|
else
|
|
now = sbinuptime();
|
|
CTR3(KTR_SPARE2, "idle at %d: now %d.%08x",
|
|
curcpu, (int)(now >> 32), (u_int)(now & 0xffffffff));
|
|
t = getnextcpuevent(1);
|
|
ET_HW_LOCK(state);
|
|
state->idle = 1;
|
|
state->nextevent = t;
|
|
if (!periodic)
|
|
loadtimer(now, 0);
|
|
ET_HW_UNLOCK(state);
|
|
return (MAX(t - now, 0));
|
|
}
|
|
|
|
/*
|
|
* Switch to active mode (skip empty ticks).
|
|
*/
|
|
void
|
|
cpu_activeclock(void)
|
|
{
|
|
sbintime_t now;
|
|
struct pcpu_state *state;
|
|
struct thread *td;
|
|
|
|
state = DPCPU_PTR(timerstate);
|
|
if (state->idle == 0 || busy)
|
|
return;
|
|
if (periodic)
|
|
now = state->now;
|
|
else
|
|
now = sbinuptime();
|
|
CTR3(KTR_SPARE2, "active at %d: now %d.%08x",
|
|
curcpu, (int)(now >> 32), (u_int)(now & 0xffffffff));
|
|
spinlock_enter();
|
|
td = curthread;
|
|
td->td_intr_nesting_level++;
|
|
handleevents(now, 1);
|
|
td->td_intr_nesting_level--;
|
|
spinlock_exit();
|
|
}
|
|
|
|
/*
|
|
* Change the frequency of the given timer. This changes et->et_frequency and
|
|
* if et is the active timer it reconfigures the timer on all CPUs. This is
|
|
* intended to be a private interface for the use of et_change_frequency() only.
|
|
*/
|
|
void
|
|
cpu_et_frequency(struct eventtimer *et, uint64_t newfreq)
|
|
{
|
|
|
|
ET_LOCK();
|
|
if (et == timer) {
|
|
configtimer(0);
|
|
et->et_frequency = newfreq;
|
|
configtimer(1);
|
|
} else
|
|
et->et_frequency = newfreq;
|
|
ET_UNLOCK();
|
|
}
|
|
|
|
void
|
|
cpu_new_callout(int cpu, sbintime_t bt, sbintime_t bt_opt)
|
|
{
|
|
struct pcpu_state *state;
|
|
|
|
/* Do not touch anything if somebody reconfiguring timers. */
|
|
if (busy)
|
|
return;
|
|
CTR6(KTR_SPARE2, "new co at %d: on %d at %d.%08x - %d.%08x",
|
|
curcpu, cpu, (int)(bt_opt >> 32), (u_int)(bt_opt & 0xffffffff),
|
|
(int)(bt >> 32), (u_int)(bt & 0xffffffff));
|
|
state = DPCPU_ID_PTR(cpu, timerstate);
|
|
ET_HW_LOCK(state);
|
|
|
|
/*
|
|
* If there is callout time already set earlier -- do nothing.
|
|
* This check may appear redundant because we check already in
|
|
* callout_process() but this double check guarantees we're safe
|
|
* with respect to race conditions between interrupts execution
|
|
* and scheduling.
|
|
*/
|
|
state->nextcallopt = bt_opt;
|
|
if (bt >= state->nextcall)
|
|
goto done;
|
|
state->nextcall = bt;
|
|
/* If there is some other event set earlier -- do nothing. */
|
|
if (bt >= state->nextevent)
|
|
goto done;
|
|
state->nextevent = bt;
|
|
/* If timer is periodic -- there is nothing to reprogram. */
|
|
if (periodic)
|
|
goto done;
|
|
/* If timer is global or of the current CPU -- reprogram it. */
|
|
if ((timer->et_flags & ET_FLAGS_PERCPU) == 0 || cpu == curcpu) {
|
|
loadtimer(sbinuptime(), 0);
|
|
done:
|
|
ET_HW_UNLOCK(state);
|
|
return;
|
|
}
|
|
/* Otherwise make other CPU to reprogram it. */
|
|
state->handle = 1;
|
|
ET_HW_UNLOCK(state);
|
|
#ifdef SMP
|
|
ipi_cpu(cpu, IPI_HARDCLOCK);
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Report or change the active event timers hardware.
|
|
*/
|
|
static int
|
|
sysctl_kern_eventtimer_timer(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
char buf[32];
|
|
struct eventtimer *et;
|
|
int error;
|
|
|
|
ET_LOCK();
|
|
et = timer;
|
|
snprintf(buf, sizeof(buf), "%s", et->et_name);
|
|
ET_UNLOCK();
|
|
error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
|
|
ET_LOCK();
|
|
et = timer;
|
|
if (error != 0 || req->newptr == NULL ||
|
|
strcasecmp(buf, et->et_name) == 0) {
|
|
ET_UNLOCK();
|
|
return (error);
|
|
}
|
|
et = et_find(buf, 0, 0);
|
|
if (et == NULL) {
|
|
ET_UNLOCK();
|
|
return (ENOENT);
|
|
}
|
|
configtimer(0);
|
|
et_free(timer);
|
|
if (et->et_flags & ET_FLAGS_C3STOP)
|
|
cpu_disable_c3_sleep++;
|
|
if (timer->et_flags & ET_FLAGS_C3STOP)
|
|
cpu_disable_c3_sleep--;
|
|
periodic = want_periodic;
|
|
timer = et;
|
|
et_init(timer, timercb, NULL, NULL);
|
|
configtimer(1);
|
|
ET_UNLOCK();
|
|
return (error);
|
|
}
|
|
SYSCTL_PROC(_kern_eventtimer, OID_AUTO, timer,
|
|
CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE,
|
|
0, 0, sysctl_kern_eventtimer_timer, "A", "Chosen event timer");
|
|
|
|
/*
|
|
* Report or change the active event timer periodicity.
|
|
*/
|
|
static int
|
|
sysctl_kern_eventtimer_periodic(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
int error, val;
|
|
|
|
val = periodic;
|
|
error = sysctl_handle_int(oidp, &val, 0, req);
|
|
if (error != 0 || req->newptr == NULL)
|
|
return (error);
|
|
ET_LOCK();
|
|
configtimer(0);
|
|
periodic = want_periodic = val;
|
|
configtimer(1);
|
|
ET_UNLOCK();
|
|
return (error);
|
|
}
|
|
SYSCTL_PROC(_kern_eventtimer, OID_AUTO, periodic,
|
|
CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE,
|
|
0, 0, sysctl_kern_eventtimer_periodic, "I", "Enable event timer periodic mode");
|
|
|
|
#include "opt_ddb.h"
|
|
|
|
#ifdef DDB
|
|
#include <ddb/ddb.h>
|
|
|
|
DB_SHOW_COMMAND(clocksource, db_show_clocksource)
|
|
{
|
|
struct pcpu_state *st;
|
|
int c;
|
|
|
|
CPU_FOREACH(c) {
|
|
st = DPCPU_ID_PTR(c, timerstate);
|
|
db_printf(
|
|
"CPU %2d: action %d handle %d ipi %d idle %d\n"
|
|
" now %#jx nevent %#jx (%jd)\n"
|
|
" ntick %#jx (%jd) nhard %#jx (%jd)\n"
|
|
" nstat %#jx (%jd) nprof %#jx (%jd)\n"
|
|
" ncall %#jx (%jd) ncallopt %#jx (%jd)\n",
|
|
c, st->action, st->handle, st->ipi, st->idle,
|
|
(uintmax_t)st->now,
|
|
(uintmax_t)st->nextevent,
|
|
(uintmax_t)(st->nextevent - st->now) / tick_sbt,
|
|
(uintmax_t)st->nexttick,
|
|
(uintmax_t)(st->nexttick - st->now) / tick_sbt,
|
|
(uintmax_t)st->nexthard,
|
|
(uintmax_t)(st->nexthard - st->now) / tick_sbt,
|
|
(uintmax_t)st->nextstat,
|
|
(uintmax_t)(st->nextstat - st->now) / tick_sbt,
|
|
(uintmax_t)st->nextprof,
|
|
(uintmax_t)(st->nextprof - st->now) / tick_sbt,
|
|
(uintmax_t)st->nextcall,
|
|
(uintmax_t)(st->nextcall - st->now) / tick_sbt,
|
|
(uintmax_t)st->nextcallopt,
|
|
(uintmax_t)(st->nextcallopt - st->now) / tick_sbt);
|
|
}
|
|
}
|
|
|
|
#endif
|