Adrian Chadd 05e486c71e Sign-extend the 48-bit AMD PMC counter before treating it to a 64-bit ... 2's compliment. The 2's compliment transform is done so a "count down" sampling interval can be converted into a "count up" PMC value. a 2's complimented 'count down' value is written to the PMC counter; then the read-back counter is reverted via another 2's compliment. PR: kern/121660 Reviewed by: jkoshy Approved by: jkoshy MFC after: 1 week		2008-03-18 08:39:11 +00:00
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hwpmc_amd.c	Sign-extend the 48-bit AMD PMC counter before treating it to a 64-bit	2008-03-18 08:39:11 +00:00
hwpmc_amd.h
hwpmc_arm.c
hwpmc_ia64.c
hwpmc_logging.c
hwpmc_mod.c
hwpmc_pentium.c
hwpmc_pentium.h
hwpmc_piv.c
hwpmc_piv.h
hwpmc_powerpc.c
hwpmc_ppro.c
hwpmc_ppro.h
hwpmc_sparc64.c
hwpmc_x86.c
pmc_events.h