f9e26776a6
doesn't automatically clear when VDD rises above Vlow again and needs to be cleared manually. However, apparently this needs all of the time registers to be set, i.e. pcf8563_settime(), and not just PCF8563_R_SECOND in order for PCF8563_R_SECOND_VL to stick. Thus, we just issue a warning during pcf8563_attach() rather than failing with ENXIO in case it is set. MFC after: 3 days |
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.. | ||
ad7417.c | ||
ad7418.c | ||
ds133x.c | ||
ds1374.c | ||
ds1631.c | ||
ds1672.c | ||
ds1775.c | ||
icee.c | ||
if_ic.c | ||
iic.c | ||
iic.h | ||
iicbb_if.m | ||
iicbb.c | ||
iicbus_if.m | ||
iicbus.c | ||
iicbus.h | ||
iicoc.c | ||
iicoc.h | ||
iiconf.c | ||
iiconf.h | ||
iicsmb.c | ||
max6690.c | ||
pcf8563.c | ||
pcf8563reg.h | ||
s35390a.c |