Jung-uk Kim 450d86fc7f Assume all TSCs are synchronized for AMD Family 17h processors and later ... when it has passed the synchronization test. "Processor Programming Reference (PPR) for AMD Family 17h" states that the TSC uses a common reference for all sockets, cores and threads. MFC after: 1 month		2020-06-22 20:42:58 +00:00
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acpica
bios
conf
cpufreq
include	Control for Special Register Buffer Data Sampling mitigation.	2020-06-12 22:14:45 +00:00
iommu	Rename dmar_get_dma_tag() to acpi_iommu_get_dma_tag().	2020-05-26 16:40:40 +00:00
isa
pci
x86	Assume all TSCs are synchronized for AMD Family 17h processors and later	2020-06-22 20:42:58 +00:00
xen	xenpv: do not use low 1MB for Xen mappings on i386	2020-05-28 08:18:34 +00:00