d3c7b9a08a
Bring in a driver for the LSI Logic MPT2 6Gb SAS controllers. This driver supports basic I/O, and works with SAS and SATA drives and expanders. Basic error recovery works (i.e. timeouts and aborts) as well. Integrated RAID isn't supported yet, and there are some known bugs. So this isn't ready for production use, but is certainly ready for testing and additional development. For the moment, new commits to this driver should go into the FreeBSD Perforce repository first (//depot/projects/mps/...) and then get merged into -current once they've been vetted. This has only been added to the amd64 GENERIC, since that is the only architecture I have tested this driver with. Submitted by: scottl Discussed with: imp, gibbs, will Sponsored by: Yahoo, Spectra Logic Corporation
87 lines
3.7 KiB
C
87 lines
3.7 KiB
C
/* $FreeBSD$ */
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/*
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* Copyright (c) 2009 LSI Corporation.
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*
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*
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* Name: mpi2_ra.h
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* Title: MPI RAID Accelerator messages and structures
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* Creation Date: April 13, 2009
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*
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* mpi2_ra.h Version: 02.00.00
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*
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* Version History
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* ---------------
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*
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* Date Version Description
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* -------- -------- ------------------------------------------------------
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* 05-06-09 02.00.00 Initial version.
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* --------------------------------------------------------------------------
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*/
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#ifndef MPI2_RA_H
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#define MPI2_RA_H
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/* generic structure for RAID Accelerator Control Block */
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typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK
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{
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U32 Reserved[8]; /* 0x00 */
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U32 RaidAcceleratorCDB[1]; /* 0x20 */
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} MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
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MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
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Mpi2RAIDAcceleratorControlBlock_t,
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MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t;
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/******************************************************************************
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*
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* RAID Accelerator Messages
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*
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*******************************************************************************/
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/* RAID Accelerator Request Message */
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typedef struct _MPI2_RAID_ACCELERATOR_REQUEST
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{
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U16 Reserved0; /* 0x00 */
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U8 ChainOffset; /* 0x02 */
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U8 Function; /* 0x03 */
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U16 Reserved1; /* 0x04 */
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U8 Reserved2; /* 0x06 */
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U8 MsgFlags; /* 0x07 */
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U8 VP_ID; /* 0x08 */
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U8 VF_ID; /* 0x09 */
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U16 Reserved3; /* 0x0A */
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U64 RaidAcceleratorControlBlockAddress; /* 0x0C */
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U8 DmaEngineNumber; /* 0x14 */
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U8 Reserved4; /* 0x15 */
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U16 Reserved5; /* 0x16 */
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U32 Reserved6; /* 0x18 */
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U32 Reserved7; /* 0x1C */
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U32 Reserved8; /* 0x20 */
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} MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST,
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Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t;
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/* RAID Accelerator Error Reply Message */
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typedef struct _MPI2_RAID_ACCELERATOR_REPLY
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{
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U16 Reserved0; /* 0x00 */
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U8 MsgLength; /* 0x02 */
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U8 Function; /* 0x03 */
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U16 Reserved1; /* 0x04 */
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U8 Reserved2; /* 0x06 */
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U8 MsgFlags; /* 0x07 */
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U8 VP_ID; /* 0x08 */
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U8 VF_ID; /* 0x09 */
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U16 Reserved3; /* 0x0A */
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U16 Reserved4; /* 0x0C */
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U16 IOCStatus; /* 0x0E */
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U32 IOCLogInfo; /* 0x10 */
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U32 ProductSpecificData[3]; /* 0x14 */
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} MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY,
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Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t;
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#endif
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