freebsd-dev/sys/dev/pci
Peter Wemm 0d2a298904 Initial landing of SMP support for FreeBSD/amd64.
- This is heavily derived from John Baldwin's apic/pci cleanup on i386.
- I have completely rewritten or drastically cleaned up some other parts.
  (in particular, bootstrap)
- This is still a WIP.  It seems that there are some highly bogus bioses
  on nVidia nForce3-150 boards.  I can't stress how broken these boards
  are.  I have a workaround in mind, but right now the Asus SK8N is broken.
  The Gigabyte K8NPro (nVidia based) is also mind-numbingly hosed.
- Most of my testing has been with SCHED_ULE.  SCHED_4BSD works.
- the apic and acpi components are 'standard'.
- If you have an nVidia nForce3-150 board, you are stuck with 'device
  atpic' in addition, because they somehow managed to forget to connect the
  8254 timer to the apic, even though its in the same silicon!  ARGH!
  This directly violates the ACPI spec.
2003-11-17 08:58:16 +00:00
..
eisa_pci.c Use __FBSDID(). 2003-08-24 17:55:58 +00:00
fixup_pci.c Use __FBSDID(). 2003-08-24 17:55:58 +00:00
ignore_pci.c Use __FBSDID(). 2003-08-24 17:55:58 +00:00
isa_pci.c Use __FBSDID(). 2003-08-24 17:55:58 +00:00
pci_if.m Add a new PCI interface method, assign_interrupt, to determine the 2003-07-01 14:08:33 +00:00
pci_pci.c Change all SYSCTLS which are readonly and have a related TUNABLE 2003-10-21 18:28:36 +00:00
pci_private.h Add pci_resume() to reestablish interrupt routing after 2003-09-17 08:32:44 +00:00
pci_user.c The code that was meant to test alignment of the register offset 2003-10-11 22:20:34 +00:00
pci.c Initial landing of SMP support for FreeBSD/amd64. 2003-11-17 08:58:16 +00:00
pcib_if.m - Fix the device database parsing code so that it actually works. 2000-12-09 09:15:38 +00:00
pcib_private.h Prefer the uintXX_t to the u_intXX_t names. 2003-08-22 03:11:53 +00:00
pcireg.h Teach the PCI code to parse MSI extended capabilities. Re-arrange the 2003-09-14 19:30:00 +00:00
pcivar.h Teach the PCI code to parse MSI extended capabilities. Re-arrange the 2003-09-14 19:30:00 +00:00