This is stuff I've been running for a couple years. It's inspired by changes I found in the linux ag71xx ethernet driver. * Delay between stopping DMA and checking to see if it's stopped; this gives the hardware time to do its thing. * Non-final frames in the chain need to be a multiple of 4 bytes in size. Ensure this is the case when assembling a TX DMA list. * Add counters for tx/rx underflow and too-short packets. * Log if TX/RX DMA couldn't be stopped when resetting the MAC. * Add some more debugging / logging around TX/RX ring bits. Tested: * AR7240, AR7241 * AR9344 (TL-WDR3600/TL-WDR4300 APs) * AR9331 (Carambola 2) |
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