1014 lines
26 KiB
Plaintext
1014 lines
26 KiB
Plaintext
/*
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* at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
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*
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* Copyright (C) 2011 Atmel,
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* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
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* 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* Licensed under GPLv2 or later.
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/at91.h>
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/ {
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model = "Atmel AT91SAM9260 family SoC";
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compatible = "atmel,at91sam9260";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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serial4 = &usart3;
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serial5 = &uart0;
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serial6 = &uart1;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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tcb0 = &tcb0;
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tcb1 = &tcb1;
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i2c0 = &i2c0;
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ssc0 = &ssc0;
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};
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cpus {
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#address-cells = <0>;
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#size-cells = <0>;
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cpu {
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compatible = "arm,arm926ej-s";
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device_type = "cpu";
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};
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};
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memory {
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reg = <0x20000000 0x04000000>;
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};
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clocks {
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slow_xtal: slow_xtal {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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main_xtal: main_xtal {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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adc_op_clk: adc_op_clk{
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <5000000>;
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};
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <3>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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atmel,external-irqs = <29 30 31>;
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};
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ramc0: ramc@ffffea00 {
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compatible = "atmel,at91sam9260-sdramc";
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reg = <0xffffea00 0x200>;
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};
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91sam9260-pmc";
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reg = <0xfffffc00 0x100>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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interrupt-controller;
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#address-cells = <1>;
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#size-cells = <0>;
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#interrupt-cells = <1>;
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main_osc: main_osc {
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compatible = "atmel,at91rm9200-clk-main-osc";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_MOSCS>;
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clocks = <&main_xtal>;
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};
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main: mainck {
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compatible = "atmel,at91rm9200-clk-main";
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#clock-cells = <0>;
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clocks = <&main_osc>;
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};
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slow_rc_osc: slow_rc_osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-accuracy = <50000000>;
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};
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clk32k: slck {
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compatible = "atmel,at91sam9260-clk-slow";
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#clock-cells = <0>;
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clocks = <&slow_rc_osc>, <&slow_xtal>;
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};
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plla: pllack {
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compatible = "atmel,at91rm9200-clk-pll";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_LOCKA>;
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clocks = <&main>;
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reg = <0>;
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atmel,clk-input-range = <1000000 32000000>;
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#atmel,pll-clk-output-range-cells = <4>;
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atmel,pll-clk-output-ranges = <80000000 160000000 0 1>,
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<150000000 240000000 2 1>;
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};
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pllb: pllbck {
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compatible = "atmel,at91rm9200-clk-pll";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_LOCKB>;
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clocks = <&main>;
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reg = <1>;
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atmel,clk-input-range = <1000000 5000000>;
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#atmel,pll-clk-output-range-cells = <4>;
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atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
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};
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mck: masterck {
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compatible = "atmel,at91rm9200-clk-master";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
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clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
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atmel,clk-output-range = <0 105000000>;
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atmel,clk-divisors = <1 2 4 0>;
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};
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usb: usbck {
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compatible = "atmel,at91rm9200-clk-usb";
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#clock-cells = <0>;
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atmel,clk-divisors = <1 2 4 0>;
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clocks = <&pllb>;
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};
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prog: progck {
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compatible = "atmel,at91rm9200-clk-programmable";
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&pmc>;
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clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
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prog0: prog0 {
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#clock-cells = <0>;
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reg = <0>;
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interrupts = <AT91_PMC_PCKRDY(0)>;
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};
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prog1: prog1 {
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#clock-cells = <0>;
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reg = <1>;
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interrupts = <AT91_PMC_PCKRDY(1)>;
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};
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};
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systemck {
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compatible = "atmel,at91rm9200-clk-system";
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#address-cells = <1>;
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#size-cells = <0>;
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uhpck: uhpck {
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#clock-cells = <0>;
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reg = <6>;
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clocks = <&usb>;
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};
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udpck: udpck {
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#clock-cells = <0>;
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reg = <7>;
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clocks = <&usb>;
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};
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pck0: pck0 {
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#clock-cells = <0>;
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reg = <8>;
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clocks = <&prog0>;
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};
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pck1: pck1 {
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#clock-cells = <0>;
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reg = <9>;
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clocks = <&prog1>;
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};
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};
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periphck {
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compatible = "atmel,at91rm9200-clk-peripheral";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&mck>;
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pioA_clk: pioA_clk {
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#clock-cells = <0>;
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reg = <2>;
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};
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pioB_clk: pioB_clk {
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#clock-cells = <0>;
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reg = <3>;
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};
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pioC_clk: pioC_clk {
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#clock-cells = <0>;
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reg = <4>;
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};
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adc_clk: adc_clk {
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#clock-cells = <0>;
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reg = <5>;
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};
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usart0_clk: usart0_clk {
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#clock-cells = <0>;
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reg = <6>;
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};
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usart1_clk: usart1_clk {
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#clock-cells = <0>;
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reg = <7>;
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};
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usart2_clk: usart2_clk {
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#clock-cells = <0>;
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reg = <8>;
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};
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mci0_clk: mci0_clk {
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#clock-cells = <0>;
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reg = <9>;
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};
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udc_clk: udc_clk {
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#clock-cells = <0>;
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reg = <10>;
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};
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twi0_clk: twi0_clk {
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reg = <11>;
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#clock-cells = <0>;
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};
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spi0_clk: spi0_clk {
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#clock-cells = <0>;
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reg = <12>;
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};
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spi1_clk: spi1_clk {
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#clock-cells = <0>;
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reg = <13>;
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};
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ssc0_clk: ssc0_clk {
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#clock-cells = <0>;
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reg = <14>;
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};
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tc0_clk: tc0_clk {
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#clock-cells = <0>;
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reg = <17>;
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};
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tc1_clk: tc1_clk {
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#clock-cells = <0>;
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reg = <18>;
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};
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tc2_clk: tc2_clk {
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#clock-cells = <0>;
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reg = <19>;
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};
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ohci_clk: ohci_clk {
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#clock-cells = <0>;
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reg = <20>;
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};
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macb0_clk: macb0_clk {
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#clock-cells = <0>;
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reg = <21>;
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};
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isi_clk: isi_clk {
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#clock-cells = <0>;
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reg = <22>;
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};
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usart3_clk: usart3_clk {
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#clock-cells = <0>;
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reg = <23>;
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};
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uart0_clk: uart0_clk {
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#clock-cells = <0>;
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reg = <24>;
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};
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uart1_clk: uart1_clk {
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#clock-cells = <0>;
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reg = <25>;
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};
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tc3_clk: tc3_clk {
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#clock-cells = <0>;
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reg = <26>;
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};
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tc4_clk: tc4_clk {
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#clock-cells = <0>;
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reg = <27>;
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};
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tc5_clk: tc5_clk {
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#clock-cells = <0>;
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reg = <28>;
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};
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};
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};
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rstc@fffffd00 {
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compatible = "atmel,at91sam9260-rstc";
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reg = <0xfffffd00 0x10>;
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};
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shdwc@fffffd10 {
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compatible = "atmel,at91sam9260-shdwc";
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reg = <0xfffffd10 0x10>;
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};
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pit: timer@fffffd30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffd30 0xf>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&mck>;
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};
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tcb0: timer@fffa0000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfffa0000 0x100>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
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18 IRQ_TYPE_LEVEL_HIGH 0
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19 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
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clock-names = "t0_clk", "t1_clk", "t2_clk";
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};
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tcb1: timer@fffdc000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfffdc000 0x100>;
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interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
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27 IRQ_TYPE_LEVEL_HIGH 0
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28 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>;
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clock-names = "t0_clk", "t1_clk", "t2_clk";
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};
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pinctrl@fffff400 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
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ranges = <0xfffff400 0xfffff400 0x600>;
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atmel,mux-mask = <
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/* A B */
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0xffffffff 0xffc00c3b /* pioA */
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0xffffffff 0x7fff3ccf /* pioB */
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0xffffffff 0x007fffff /* pioC */
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>;
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/* shared pinctrl settings */
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
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AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */
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};
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};
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usart0 {
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pinctrl_usart0: usart0-0 {
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atmel,pins =
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<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
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AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
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};
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pinctrl_usart0_rts: usart0_rts-0 {
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atmel,pins =
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<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
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};
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pinctrl_usart0_cts: usart0_cts-0 {
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atmel,pins =
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<AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
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};
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pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
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atmel,pins =
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<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
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AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
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};
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pinctrl_usart0_dcd: usart0_dcd-0 {
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atmel,pins =
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<AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
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};
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pinctrl_usart0_ri: usart0_ri-0 {
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atmel,pins =
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<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
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};
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};
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usart1 {
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pinctrl_usart1: usart1-0 {
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atmel,pins =
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<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
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AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
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};
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pinctrl_usart1_rts: usart1_rts-0 {
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atmel,pins =
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<AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
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};
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pinctrl_usart1_cts: usart1_cts-0 {
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atmel,pins =
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<AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
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};
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};
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usart2 {
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pinctrl_usart2: usart2-0 {
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atmel,pins =
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<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
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AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
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};
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pinctrl_usart2_rts: usart2_rts-0 {
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atmel,pins =
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<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
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};
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pinctrl_usart2_cts: usart2_cts-0 {
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atmel,pins =
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<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
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};
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};
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usart3 {
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pinctrl_usart3: usart3-0 {
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atmel,pins =
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<AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */
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AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
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};
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pinctrl_usart3_rts: usart3_rts-0 {
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atmel,pins =
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<AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */
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};
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pinctrl_usart3_cts: usart3_cts-0 {
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atmel,pins =
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<AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */
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};
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};
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */
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AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */
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AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
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};
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};
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nand {
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pinctrl_nand: nand-0 {
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atmel,pins =
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<AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */
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|
AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
|
|
};
|
|
};
|
|
|
|
macb {
|
|
pinctrl_macb_rmii: macb_rmii-0 {
|
|
atmel,pins =
|
|
<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
|
|
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
|
|
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
|
|
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
|
|
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
|
|
AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
|
|
AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
|
|
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
|
|
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
|
|
AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
|
|
};
|
|
|
|
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
|
|
atmel,pins =
|
|
<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
|
|
AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
|
|
AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
|
|
AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
|
|
AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
|
|
AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
|
|
AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
|
|
AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
|
|
};
|
|
|
|
pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
|
|
atmel,pins =
|
|
<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
|
|
AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
|
|
AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
|
|
AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
|
|
AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
|
|
AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
|
|
AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
|
|
AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
|
|
};
|
|
};
|
|
|
|
mmc0 {
|
|
pinctrl_mmc0_clk: mmc0_clk-0 {
|
|
atmel,pins =
|
|
<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
|
|
};
|
|
|
|
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
|
|
atmel,pins =
|
|
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
|
|
AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
|
|
};
|
|
|
|
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
|
atmel,pins =
|
|
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
|
|
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
|
|
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
|
|
};
|
|
|
|
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
|
|
atmel,pins =
|
|
<AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
|
|
AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
|
|
};
|
|
|
|
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
|
|
atmel,pins =
|
|
<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
|
|
AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
|
|
AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
|
|
};
|
|
};
|
|
|
|
ssc0 {
|
|
pinctrl_ssc0_tx: ssc0_tx-0 {
|
|
atmel,pins =
|
|
<AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
|
|
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
|
|
AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
|
|
};
|
|
|
|
pinctrl_ssc0_rx: ssc0_rx-0 {
|
|
atmel,pins =
|
|
<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
|
|
AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
|
|
AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
|
|
};
|
|
};
|
|
|
|
spi0 {
|
|
pinctrl_spi0: spi0-0 {
|
|
atmel,pins =
|
|
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
|
|
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
|
|
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
|
|
};
|
|
};
|
|
|
|
spi1 {
|
|
pinctrl_spi1: spi1-0 {
|
|
atmel,pins =
|
|
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
|
|
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
|
|
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
|
|
};
|
|
};
|
|
|
|
i2c_gpio0 {
|
|
pinctrl_i2c_gpio0: i2c_gpio0-0 {
|
|
atmel,pins =
|
|
<AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
|
|
AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
|
|
};
|
|
};
|
|
|
|
tcb0 {
|
|
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
|
|
atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
|
|
atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
|
|
atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
|
|
atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
|
|
atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
|
|
atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
|
|
atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
|
|
atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
|
|
atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
|
};
|
|
};
|
|
|
|
tcb1 {
|
|
pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
|
|
atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
|
|
atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
|
|
atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
|
|
atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
|
|
atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
|
|
atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
|
|
atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
|
|
atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
|
|
atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
};
|
|
|
|
pioA: gpio@fffff400 {
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
reg = <0xfffff400 0x200>;
|
|
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
clocks = <&pioA_clk>;
|
|
};
|
|
|
|
pioB: gpio@fffff600 {
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
reg = <0xfffff600 0x200>;
|
|
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
clocks = <&pioB_clk>;
|
|
};
|
|
|
|
pioC: gpio@fffff800 {
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
reg = <0xfffff800 0x200>;
|
|
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
clocks = <&pioC_clk>;
|
|
};
|
|
};
|
|
|
|
dbgu: serial@fffff200 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfffff200 0x200>;
|
|
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_dbgu>;
|
|
clocks = <&mck>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
|
|
usart0: serial@fffb0000 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfffb0000 0x200>;
|
|
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usart0>;
|
|
clocks = <&usart0_clk>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
|
|
usart1: serial@fffb4000 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfffb4000 0x200>;
|
|
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usart1>;
|
|
clocks = <&usart1_clk>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
|
|
usart2: serial@fffb8000 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfffb8000 0x200>;
|
|
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usart2>;
|
|
clocks = <&usart2_clk>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
|
|
usart3: serial@fffd0000 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfffd0000 0x200>;
|
|
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usart3>;
|
|
clocks = <&usart3_clk>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
|
|
uart0: serial@fffd4000 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfffd4000 0x200>;
|
|
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart0>;
|
|
clocks = <&uart0_clk>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
|
|
uart1: serial@fffd8000 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfffd8000 0x200>;
|
|
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
clocks = <&uart1_clk>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
|
|
macb0: ethernet@fffc4000 {
|
|
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
|
reg = <0xfffc4000 0x100>;
|
|
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_macb_rmii>;
|
|
clocks = <&macb0_clk>, <&macb0_clk>;
|
|
clock-names = "hclk", "pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
usb1: gadget@fffa4000 {
|
|
compatible = "atmel,at91rm9200-udc";
|
|
reg = <0xfffa4000 0x4000>;
|
|
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
|
|
clocks = <&udc_clk>, <&udpck>;
|
|
clock-names = "pclk", "hclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c0: i2c@fffac000 {
|
|
compatible = "atmel,at91sam9260-i2c";
|
|
reg = <0xfffac000 0x100>;
|
|
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clocks = <&twi0_clk>;
|
|
status = "disabled";
|
|
};
|
|
|
|
mmc0: mmc@fffa8000 {
|
|
compatible = "atmel,hsmci";
|
|
reg = <0xfffa8000 0x600>;
|
|
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
pinctrl-names = "default";
|
|
clocks = <&mci0_clk>;
|
|
clock-names = "mci_clk";
|
|
status = "disabled";
|
|
};
|
|
|
|
ssc0: ssc@fffbc000 {
|
|
compatible = "atmel,at91rm9200-ssc";
|
|
reg = <0xfffbc000 0x4000>;
|
|
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
|
clocks = <&ssc0_clk>;
|
|
clock-names = "pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
spi0: spi@fffc8000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "atmel,at91rm9200-spi";
|
|
reg = <0xfffc8000 0x200>;
|
|
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_spi0>;
|
|
clocks = <&spi0_clk>;
|
|
clock-names = "spi_clk";
|
|
status = "disabled";
|
|
};
|
|
|
|
spi1: spi@fffcc000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "atmel,at91rm9200-spi";
|
|
reg = <0xfffcc000 0x200>;
|
|
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_spi1>;
|
|
clocks = <&spi1_clk>;
|
|
clock-names = "spi_clk";
|
|
status = "disabled";
|
|
};
|
|
|
|
adc0: adc@fffe0000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "atmel,at91sam9260-adc";
|
|
reg = <0xfffe0000 0x100>;
|
|
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
|
|
clocks = <&adc_clk>, <&adc_op_clk>;
|
|
clock-names = "adc_clk", "adc_op_clk";
|
|
atmel,adc-use-external-triggers;
|
|
atmel,adc-channels-used = <0xf>;
|
|
atmel,adc-vref = <3300>;
|
|
atmel,adc-startup-time = <15>;
|
|
atmel,adc-res = <8 10>;
|
|
atmel,adc-res-names = "lowres", "highres";
|
|
atmel,adc-use-res = "highres";
|
|
|
|
trigger@0 {
|
|
reg = <0>;
|
|
trigger-name = "timer-counter-0";
|
|
trigger-value = <0x1>;
|
|
};
|
|
trigger@1 {
|
|
reg = <1>;
|
|
trigger-name = "timer-counter-1";
|
|
trigger-value = <0x3>;
|
|
};
|
|
|
|
trigger@2 {
|
|
reg = <2>;
|
|
trigger-name = "timer-counter-2";
|
|
trigger-value = <0x5>;
|
|
};
|
|
|
|
trigger@3 {
|
|
reg = <3>;
|
|
trigger-name = "external";
|
|
trigger-value = <0xd>;
|
|
trigger-external;
|
|
};
|
|
};
|
|
|
|
watchdog@fffffd40 {
|
|
compatible = "atmel,at91sam9260-wdt";
|
|
reg = <0xfffffd40 0x10>;
|
|
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
|
atmel,watchdog-type = "hardware";
|
|
atmel,reset-type = "all";
|
|
atmel,dbg-halt;
|
|
atmel,idle-halt;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
nand0: nand@40000000 {
|
|
compatible = "atmel,at91rm9200-nand";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x40000000 0x10000000
|
|
0xffffe800 0x200
|
|
>;
|
|
atmel,nand-addr-offset = <21>;
|
|
atmel,nand-cmd-offset = <22>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_nand>;
|
|
gpios = <&pioC 13 GPIO_ACTIVE_HIGH
|
|
&pioC 14 GPIO_ACTIVE_HIGH
|
|
0
|
|
>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb0: ohci@00500000 {
|
|
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
|
reg = <0x00500000 0x100000>;
|
|
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
|
|
clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
|
|
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
i2c@0 {
|
|
compatible = "i2c-gpio";
|
|
gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
|
|
&pioA 24 GPIO_ACTIVE_HIGH /* scl */
|
|
>;
|
|
i2c-gpio,sda-open-drain;
|
|
i2c-gpio,scl-open-drain;
|
|
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c_gpio0>;
|
|
status = "disabled";
|
|
};
|
|
};
|