55 lines
1.9 KiB
Diff
55 lines
1.9 KiB
Diff
Pull in r198149 from upstream llvm trunk (by Venkatraman Govindaraju):
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[SparcV9] For codegen generated library calls that return float, set inreg flag manually in LowerCall().
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This makes the sparc backend to generate Sparc64 ABI compliant code.
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Introduced here: http://svnweb.freebsd.org/changeset/base/262261
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Index: lib/Target/Sparc/SparcISelLowering.cpp
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===================================================================
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--- lib/Target/Sparc/SparcISelLowering.cpp
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+++ lib/Target/Sparc/SparcISelLowering.cpp
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@@ -1252,6 +1252,12 @@ SparcTargetLowering::LowerCall_64(TargetLowering::
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SmallVector<CCValAssign, 16> RVLocs;
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CCState RVInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(),
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DAG.getTarget(), RVLocs, *DAG.getContext());
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+
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+ // Set inreg flag manually for codegen generated library calls that
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+ // return float.
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+ if (CLI.Ins.size() == 1 && CLI.Ins[0].VT == MVT::f32 && CLI.CS == 0)
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+ CLI.Ins[0].Flags.setInReg();
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+
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RVInfo.AnalyzeCallResult(CLI.Ins, CC_Sparc64);
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// Copy all of the result registers out of their specified physreg.
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Index: test/CodeGen/SPARC/64abi.ll
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===================================================================
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--- test/CodeGen/SPARC/64abi.ll
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+++ test/CodeGen/SPARC/64abi.ll
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@@ -440,4 +440,25 @@ entry:
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ret i64 %0
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}
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+; CHECK-LABEL: test_call_libfunc
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+; CHECK: st %f1, [%fp+[[Offset0:[0-9]+]]]
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+; CHECK: fmovs %f3, %f1
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+; CHECK: call cosf
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+; CHECK: st %f0, [%fp+[[Offset1:[0-9]+]]]
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+; CHECK: ld [%fp+[[Offset0]]], %f1
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+; CHECK: call sinf
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+; CHECK: ld [%fp+[[Offset1]]], %f1
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+; CHECK: fmuls %f1, %f0, %f0
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+define inreg float @test_call_libfunc(float %arg0, float %arg1) {
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+entry:
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+ %0 = tail call inreg float @cosf(float %arg1)
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+ %1 = tail call inreg float @sinf(float %arg0)
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+ %2 = fmul float %0, %1
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+ ret float %2
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+}
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+
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+declare inreg float @cosf(float %arg) readnone nounwind
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+declare inreg float @sinf(float %arg) readnone nounwind
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+
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+
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