This patch adds support for MSI-X interrupts on Annapurna Alpine platform. MSI-X on Alpine work similarly to GICv2m, i.e. some range of SPI interrupts is reserved in GIC and individual SPIs can be triggered by MSI-X messages. This SPI range is defined in FDT. Obtained from: Semihalf Submitted by: Michal Stanek <mst@semihalf.com> Sponsored by: Annapurna Labs Reviewed by: nwhitehorn, wma Differential Revision: https://reviews.freebsd.org/D7579 |
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alpine_ccu.c | ||
alpine_machdep_mp.c | ||
alpine_machdep.c | ||
alpine_nb_service.c | ||
alpine_pci_msix.c | ||
alpine_pci.c | ||
common.c | ||
files.alpine | ||
std.alpine |