e952166b53
The on-board NIC is an 3x3 AR9380 with 5GHz only. * enable pci code in AR9344_BASE * enable ath_pci and the firmware loading bits in DB120 * add in the relevant hints in DB120.hints to inform the probe/attach code where the PCIe fixup data is for the onboard chip. This is only relevant for a default development board. I also have a DB120 with the on-board PCIe wifi NIC disabled and it's exposed as a real PCIe slot (to put normal PCIe NICs in); the fixup code will need to be disabled to make this work correctly. Tested: * DB120
66 lines
1.6 KiB
Plaintext
66 lines
1.6 KiB
Plaintext
# This file (and the kernel config file accompanying it) are not designed
|
|
# to be used by themselves. Instead, users of this file should create a
|
|
# kernel # config file which includes this file (which gets the basic hints),
|
|
# then override the default options (adding devices as needed) and adding
|
|
# hints as needed (for example, the GPIO and LAN PHY.)
|
|
|
|
# $FreeBSD$
|
|
|
|
hint.apb.0.at="nexus0"
|
|
hint.apb.0.irq=4
|
|
|
|
# uart0
|
|
hint.uart.0.at="apb0"
|
|
# NB: This isn't an ns8250 UART
|
|
hint.uart.0.maddr=0x18020003
|
|
hint.uart.0.msize=0x18
|
|
hint.uart.0.irq=3
|
|
|
|
#ehci - note the 0x100 offset for the AR913x/AR724x
|
|
hint.ehci.0.at="nexus0"
|
|
hint.ehci.0.maddr=0x1b000100
|
|
hint.ehci.0.msize=0x00001000
|
|
hint.ehci.0.irq=1
|
|
|
|
# pci
|
|
hint.pcib.0.at="nexus0"
|
|
hint.pcib.0.irq=0
|
|
|
|
hint.arge.0.at="nexus0"
|
|
hint.arge.0.maddr=0x19000000
|
|
hint.arge.0.msize=0x1000
|
|
hint.arge.0.irq=2
|
|
|
|
hint.arge.1.at="nexus0"
|
|
hint.arge.1.maddr=0x1a000000
|
|
hint.arge.1.msize=0x1000
|
|
hint.arge.1.irq=3
|
|
|
|
# XXX The ath device hangs off of the AHB, rather than the Nexus.
|
|
hint.ath.0.at="nexus0"
|
|
hint.ath.0.maddr=0x18100000
|
|
hint.ath.0.msize=0x20000
|
|
hint.ath.0.irq=0
|
|
hint.ath.0.vendor_id=0x168c
|
|
hint.ath.0.device_id=0x0031
|
|
# Set this to define where the ath calibration data
|
|
# should be fetched from in physical memory.
|
|
# hint.ath.0.eepromaddr=0x1fff1000
|
|
|
|
# SPI flash
|
|
hint.spi.0.at="nexus0"
|
|
hint.spi.0.maddr=0x1f000000
|
|
hint.spi.0.msize=0x10
|
|
|
|
hint.mx25l.0.at="spibus0"
|
|
hint.mx25l.0.cs=0
|
|
|
|
# Watchdog
|
|
hint.ar71xx_wdog.0.at="nexus0"
|
|
|
|
# The GPIO function and pin mask is configured per-board
|
|
hint.gpio.0.at="apb0"
|
|
hint.gpio.0.maddr=0x18040000
|
|
hint.gpio.0.msize=0x1000
|
|
hint.gpio.0.irq=2
|