a6ca7519f8
Summary: Since PCPU can live in a GPR for a while longer, let it, rather than re-getting it in yet another register. MFSPR is an expensive operation, 12 clock latency on POWER9, so the fewer operations we need, the better. Since the check is tightly coupled to the fetch, by reducing the number of fetch+check, we reduce the stalls, and improve the performance marginally. Buildworld was measured at a ~5-7% improvement on a single run. Reviewed By: nwhitehorn Differential Revision: https://reviews.freebsd.org/D30003 |
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| .. | ||
| aim_machdep.c | ||
| locore32.S | ||
| locore64.S | ||
| locore.S | ||
| mmu_oea64.c | ||
| mmu_oea64.h | ||
| mmu_oea.c | ||
| mmu_radix.c | ||
| moea64_native.c | ||
| mp_cpudep.c | ||
| slb.c | ||
| trap_subr32.S | ||
| trap_subr64.S | ||