freebsd-dev/sys/mips/atheros
Adrian Chadd d6141d33bc Add initial support for the QCA953x ("Honeybee") from Qualcomm Atheros.
The QCA953x SoC is an integrated 2x2 2GHz 11n + MIPS24k core, with
a 5 port FE switch, gige WAN port, and all the same stuff you'd find on
its predecessor - the AR9331.

However, buried deep in here somewhere is also a PCIe EP/RC for various
applications and some other weird bits I don't yet know about.

This is enough to get the reference board up and booting.  I haven't yet
had it pass lots of packets - I need to finalise the ethernet switch
bits and the GMAC configuration (ie, how the ethernet ports and switch
are wired up) and I'll bring that in when I commit the base configuration
files to use the thing.

The wifi stuff will come much later.  I have to port that support from
Linux ath9k and extend our vendor HAL to support it.

The reference board (AP143) comes with 32MB RAM and 4MB flash, so in order
to use it I need to get USB working fully so I can run root from there.

Thankyou to Qualcomm Atheros for access to the reference design board.

Details:

* Add register definitions from openwrt;
* It looks like a QCA955x but shrunk down to a QCA933x footprint, so
  use the QCA955x bits and fix up the clock detection code to do the
  QCA953x bits (they're very subtly different);
* Teach GPIO about it;
* Teach EHCI about it;
* Teach if_arge about it;
* Teach the CPU detection code about it.

Tested:

* AP143, QCA9533v2 SoC

Obtained from:	Linux, Linux OpenWRT
2015-11-16 04:28:00 +00:00
..
apb.c ACK interrupts on the new SoCs. 2015-01-05 02:00:41 +00:00
apbvar.h The AR71xx has APB interrupts in the MISC registers from 0-7, later 2014-03-16 08:39:46 +00:00
ar71xx_bus_space_reversed.c
ar71xx_bus_space_reversed.h
ar71xx_chip.c Reshuffle all of the DDR flush operations into a single switch/mux, 2015-07-04 03:05:57 +00:00
ar71xx_chip.h
ar71xx_cpudef.h Reshuffle all of the DDR flush operations into a single switch/mux, 2015-07-04 03:05:57 +00:00
ar71xx_ehci.c Add initial support for the QCA953x ("Honeybee") from Qualcomm Atheros. 2015-11-16 04:28:00 +00:00
ar71xx_fixup.c
ar71xx_fixup.h
ar71xx_gpio.c Add initial support for the QCA953x ("Honeybee") from Qualcomm Atheros. 2015-11-16 04:28:00 +00:00
ar71xx_gpiovar.h Implement GPIO_GET_BUS() method for all GPIO drivers. 2015-01-31 19:32:14 +00:00
ar71xx_macaddr.c Begin moving support for board MAC addresses over to being explicitly defined. 2015-03-28 23:40:29 +00:00
ar71xx_macaddr.h Begin moving support for board MAC addresses over to being explicitly defined. 2015-03-28 23:40:29 +00:00
ar71xx_machdep.c Populate hw.model with the CPU model information. 2015-07-14 05:14:10 +00:00
ar71xx_ohci.c Reshuffle all of the DDR flush operations into a single switch/mux, 2015-07-04 03:05:57 +00:00
ar71xx_pci_bus_space.c
ar71xx_pci_bus_space.h
ar71xx_pci.c Remove unused variable leading to compile errors. 2015-09-17 06:07:49 +00:00
ar71xx_setup.c Add initial support for the QCA953x ("Honeybee") from Qualcomm Atheros. 2015-11-16 04:28:00 +00:00
ar71xx_setup.h Add initial support for the QCA953x ("Honeybee") from Qualcomm Atheros. 2015-11-16 04:28:00 +00:00
ar71xx_spi.c Devices that rely on hints or identify routines for discovery need to 2013-10-29 14:07:31 +00:00
ar71xx_wdog.c Devices that rely on hints or identify routines for discovery need to 2013-10-29 14:07:31 +00:00
ar71xxreg.h Add a MII mode for SGMII. 2015-03-02 01:23:59 +00:00
ar91xx_chip.c Reshuffle all of the DDR flush operations into a single switch/mux, 2015-07-04 03:05:57 +00:00
ar91xx_chip.h
ar91xxreg.h
ar724x_chip.c Reshuffle all of the DDR flush operations into a single switch/mux, 2015-07-04 03:05:57 +00:00
ar724x_chip.h
ar724x_pci.c Remove more unused variables leading to compile time errors. 2015-09-17 12:04:41 +00:00
ar724xreg.h Note that the AR724x PCIe registers are actually from the PCI_CTRL 2015-03-21 05:59:45 +00:00
ar933x_chip.c Reshuffle all of the DDR flush operations into a single switch/mux, 2015-07-04 03:05:57 +00:00
ar933x_chip.h
ar933x_uart.h
ar933xreg.h Add register definitions for the AR933x SoC GMAC (ie, ethernet MAC) 2013-10-14 23:57:12 +00:00
ar934x_chip.c Reshuffle all of the DDR flush operations into a single switch/mux, 2015-07-04 03:05:57 +00:00
ar934x_chip.h Implement some initial AR934x support routines. 2013-07-21 03:56:57 +00:00
ar934x_nfcreg.h Add the AR934x NAND flash controller register definitions. 2014-03-18 12:18:35 +00:00
ar934xreg.h Add AR934x specific GPIO functions and output MUX configuration. 2015-01-03 06:35:53 +00:00
files.ar71xx Add initial support for the QCA953x ("Honeybee") from Qualcomm Atheros. 2015-11-16 04:28:00 +00:00
if_arge.c Add initial support for the QCA953x ("Honeybee") from Qualcomm Atheros. 2015-11-16 04:28:00 +00:00
if_argevar.h arge: fix barrier macro. 2015-10-30 23:57:20 +00:00
pcf2123_rtc.c
pcf2123reg.h
qca953x_chip.c Add initial support for the QCA953x ("Honeybee") from Qualcomm Atheros. 2015-11-16 04:28:00 +00:00
qca953x_chip.h Add initial support for the QCA953x ("Honeybee") from Qualcomm Atheros. 2015-11-16 04:28:00 +00:00
qca953xreg.h Add initial support for the QCA953x ("Honeybee") from Qualcomm Atheros. 2015-11-16 04:28:00 +00:00
qca955x_chip.c Reshuffle all of the DDR flush operations into a single switch/mux, 2015-07-04 03:05:57 +00:00
qca955x_chip.h Add initial Qualcomm Atheros QCA955x SoC support. 2015-01-05 02:06:26 +00:00
qca955x_pci.c Remove more unused variables leading to compile time errors. 2015-09-17 12:04:41 +00:00
qca955xreg.h Oops - fix typo. 2015-07-03 07:00:24 +00:00
std.ar71xx
uart_bus_ar71xx.c Use the UART frequency when programming the UART clock. 2013-07-21 03:54:39 +00:00
uart_bus_ar933x.c Use the UART frequency when programming the UART clock. 2013-07-21 03:54:39 +00:00
uart_cpu_ar71xx.c Use the UART frequency when programming the UART clock. 2013-07-21 03:54:39 +00:00
uart_cpu_ar933x.c Use the UART frequency when programming the UART clock. 2013-07-21 03:54:39 +00:00
uart_dev_ar933x.c Add support for the uart classes to set their default register shift value. 2015-04-11 17:16:23 +00:00
uart_dev_ar933x.h