852ba10081
This adds some support for ARM as well as 64-bit. 64-bit on PowerPC is currently not working, and ARM support has not been completed or tested on the FreeBSD side. As this was imported from a Linux tree, it includes some Linux-isms (ioread/iowrite), so compile with the LinuxKPI for now. This may change in the future.
456 lines
21 KiB
C
456 lines
21 KiB
C
/******************************************************************************
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© 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc.
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All rights reserved.
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This is proprietary source code of Freescale Semiconductor Inc.,
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and its use is subject to the NetComm Device Drivers EULA.
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The copyright notice above does not evidence any actual or intended
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publication of such source code.
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ALTERNATIVELY, redistribution and use in source and binary forms, with
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or without modification, are permitted provided that the following
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conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of Freescale Semiconductor nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************/
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/******************************************************************************
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@File bm.h
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@Description BM header
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*//***************************************************************************/
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#ifndef __BM_H
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#define __BM_H
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#include "xx_common.h"
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#include "bm_ext.h"
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#include "mm_ext.h"
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#include "bman_private.h"
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#include "bm_ipc.h"
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#define __ERR_MODULE__ MODULE_BM
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#define BM_NUM_OF_POOLS 64
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#define BM_NUM_OF_PM 8
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/**************************************************************************//**
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@Description Exceptions
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*//***************************************************************************/
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#define BM_EX_INVALID_COMMAND 0x00000010
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#define BM_EX_FBPR_THRESHOLD 0x00000008
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#define BM_EX_MULTI_ECC 0x00000004
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#define BM_EX_SINGLE_ECC 0x00000002
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#define BM_EX_POOLS_AVAIL_STATE 0x00000001
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#define GET_EXCEPTION_FLAG(bitMask, exception) \
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switch(exception){ \
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case e_BM_EX_INVALID_COMMAND: \
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bitMask = BM_EX_INVALID_COMMAND; break; \
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case e_BM_EX_FBPR_THRESHOLD: \
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bitMask = BM_EX_FBPR_THRESHOLD; break; \
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case e_BM_EX_SINGLE_ECC: \
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bitMask = BM_EX_SINGLE_ECC; break; \
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case e_BM_EX_MULTI_ECC: \
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bitMask = BM_EX_MULTI_ECC; break; \
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default: bitMask = 0;break; \
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}
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/**************************************************************************//**
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@Description defaults
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*//***************************************************************************/
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/* BM defaults */
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#define DEFAULT_exceptions (BM_EX_INVALID_COMMAND |\
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BM_EX_FBPR_THRESHOLD |\
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BM_EX_MULTI_ECC |\
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BM_EX_SINGLE_ECC )
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#define DEFAULT_fbprThreshold 0
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/* BM-Portal defaults */
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#define DEFAULT_memAttr MEMORY_ATTR_CACHEABLE
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/* BM-Pool defaults */
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#define DEFAULT_dynamicBpid TRUE
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#define DEFAULT_useDepletion FALSE
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#define DEFAULT_useStockpile FALSE
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#define DEFAULT_numOfBufsPerCmd 8
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/**************************************************************************//**
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@Description Memory Mapped Registers
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*//***************************************************************************/
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#if defined(__MWERKS__) && !defined(__GNUC__)
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#pragma pack(push,1)
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#endif /* defined(__MWERKS__) && ... */
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#define MEM_MAP_START
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typedef _Packed struct
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{
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/* BMan Buffer Pool Configuration & Status Registers */
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volatile uint32_t swdet[BM_NUM_OF_POOLS]; /**< S/W Portal depletion entry threshold */
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volatile uint32_t hwdet[BM_NUM_OF_POOLS]; /**< H/W Portal depletion entry threshold */
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volatile uint32_t swdxt[BM_NUM_OF_POOLS]; /**< S/W Portal depletion exit threshold */
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volatile uint32_t hwdxt[BM_NUM_OF_POOLS]; /**< H/W Portal depletion exit threshold */
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volatile uint32_t sdcnt[BM_NUM_OF_POOLS]; /**< S/W Portal depletion count */
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volatile uint32_t hdcnt[BM_NUM_OF_POOLS]; /**< H/W Portal depletion count */
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volatile uint32_t content[BM_NUM_OF_POOLS]; /**< Snapshot of buffer count in Pool */
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volatile uint32_t hdptr[BM_NUM_OF_POOLS]; /**< Head Pointer for Pool's FBPR list. */
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/* Free Buffer Proxy Record (FBPR) Manager Query Registers */
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volatile uint32_t fbpr_fpc; /**< FBPR Free Pool Count */
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volatile uint32_t fbpr_fp_lwit; /**< FBPR Free Pool Low Watermark Interrupt Threshold */
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volatile uint8_t res1[248]; /**< reserved */
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/* Performance Monitor (PM) Configuration Register */
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volatile uint32_t cmd_pm_cfg[BM_NUM_OF_PM]; /**< BMan Command Performance Monitor configuration registers. */
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volatile uint32_t fl_pm_cfg[BM_NUM_OF_PM]; /**< BMan Free List Performance Monitor configuration registers */
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volatile uint8_t res2[192]; /**< reserved */
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/* BMan Error Capture Registers */
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volatile uint32_t ecsr; /**< BMan Error Capture Status Register */
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volatile uint32_t ecir; /**< BMan Error Capture Information Register */
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volatile uint32_t eadr; /**< BMan Error Capture Address Register */
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volatile uint8_t res3[4]; /**< reserved */
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volatile uint32_t edata[8]; /**< BMan ECC Error Data Register */
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volatile uint32_t sbet; /**< BMan Single Bit ECC Error Threshold Register */
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volatile uint32_t efcr; /**< BMan Error Fetch Capture Register */
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volatile uint32_t efar; /**< BMan Error Fetch Address Register */
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volatile uint8_t res4[68]; /**< reserved */
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volatile uint32_t sbec0; /**< BMan Single Bit ECC Error Count 0 Register */
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volatile uint32_t sbec1; /**< BMan Single Bit ECC Error Count 1 Register */
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volatile uint8_t res5[368]; /**< reserved */
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/* BMan ID/Revision Registers */
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volatile uint32_t ip_rev_1; /**< BMan IP Block Revision 1 register */
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volatile uint32_t ip_rev_2; /**< BMan IP Block Revision 2 register */
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/* CoreNet Initiator Interface Memory Window Configuration Registers */
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volatile uint32_t fbpr_bare; /**< Data Structure Extended Base Address Register */
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volatile uint32_t fbpr_bar; /**< Data Structure Base Address Register */
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volatile uint8_t res6[8]; /**< reserved */
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volatile uint32_t fbpr_ar; /**< Data Structure Attributes Register */
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volatile uint8_t res7[240]; /**< reserved */
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volatile uint32_t srcidr; /**< BMan Source ID Register */
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volatile uint32_t liodnr; /**< BMan Logical I/O Device Number Register */
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volatile uint8_t res8[244]; /**< reserved */
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/* BMan Interrupt and Error Registers */
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volatile uint32_t err_isr; /**< BMan Error Interrupt Status Register */
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volatile uint32_t err_ier; /**< BMan Error Interrupt Enable Register */
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volatile uint32_t err_isdr; /**< BMan Error Interrupt Status Disable Register */
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volatile uint32_t err_iir; /**< BMan Error Interrupt Inhibit Register */
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volatile uint32_t err_ifr; /**< BMan Error Interrupt Force Register */
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} _PackedType t_BmRegs;
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#define MEM_MAP_END
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#if defined(__MWERKS__) && !defined(__GNUC__)
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#pragma pack(pop)
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#endif /* defined(__MWERKS__) && ... */
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/**************************************************************************//**
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@Description General defines
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*//***************************************************************************/
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#define MODULE_NAME_SIZE 30
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#define FBPR_ENTRY_SIZE 64 /* 64 bytes */
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/* Compilation constants */
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#define RCR_THRESH 2 /* reread h/w CI when running out of space */
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#define RCR_ITHRESH 4 /* if RCR congests, interrupt threshold */
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/* Lock/unlock portals, subject to "UNLOCKED" flag */
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#define NCSW_PLOCK(p) ((t_BmPortal*)(p))->irq_flags = XX_DisableAllIntr()
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#define PUNLOCK(p) XX_RestoreAllIntr(((t_BmPortal*)(p))->irq_flags)
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#define BM_RCR_RING 0
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#define BM_NUM_OF_RINGS 1
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/**************************************************************************//**
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@Description Register defines
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*//***************************************************************************/
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/* masks */
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#define REV1_MAJOR_MASK 0x0000FF00
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#define REV1_MINOR_MASK 0x000000FF
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#define REV2_INTEG_MASK 0x00FF0000
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#define REV2_ERR_MASK 0x0000FF00
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#define REV2_CFG_MASK 0x000000FF
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#define AR_PRIORITY 0x40000000
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#define AR_SIZE_MASK 0x0000003f
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/* shifts */
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#define REV1_MAJOR_SHIFT 8
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#define REV1_MINOR_SHIFT 0
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#define REV2_INTEG_SHIFT 16
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#define REV2_ERR_SHIFT 8
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#define REV2_CFG_SHIFT 0
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#define AR_SIZE_SHIFT 0
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typedef uint8_t bmRingType_t;
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typedef uint8_t (t_BmUpdateCb)(struct bm_portal *p_BmPortalLow);
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typedef void (t_BmPrefetchCb)(struct bm_portal *p_BmPortalLow);
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typedef void (t_BmCommitCb)(struct bm_portal *p_BmPortalLow, uint8_t myverb);
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typedef struct {
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bool useStockpile; /**< */
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bool dynamicBpid; /**< boolean indicates use of dynamic Bpid */
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bool useDepletion; /**< boolean indicates use of depletion */
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uint32_t depletionThresholds[MAX_DEPLETION_THRESHOLDS]; /**< depletion-entry/exit thresholds, if useThresholds is set. NB:
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this is only allowed if useThresholds is used and
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when run in the control plane (which controls Bman CCSR) */
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} t_BmPoolDriverParams;
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typedef struct BmPool {
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uint8_t bpid; /**< index of the buffer pool to encapsulate (0-63) */
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t_Handle h_Bm;
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t_Handle h_BmPortal;
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bool shadowMode;
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uint32_t numOfBuffers; /**< Number of buffers use by this pool */
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t_BufferPoolInfo bufferPoolInfo; /**< Data buffers pool information */
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uint32_t flags; /**< bit-mask of BMAN_POOL_FLAG_*** options */
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t_Handle h_App; /**< opaque user value passed as a parameter to 'cb' */
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t_BmDepletionCallback *f_Depletion; /**< depletion-entry/exit callback, if BMAN_POOL_FLAG_DEPLETION is set */
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uint32_t swDepletionCount;
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uint32_t hwDepletionCount;
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/* stockpile state - NULL unless BMAN_POOL_FLAG_STOCKPILE is set */
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struct bm_buffer *sp;
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uint16_t spFill;
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uint8_t spBufsCmd;
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uint16_t spMaxBufs;
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uint16_t spMinBufs;
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bool noBuffCtxt;
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t_BmPoolDriverParams *p_BmPoolDriverParams;
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} t_BmPool;
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typedef struct {
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t_BmUpdateCb *f_BmUpdateCb;
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t_BmPrefetchCb *f_BmPrefetchCb;
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t_BmCommitCb *f_BmCommitCb;
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} t_BmPortalCallbacks;
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typedef struct {
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uint32_t hwExtStructsMemAttr;
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struct bman_depletion mask;
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} t_BmPortalDriverParams;
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typedef struct {
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t_Handle h_Bm;
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struct bm_portal *p_BmPortalLow;
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t_BmPortalCallbacks cbs[BM_NUM_OF_RINGS];
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uintptr_t irq;
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int cpu; /* This is used for any "core-affine" portals, ie. default portals
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* associated to the corresponding cpu. -1 implies that there is no core
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* affinity configured. */
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struct bman_depletion pools[2]; /**< 2-element array. pools[0] is mask, pools[1] is snapshot. */
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uint32_t flags; /**< BMAN_PORTAL_FLAG_*** - static, caller-provided */
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uint32_t irq_flags;
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int thresh_set;
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uint32_t slowpoll;
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uint32_t rcrProd; /**< The wrap-around rcr_[prod|cons] counters are used to support BMAN_RELEASE_FLAG_WAIT_SYNC. */
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uint32_t rcrCons;
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/**< 64-entry hash-table of pool objects that are tracking depletion
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* entry/exit (ie. BMAN_POOL_FLAG_DEPLETION). This isn't fast-path, so
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* we're not fussy about cache-misses and so forth - whereas the above
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* members should all fit in one cacheline.
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* BTW, with BM_MAX_NUM_OF_POOLS entries in the hash table and BM_MAX_NUM_OF_POOLS buffer pools to track,
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* you'll never guess the hash-function ... */
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t_BmPool *depletionPoolsTable[BM_MAX_NUM_OF_POOLS];
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t_BmPortalDriverParams *p_BmPortalDriverParams;
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} t_BmPortal;
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typedef struct {
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uint8_t partBpidBase;
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uint8_t partNumOfPools;
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uint32_t totalNumOfBuffers; /**< total number of buffers */
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uint32_t fbprMemPartitionId;
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uint32_t fbprThreshold;
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uint16_t liodn;
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} t_BmDriverParams;
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typedef struct {
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uint8_t guestId;
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t_Handle h_BpidMm;
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t_Handle h_SpinLock;
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t_Handle h_Portals[DPAA_MAX_NUM_OF_SW_PORTALS];
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t_Handle h_Session;
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char moduleName[MODULE_NAME_SIZE];
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t_BmRegs *p_BmRegs;
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void *p_FbprBase;
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uint32_t exceptions;
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t_BmExceptionsCallback *f_Exception;
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t_Handle h_App;
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uintptr_t errIrq; /**< error interrupt line; NO_IRQ if interrupts not used */
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t_BmDriverParams *p_BmDriverParams;
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} t_Bm;
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static __inline__ void BmSetPortalHandle(t_Handle h_Bm, t_Handle h_Portal, e_DpaaSwPortal portalId)
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{
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ASSERT_COND(!((t_Bm*)h_Bm)->h_Portals[portalId] || !h_Portal);
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((t_Bm*)h_Bm)->h_Portals[portalId] = h_Portal;
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}
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static __inline__ t_Handle BmGetPortalHandle(t_Handle h_Bm)
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{
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t_Bm *p_Bm = (t_Bm*)h_Bm;
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ASSERT_COND(p_Bm);
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return p_Bm->h_Portals[CORE_GetId()];
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}
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static __inline__ uint8_t BmUpdate(t_BmPortal *p_BmPortal, bmRingType_t type)
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{
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return p_BmPortal->cbs[type].f_BmUpdateCb(p_BmPortal->p_BmPortalLow);
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}
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static __inline__ void BmPrefetch(t_BmPortal *p_BmPortal, bmRingType_t type)
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{
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if (p_BmPortal->cbs[type].f_BmPrefetchCb)
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p_BmPortal->cbs[type].f_BmPrefetchCb(p_BmPortal->p_BmPortalLow);
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}
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static __inline__ void BmCommit(t_BmPortal *p_BmPortal, bmRingType_t type, uint8_t myverb)
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{
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p_BmPortal->cbs[type].f_BmCommitCb(p_BmPortal->p_BmPortalLow, myverb);
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}
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static __inline__ uint32_t BmBpidGet(t_Bm *p_Bm, bool force, uint32_t base)
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{
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uint64_t ans, size = 1;
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uint64_t alignment = 1;
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if (force)
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{
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if (MM_InRange(p_Bm->h_BpidMm, (uint64_t)base))
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{
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ans = MM_GetForce(p_Bm->h_BpidMm,
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base,
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size,
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"BM BPID MEM");
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ans = base;
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}
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else if (p_Bm->h_Session)
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{
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t_BmIpcMsg msg;
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t_BmIpcReply reply;
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uint32_t replyLength;
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t_BmIpcBpidParams ipcBpid;
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t_Error errCode = E_OK;
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memset(&msg, 0, sizeof(t_BmIpcMsg));
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memset(&reply, 0, sizeof(t_BmIpcReply));
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ipcBpid.bpid = (uint8_t)base;
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msg.msgId = BM_FORCE_BPID;
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memcpy(msg.msgBody, &ipcBpid, sizeof(t_BmIpcBpidParams));
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replyLength = sizeof(uint32_t) + sizeof(uint32_t);
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if ((errCode = XX_IpcSendMessage(p_Bm->h_Session,
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(uint8_t*)&msg,
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sizeof(msg.msgId) + sizeof(t_BmIpcBpidParams),
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(uint8_t*)&reply,
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&replyLength,
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NULL,
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NULL)) != E_OK)
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{
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REPORT_ERROR(MAJOR, errCode, NO_MSG);
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return (uint32_t)ILLEGAL_BASE;
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}
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if (replyLength != (sizeof(uint32_t) + sizeof(uint32_t)))
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{
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REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("IPC reply length mismatch"));
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return (uint32_t)ILLEGAL_BASE;
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}
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memcpy((uint8_t*)&ans, reply.replyBody, sizeof(uint32_t));
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}
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else
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{
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DBG(WARNING, ("No Ipc - can't validate bpid."));
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ans = base;
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}
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}
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else
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ans = MM_Get(p_Bm->h_BpidMm,
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size,
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alignment,
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"BM BPID MEM");
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KASSERT(ans < UINT32_MAX, ("Oops, %lx > UINT32_MAX!\n", ans));
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return (uint32_t)ans;
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}
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static __inline__ t_Error BmBpidPut(t_Bm *p_Bm, uint32_t base)
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{
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if (MM_InRange(p_Bm->h_BpidMm, (uint64_t)base))
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{
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if (MM_Put(p_Bm->h_BpidMm, (uint64_t)base) != base)
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return E_OK;
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else
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return ERROR_CODE(E_NOT_FOUND);
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}
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else if (p_Bm->h_Session)
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{
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t_BmIpcMsg msg;
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t_BmIpcBpidParams ipcBpid;
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t_Error errCode = E_OK;
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memset(&msg, 0, sizeof(t_BmIpcMsg));
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ipcBpid.bpid = (uint8_t)base;
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msg.msgId = BM_PUT_BPID;
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memcpy(msg.msgBody, &ipcBpid, sizeof(t_BmIpcBpidParams));
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if ((errCode = XX_IpcSendMessage(p_Bm->h_Session,
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(uint8_t*)&msg,
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sizeof(msg.msgId) + sizeof(t_BmIpcBpidParams),
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NULL,
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NULL,
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NULL,
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NULL)) != E_OK)
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RETURN_ERROR(MAJOR, errCode, NO_MSG);
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}
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else
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DBG(WARNING, ("No Ipc - can't validate bpid."));
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return E_OK;
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}
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/****************************************/
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/* Inter-Module functions */
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/****************************************/
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typedef enum e_BmInterModuleCounters {
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e_BM_IM_COUNTERS_FBPR = 0,
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e_BM_IM_COUNTERS_POOL_CONTENT,
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e_BM_IM_COUNTERS_POOL_SW_DEPLETION,
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e_BM_IM_COUNTERS_POOL_HW_DEPLETION
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} e_BmInterModuleCounters;
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t_Error BmSetPoolThresholds(t_Handle h_Bm, uint8_t bpid, const uint32_t *thresholds);
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t_Error BmUnSetPoolThresholds(t_Handle h_Bm, uint8_t bpid);
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uint8_t BmPortalAcquire(t_Handle h_BmPortal, uint8_t bpid, struct bm_buffer *bufs, uint8_t num);
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t_Error BmPortalRelease(t_Handle h_BmPortal, uint8_t bpid, struct bm_buffer *bufs, uint8_t num, uint32_t flags);
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t_Error BmPortalQuery(t_Handle h_BmPortal, struct bman_depletion *p_Pools, bool depletion);
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uint32_t BmGetCounter(t_Handle h_Bm, e_BmInterModuleCounters counter, uint8_t bpid);
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t_Error BmGetRevision(t_Handle h_Bm, t_BmRevisionInfo *p_BmRevisionInfo);
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#endif /* __BM_H */
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