72e64728c9
Clean up whitespace issues under sys/mips/nlm (except dev). No functional change in this commit.
194 lines
8.8 KiB
C
194 lines
8.8 KiB
C
/*-
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* Copyright (c) 2003-2012 Broadcom Corporation
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* All Rights Reserved
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __NLM_XAUI_H__
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#define __NLM_XAUI_H__
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/**
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* @file_name xaui.h
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* @author Netlogic Microsystems
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* @brief Basic definitions of XLP XAUI ports
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*/
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#define XAUI_CONFIG0(block) NAE_REG(block, 4, 0x00)
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#define XAUI_CONFIG1(block) NAE_REG(block, 4, 0x01)
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#define XAUI_CONFIG2(block) NAE_REG(block, 4, 0x02)
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#define XAUI_CONFIG3(block) NAE_REG(block, 4, 0x03)
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/*
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#define XAUI_MAC_ADDR0_LO(block) NAE_REG(block, 4, 0x04)
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#define XAUI_MAC_ADDR0_HI(block) NAE_REG(block, 4, 0x05)
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*/
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#define XAUI_MAX_FRAME_LEN(block) NAE_REG(block, 4, 0x08)
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#define XAUI_REVISION_LVL(block) NAE_REG(block, 4, 0x0b)
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#define XAUI_MII_MGMT_CMD(block) NAE_REG(block, 4, 0x10)
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#define XAUI_MII_MGMT_FIELD(block) NAE_REG(block, 4, 0x11)
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#define XAUI_MII_MGMT_CFG(block) NAE_REG(block, 4, 0x12)
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#define XAUI_MIIM_LINK_FALL_VEC(block) NAE_REG(block, 4, 0x13)
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#define XAUI_MII_MGMT_IND(block) NAE_REG(block, 4, 0x14)
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#define XAUI_STATS_MLR(block) NAE_REG(block, 4, 0x1f)
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#define XAUI_STATS_TR64(block) NAE_REG(block, 4, 0x20)
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#define XAUI_STATS_TR127(block) NAE_REG(block, 4, 0x21)
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#define XAUI_STATS_TR255(block) NAE_REG(block, 4, 0x22)
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#define XAUI_STATS_TR511(block) NAE_REG(block, 4, 0x23)
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#define XAUI_STATS_TR1K(block) NAE_REG(block, 4, 0x24)
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#define XAUI_STATS_TRMAX(block) NAE_REG(block, 4, 0x25)
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#define XAUI_STATS_TRMGV(block) NAE_REG(block, 4, 0x26)
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#define XAUI_STATS_RBYT(block) NAE_REG(block, 4, 0x27)
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#define XAUI_STATS_RPKT(block) NAE_REG(block, 4, 0x28)
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#define XAUI_STATS_RFCS(block) NAE_REG(block, 4, 0x29)
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#define XAUI_STATS_RMCA(block) NAE_REG(block, 4, 0x2a)
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#define XAUI_STATS_RBCA(block) NAE_REG(block, 4, 0x2b)
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#define XAUI_STATS_RXCF(block) NAE_REG(block, 4, 0x2c)
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#define XAUI_STATS_RXPF(block) NAE_REG(block, 4, 0x2d)
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#define XAUI_STATS_RXUO(block) NAE_REG(block, 4, 0x2e)
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#define XAUI_STATS_RALN(block) NAE_REG(block, 4, 0x2f)
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#define XAUI_STATS_RFLR(block) NAE_REG(block, 4, 0x30)
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#define XAUI_STATS_RCDE(block) NAE_REG(block, 4, 0x31)
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#define XAUI_STATS_RCSE(block) NAE_REG(block, 4, 0x32)
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#define XAUI_STATS_RUND(block) NAE_REG(block, 4, 0x33)
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#define XAUI_STATS_ROVR(block) NAE_REG(block, 4, 0x34)
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#define XAUI_STATS_RFRG(block) NAE_REG(block, 4, 0x35)
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#define XAUI_STATS_RJBR(block) NAE_REG(block, 4, 0x36)
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#define XAUI_STATS_TBYT(block) NAE_REG(block, 4, 0x38)
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#define XAUI_STATS_TPKT(block) NAE_REG(block, 4, 0x39)
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#define XAUI_STATS_TMCA(block) NAE_REG(block, 4, 0x3a)
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#define XAUI_STATS_TBCA(block) NAE_REG(block, 4, 0x3b)
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#define XAUI_STATS_TXPF(block) NAE_REG(block, 4, 0x3c)
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#define XAUI_STATS_TDFR(block) NAE_REG(block, 4, 0x3d)
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#define XAUI_STATS_TEDF(block) NAE_REG(block, 4, 0x3e)
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#define XAUI_STATS_TSCL(block) NAE_REG(block, 4, 0x3f)
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#define XAUI_STATS_TMCL(block) NAE_REG(block, 4, 0x40)
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#define XAUI_STATS_TLCL(block) NAE_REG(block, 4, 0x41)
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#define XAUI_STATS_TXCL(block) NAE_REG(block, 4, 0x42)
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#define XAUI_STATS_TNCL(block) NAE_REG(block, 4, 0x43)
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#define XAUI_STATS_TJBR(block) NAE_REG(block, 4, 0x46)
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#define XAUI_STATS_TFCS(block) NAE_REG(block, 4, 0x47)
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#define XAUI_STATS_TXCF(block) NAE_REG(block, 4, 0x48)
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#define XAUI_STATS_TOVR(block) NAE_REG(block, 4, 0x49)
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#define XAUI_STATS_TUND(block) NAE_REG(block, 4, 0x4a)
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#define XAUI_STATS_TFRG(block) NAE_REG(block, 4, 0x4b)
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#define XAUI_STATS_CAR1(block) NAE_REG(block, 4, 0x4c)
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#define XAUI_STATS_CAR2(block) NAE_REG(block, 4, 0x4d)
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#define XAUI_STATS_CAM1(block) NAE_REG(block, 4, 0x4e)
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#define XAUI_STATS_CAM2(block) NAE_REG(block, 4, 0x4f)
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#define XAUI_MAC_ADDR0_LO(block) NAE_REG(block, 4, 0x50)
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#define XAUI_MAC_ADDR0_HI(block) NAE_REG(block, 4, 0x51)
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#define XAUI_MAC_ADDR1_LO(block) NAE_REG(block, 4, 0x52)
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#define XAUI_MAC_ADDR1_HI(block) NAE_REG(block, 4, 0x53)
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#define XAUI_MAC_ADDR2_LO(block) NAE_REG(block, 4, 0x54)
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#define XAUI_MAC_ADDR2_HI(block) NAE_REG(block, 4, 0x55)
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#define XAUI_MAC_ADDR3_LO(block) NAE_REG(block, 4, 0x56)
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#define XAUI_MAC_ADDR3_HI(block) NAE_REG(block, 4, 0x57)
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#define XAUI_MAC_ADDR_MASK0_LO(block) NAE_REG(block, 4, 0x58)
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#define XAUI_MAC_ADDR_MASK0_HI(block) NAE_REG(block, 4, 0x59)
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#define XAUI_MAC_ADDR_MASK1_LO(block) NAE_REG(block, 4, 0x5a)
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#define XAUI_MAC_ADDR_MASK1_HI(block) NAE_REG(block, 4, 0x5b)
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#define XAUI_MAC_FILTER_CFG(block) NAE_REG(block, 4, 0x5c)
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#define XAUI_HASHTBL_VEC_B31_0(block) NAE_REG(block, 4, 0x60)
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#define XAUI_HASHTBL_VEC_B63_32(block) NAE_REG(block, 4, 0x61)
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#define XAUI_HASHTBL_VEC_B95_64(block) NAE_REG(block, 4, 0x62)
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#define XAUI_HASHTBL_VEC_B127_96(block) NAE_REG(block, 4, 0x63)
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#define XAUI_HASHTBL_VEC_B159_128(block) NAE_REG(block, 4, 0x64)
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#define XAUI_HASHTBL_VEC_B191_160(block) NAE_REG(block, 4, 0x65)
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#define XAUI_HASHTBL_VEC_B223_192(block) NAE_REG(block, 4, 0x66)
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#define XAUI_HASHTBL_VEC_B255_224(block) NAE_REG(block, 4, 0x67)
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#define XAUI_HASHTBL_VEC_B287_256(block) NAE_REG(block, 4, 0x68)
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#define XAUI_HASHTBL_VEC_B319_288(block) NAE_REG(block, 4, 0x69)
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#define XAUI_HASHTBL_VEC_B351_320(block) NAE_REG(block, 4, 0x6a)
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#define XAUI_HASHTBL_VEC_B383_352(block) NAE_REG(block, 4, 0x6b)
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#define XAUI_HASHTBL_VEC_B415_384(block) NAE_REG(block, 4, 0x6c)
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#define XAUI_HASHTBL_VEC_B447_416(block) NAE_REG(block, 4, 0x6d)
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#define XAUI_HASHTBL_VEC_B479_448(block) NAE_REG(block, 4, 0x6e)
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#define XAUI_HASHTBL_VEC_B511_480(block) NAE_REG(block, 4, 0x6f)
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#define XAUI_NETIOR_XGMAC_MISC0(block) NAE_REG(block, 4, 0x76)
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#define XAUI_NETIOR_RX_ABORT_DROP_COUNT(block) NAE_REG(block, 4, 0x77)
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#define XAUI_NETIOR_MACCTRL_PAUSE_QUANTA(block) NAE_REG(block, 4, 0x78)
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#define XAUI_NETIOR_MACCTRL_OPCODE(block) NAE_REG(block, 4, 0x79)
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#define XAUI_NETIOR_MAC_DA_H(block) NAE_REG(block, 4, 0x7a)
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#define XAUI_NETIOR_MAC_DA_L(block) NAE_REG(block, 4, 0x7b)
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#define XAUI_NETIOR_XGMAC_STAT(block) NAE_REG(block, 4, 0x7c)
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#define XAUI_NETIOR_XGMAC_CTRL3(block) NAE_REG(block, 4, 0x7d)
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#define XAUI_NETIOR_XGMAC_CTRL2(block) NAE_REG(block, 4, 0x7e)
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#define XAUI_NETIOR_XGMAC_CTRL1(block) NAE_REG(block, 4, 0x7f)
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#define LANE_RX_CLK (1 << 0)
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#define LANE_TX_CLK (1 << 6)
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#define XAUI_LANE_FAULT 0x400
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#define XAUI_CONFIG_0 0
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#define XAUI_CONFIG_MACRST 0x80000000
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#define XAUI_CONFIG_RSTRCTL 0x00400000
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#define XAUI_CONFIG_RSTRFN 0x00200000
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#define XAUI_CONFIG_RSTTCTL 0x00040000
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#define XAUI_CONFIG_RSTTFN 0x00020000
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#define XAUI_CONFIG_RSTMIIM 0x00010000
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#define XAUI_CONFIG_1 1
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#define XAUI_CONFIG_TCTLEN 0x80000000
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#define XAUI_CONFIG_TFEN 0x40000000
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#define XAUI_CONFIG_RCTLEN 0x20000000
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#define XAUI_CONFIG_RFEN 0x10000000
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#define XAUI_CONFIG_DRPLT64 0x00000020
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#define XAUI_CONFIG_LENCHK 0x00000008
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#define XAUI_CONFIG_GENFCS 0x00000004
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#define XAUI_CONFIG_PAD_0 0x00000000
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#define XAUI_CONFIG_PAD_64 0x00000001
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#define XAUI_CONFIG_PAD_COND 0x00000002
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#define XAUI_CONFIG_PAD_68 0x00000003
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#define XAUI_PHY_CTRL_1 0x00
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#define NETIOR_XGMAC_CTRL1 0x7F
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#define NETIOR_XGMAC_CTRL3 0x7D
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#define NETIOR_XGMAC_VLAN_DC_POS 28
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#define NETIOR_XGMAC_PHYADDR_POS 23
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#define NETIOR_XGMAC_DEVID_POS 18
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#define NETIOR_XGMAC_STATS_EN_POS 17
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#define NETIOR_XGMAC_TX_PFC_EN_POS 14
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#define NETIOR_XGMAC_RX_PFC_EN_POS 13
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#define NETIOR_XGMAC_SOFT_RST_POS 11
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#define NETIOR_XGMAC_TX_PAUSE_POS 10
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#define NETIOR_XGMAC_STATS_CLR_POS 16
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#if !defined(LOCORE) && !defined(__ASSEMBLY__)
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void nlm_xaui_pcs_init(uint64_t, int);
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void nlm_nae_setup_rx_mode_xaui(uint64_t, int, int, int, int, int, int, int);
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void nlm_nae_setup_mac_addr_xaui(uint64_t, int, int, int, unsigned char *);
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void nlm_config_xaui_mtu(uint64_t, int, int, int);
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void nlm_config_xaui(uint64_t, int, int, int, int);
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#endif /* !(LOCORE) && !(__ASSEMBLY__) */
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#endif
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