eac3c4cd27
the mi_startup (or to the last of it).. and hit a panic after : uart0: <16550 or compatible> on iodi0 Trap cause = 2 (TLB miss....) I did have to take the pci bus OUT of the build to get this far, hit a cache error with the PCI code in. Interesting thing is the machine reboots too ;-)
27 lines
987 B
Plaintext
27 lines
987 B
Plaintext
# $FreeBSD$
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#mips/rmi/xlr_boot1_console.c standard
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mips/rmi/xlr_machdep.c standard
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mips/rmi/clock.c standard
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mips/rmi/tick.c standard
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mips/rmi/iodi.c standard
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mips/rmi/msgring.c standard
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mips/rmi/msgring_xls.c standard
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mips/rmi/board.c standard
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mips/rmi/on_chip.c standard
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mips/rmi/intr_machdep.c standard
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mips/rmi/xlr_i2c.c optional iic
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mips/rmi/uart_bus_xlr_iodi.c optional uart
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mips/rmi/uart_cpu_mips_xlr.c optional uart
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mips/rmi/perfmon_kern.c optional xlr_perfmon
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mips/rmi/perfmon_percpu.c optional xlr_perfmon
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#mips/rmi/pcibus.c optional pci
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#mips/rmi/xlr_pci.c optional pci
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#mips/rmi/xls_ehci.c optional usb ehci
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dev/rmi/xlr/rge.c optional rge
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mips/rmi/bus_space_rmi.c standard
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dev/iicbus/xlr_rtc.c optional xlr_rtc
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dev/iicbus/xlr_temperature.c optional xlr_temperature
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dev/iicbus/xlr_eeprom.c optional xlr_eeprom
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dev/rmi/sec/rmisec.c optional rmisec
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dev/rmi/sec/rmilib.c optional rmisec
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