bda8e754a1
- Implement bus_adjust_resource() methods as far as necessary and in non-PCI bridge drivers as far as feasible without rototilling them. - As NEW_PCIB does a layering violation by activating resources at layers above pci(4) without previously bubbling up their allocation there, move the assignment of bus tags and handles from the bus_alloc_resource() to the bus_activate_resource() methods like at least the other NEW_PCIB enabled architectures do. This is somewhat unfortunate as previously sparc64 (ab)used resource activation to indicate whether SYS_RES_MEMORY resources should be mapped into KVA, which is only necessary if their going to be accessed via the pointer returned from rman_get_virtual() but not for bus_space(9) as the later always uses physical access on sparc64. Besides wasting KVA if we always map in SYS_RES_MEMORY resources, a driver also may deliberately not map them in if the firmware already has done so, possibly in a special way. So in order to still allow a driver to decide whether a SYS_RES_MEMORY resource should be mapped into KVA we let it indicate that by calling bus_space_map(9) with BUS_SPACE_MAP_LINEAR as actually documented in the bus_space(9) page. This is implemented by allocating a separate bus tag per SYS_RES_MEMORY resource and passing the resource via the previously unused bus tag cookie so we later on can call rman_set_virtual() in sparc64_bus_mem_map(). As a side effect this now also allows to actually indicate that a SYS_RES_MEMORY resource should be mapped in as cacheable and/or read-only via BUS_SPACE_MAP_CACHEABLE and BUS_SPACE_MAP_READONLY respectively. - Do some minor cleanup like taking advantage of rman_init_from_resource(), factor out the common part of bus tag allocation into a newly added sparc64_alloc_bus_tag(), hook up some missing newbus methods and replace some homegrown versions with the generic counterparts etc. - While at it, let apb_attach() (which can't use the generic NEW_PCIB code as APB bridges just don't have the base and limit registers implemented) regarding the config space registers cached in pcib_softc and the SYSCTL reporting nodes set up.
85 lines
2.5 KiB
C
85 lines
2.5 KiB
C
/*-
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* Copyright (c) 1999, 2000 Matthew R. Green
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: NetBSD: psychovar.h,v 1.15 2008/05/29 14:51:26 mrg Exp
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*
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* $FreeBSD$
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*/
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#ifndef _SPARC64_PCI_PSYCHOVAR_H_
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#define _SPARC64_PCI_PSYCHOVAR_H_
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/*
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* Per-PCI bus on mainbus softc structure; one for sabre, or two
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* per pair of psychos.
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*/
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struct psycho_softc {
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struct bus_dma_methods *sc_dma_methods;
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device_t sc_dev;
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struct mtx *sc_mtx;
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/* Interrupt Group Number for this device */
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uint32_t sc_ign;
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bus_addr_t sc_pcictl;
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phandle_t sc_node; /* Firmware node */
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u_int sc_mode;
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#define PSYCHO_MODE_SABRE 0
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#define PSYCHO_MODE_PSYCHO 1
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/* Bus A or B of a psycho pair? */
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u_int sc_half;
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struct iommu_state *sc_is;
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struct resource *sc_mem_res;
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struct resource *sc_irq_res[PSYCHO_NINTR];
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void *sc_ihand[PSYCHO_NINTR];
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struct ofw_bus_iinfo sc_pci_iinfo;
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/* Tags for PCI access */
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bus_space_tag_t sc_pci_cfgt;
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bus_space_tag_t sc_pci_iot;
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bus_dma_tag_t sc_pci_dmat;
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bus_space_handle_t sc_pci_bh[PSYCHO_NRANGE];
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struct rman sc_pci_mem_rman;
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struct rman sc_pci_io_rman;
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uint8_t sc_pci_secbus;
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uint8_t sc_pci_subbus;
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uint8_t sc_pci_hpbcfg[16];
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SLIST_ENTRY(psycho_softc) sc_link;
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};
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#endif /* !_SPARC64_PCI_PSYCHOVAR_H_ */
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