f365db00e5
registers as volatile. Instructions that *wrote* to FP state were already marked volatile, but apparently gcc has license to move non-volatile asms past volatile asms. This broke amd64's feupdateenv at -O2 due to a WAR conflict between fnstsw and fldenv there.
185 lines
4.5 KiB
C
185 lines
4.5 KiB
C
/*-
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* Copyright (c) 2004 David Schultz <das@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _FENV_H_
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#define _FENV_H_
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#include <sys/_types.h>
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typedef __uint64_t fenv_t;
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typedef __uint16_t fexcept_t;
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/* Exception flags */
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#define FE_INVALID 0x02
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#define FE_DIVBYZERO 0x04
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#define FE_OVERFLOW 0x08
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#define FE_UNDERFLOW 0x10
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#define FE_INEXACT 0x20
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#define FE_INTOVF 0x40 /* not maskable */
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#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INTOVF | \
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FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
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/* Rounding modes */
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#define FE_TOWARDZERO 0x00
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#define FE_DOWNWARD 0x01
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#define FE_TONEAREST 0x02
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#define FE_UPWARD 0x03
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#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
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FE_UPWARD | FE_TOWARDZERO)
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#define _ROUND_SHIFT 58
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#define _FPUSW_SHIFT 51
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#define __excb() __asm __volatile("excb")
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#define __mf_fpcr(__cw) __asm __volatile("mf_fpcr %0" : "=f" (*(__cw)))
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#define __mt_fpcr(__cw) __asm __volatile("mt_fpcr %0" : : "f" (__cw))
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union __fpcr {
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double __d;
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fenv_t __bits;
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};
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__BEGIN_DECLS
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/* Default floating-point environment */
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extern const fenv_t __fe_dfl_env;
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#define FE_DFL_ENV (&__fe_dfl_env)
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static __inline int
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feclearexcept(int __excepts)
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{
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union __fpcr __r;
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__excb();
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__mf_fpcr(&__r.__d);
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__r.__bits &= ~((fenv_t)__excepts << _FPUSW_SHIFT);
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__mt_fpcr(__r.__d);
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__excb();
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return (0);
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}
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static __inline int
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fegetexceptflag(fexcept_t *__flagp, int __excepts)
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{
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union __fpcr __r;
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__excb();
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__mf_fpcr(&__r.__d);
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__excb();
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*__flagp = (__r.__bits >> _FPUSW_SHIFT) & __excepts;
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return (0);
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}
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static __inline int
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fesetexceptflag(const fexcept_t *__flagp, int __excepts)
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{
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union __fpcr __r;
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fenv_t __xflag, __xexcepts;
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__xflag = (fenv_t)*__flagp << _FPUSW_SHIFT;
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__xexcepts = (fenv_t)__excepts << _FPUSW_SHIFT;
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__excb();
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__mf_fpcr(&__r.__d);
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__r.__bits &= ~__xexcepts;
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__r.__bits |= __xflag & __xexcepts;
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__mt_fpcr(__r.__d);
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__excb();
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return (0);
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}
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static __inline int
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feraiseexcept(int __excepts)
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{
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/*
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* XXX Generating exceptions this way does not actually invoke
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* a userland trap handler when enabled, but neither do
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* arithmetic operations as far as I can tell. Perhaps there
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* are more bugs in the kernel trap handler.
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*/
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fexcept_t __ex = __excepts;
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fesetexceptflag(&__ex, __excepts);
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return (0);
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}
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static __inline int
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fetestexcept(int __excepts)
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{
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union __fpcr __r;
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__excb();
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__mf_fpcr(&__r.__d);
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__excb();
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return ((__r.__bits >> _FPUSW_SHIFT) & __excepts);
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}
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static __inline int
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fegetround(void)
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{
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union __fpcr __r;
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/*
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* No exception barriers should be required here if we assume
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* that only fesetround() can change the rounding mode.
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*/
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__mf_fpcr(&__r.__d);
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return ((int)(__r.__bits >> _ROUND_SHIFT) & _ROUND_MASK);
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}
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static __inline int
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fesetround(int __round)
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{
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union __fpcr __r;
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if (__round & ~_ROUND_MASK)
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return (-1);
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__excb();
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__mf_fpcr(&__r.__d);
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__r.__bits &= ~((fenv_t)_ROUND_MASK << _ROUND_SHIFT);
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__r.__bits |= (fenv_t)__round << _ROUND_SHIFT;
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__mt_fpcr(__r.__d);
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__excb();
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return (0);
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}
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int fegetenv(fenv_t *__envp);
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int feholdexcept(fenv_t *__envp);
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int fesetenv(const fenv_t *__envp);
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int feupdateenv(const fenv_t *__envp);
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#if __BSD_VISIBLE
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int fesetmask(int __mask);
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int fegetmask(void);
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#endif /* __BSD_VISIBLE */
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__END_DECLS
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#endif /* !_FENV_H_ */
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