2005-01-06 01:43:34 +00:00
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/*-
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1995-04-23 18:31:50 +00:00
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* All Rights Reserved, Copyright (C) Fujitsu Limited 1995
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*
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* This software may be used, modified, copied, distributed, and sold, in
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* both source and binary form provided that the above copyright, these
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* terms and the following disclaimer are retained. The name of the author
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* and/or the contributor may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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2003-08-24 17:55:58 +00:00
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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1995-04-23 18:31:50 +00:00
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/*
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1996-03-17 08:36:38 +00:00
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*
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1995-04-23 18:31:50 +00:00
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* Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
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1996-03-17 08:36:38 +00:00
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* Contributed by M. Sekiguchi. <seki@sysrap.cs.fujitsu.co.jp>
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1995-04-23 18:31:50 +00:00
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*
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* This version is intended to be a generic template for various
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* MB86960A/MB86965A based Ethernet cards. It currently supports
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1996-03-17 08:36:38 +00:00
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* Fujitsu FMV-180 series for ISA and Allied-Telesis AT1700/RE2000
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2005-09-22 05:52:54 +00:00
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* series for ISA, as well as Fujitsu MBH10302 PC Card.
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1996-03-17 08:36:38 +00:00
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* There are some currently-
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* unused hooks embedded, which are primarily intended to support
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1995-04-23 18:31:50 +00:00
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* other types of Ethernet cards, but the author is not sure whether
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* they are useful.
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*
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1998-12-15 15:51:37 +00:00
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* This version also includes some alignments to support RE1000,
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* C-NET(98)P2 and so on. These cards are not for AT-compatibles,
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* but for NEC PC-98 bus -- a proprietary bus architecture available
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* only in Japan. Confusingly, it is different from the Microsoft's
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* PC98 architecture. :-{
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* Further work for PC-98 version will be available as a part of
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* FreeBSD(98) project.
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1996-03-17 08:36:38 +00:00
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*
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1995-04-23 18:31:50 +00:00
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* This software is a derivative work of if_ed.c version 1.56 by David
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* Greenman available as a part of FreeBSD 2.0 RELEASE source distribution.
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*
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* The following lines are retained from the original if_ed.c:
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*
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* Copyright (C) 1993, David Greenman. This software may be used, modified,
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* copied, distributed, and sold, in both source and binary form provided
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* that the above copyright and these terms are retained. Under no
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* circumstances is the author responsible for the proper functioning
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* of this software, nor does the author assume any responsibility
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* for damages incurred with its use.
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*/
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1996-03-17 08:36:38 +00:00
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/*
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* TODO:
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* o To support ISA PnP auto configuration for FMV-183/184.
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2000-09-14 12:02:07 +00:00
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* o To support REX-9886/87(PC-98 only).
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1996-03-17 08:36:38 +00:00
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* o To reconsider mbuf usage.
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* o To reconsider transmission buffer usage, including
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* transmission buffer size (currently 4KB x 2) and pros-and-
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* cons of multiple frame transmission.
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* o To test IPX codes.
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2000-09-14 12:02:07 +00:00
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* o To test new-bus frontend.
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1996-03-17 08:36:38 +00:00
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*/
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1995-04-23 18:31:50 +00:00
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#include <sys/param.h>
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#include <sys/systm.h>
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2000-09-14 12:02:07 +00:00
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#include <sys/socket.h>
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1997-03-24 11:33:46 +00:00
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#include <sys/sockio.h>
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1995-04-23 18:31:50 +00:00
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#include <sys/mbuf.h>
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2000-09-14 12:02:07 +00:00
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2000-05-28 13:40:48 +00:00
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#include <sys/bus.h>
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2000-09-14 12:02:07 +00:00
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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1995-04-23 18:31:50 +00:00
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1999-08-18 22:14:24 +00:00
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#include <net/ethernet.h>
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1995-04-23 18:31:50 +00:00
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#include <net/if.h>
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#include <net/if_dl.h>
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1998-12-15 15:51:37 +00:00
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#include <net/if_mib.h>
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#include <net/if_media.h>
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2005-06-10 16:49:24 +00:00
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#include <net/if_types.h>
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1995-04-23 18:31:50 +00:00
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1999-08-18 22:14:24 +00:00
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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1995-04-23 18:31:50 +00:00
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#include <net/bpf.h>
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2005-02-20 19:33:13 +00:00
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#include <dev/fe/mb86960.h>
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2000-09-14 12:02:07 +00:00
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#include <dev/fe/if_fereg.h>
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#include <dev/fe/if_fevar.h>
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1995-04-23 18:31:50 +00:00
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/*
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1996-03-17 08:36:38 +00:00
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* Transmit just one packet per a "send" command to 86960.
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1995-04-23 18:31:50 +00:00
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* This option is intended for performance test. An EXPERIMENTAL option.
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*/
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#ifndef FE_SINGLE_TRANSMISSION
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#define FE_SINGLE_TRANSMISSION 0
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#endif
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1998-12-15 15:51:37 +00:00
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/*
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* Maximum loops when interrupt.
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* This option prevents an infinite loop due to hardware failure.
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2005-09-22 05:52:54 +00:00
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* (Some laptops make an infinite loop after PC Card is ejected.)
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1998-12-15 15:51:37 +00:00
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*/
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#ifndef FE_MAX_LOOP
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#define FE_MAX_LOOP 0x800
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#endif
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1995-04-23 18:31:50 +00:00
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/*
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* Device configuration flags.
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*/
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/* DLCR6 settings. */
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#define FE_FLAGS_DLCR6_VALUE 0x007F
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/* Force DLCR6 override. */
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#define FE_FLAGS_OVERRIDE_DLCR6 0x0080
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2000-09-14 12:02:07 +00:00
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devclass_t fe_devclass;
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1995-04-23 18:31:50 +00:00
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/*
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* Special filter values.
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*/
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static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING };
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static struct fe_filter const fe_filter_all = { FE_FILTER_ALL };
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/* Standard driver entry points. These can be static. */
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2000-09-14 12:02:07 +00:00
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static void fe_init (void *);
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2000-09-15 19:09:15 +00:00
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static driver_intr_t fe_intr;
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2000-09-14 12:02:07 +00:00
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static int fe_ioctl (struct ifnet *, u_long, caddr_t);
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static void fe_start (struct ifnet *);
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static void fe_watchdog (struct ifnet *);
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static int fe_medchange (struct ifnet *);
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static void fe_medstat (struct ifnet *, struct ifmediareq *);
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1995-04-23 18:31:50 +00:00
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/* Local functions. Order of declaration is confused. FIXME. */
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static int fe_get_packet ( struct fe_softc *, u_short );
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static void fe_tint ( struct fe_softc *, u_char );
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static void fe_rint ( struct fe_softc *, u_char );
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static void fe_xmit ( struct fe_softc * );
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static void fe_write_mbufs ( struct fe_softc *, struct mbuf * );
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static void fe_setmode ( struct fe_softc * );
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static void fe_loadmar ( struct fe_softc * );
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1998-12-15 15:51:37 +00:00
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#ifdef DIAGNOSTIC
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static void fe_emptybuffer ( struct fe_softc * );
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1995-04-23 18:31:50 +00:00
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#endif
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/*
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* Fe driver specific constants which relate to 86960/86965.
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*/
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/* Interrupt masks */
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#define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE )
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#define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \
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| FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY )
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1996-03-17 08:36:38 +00:00
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/* Maximum number of iterations for a receive interrupt. */
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1995-04-23 18:31:50 +00:00
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#define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 )
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1996-03-17 08:36:38 +00:00
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/*
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* Maximum size of SRAM is 65536,
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1995-04-23 18:31:50 +00:00
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* minimum size of transmission buffer in fe is 2x2KB,
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* and minimum amount of received packet including headers
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* added by the chip is 64 bytes.
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* Hence FE_MAX_RECV_COUNT is the upper limit for number
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1996-03-17 08:36:38 +00:00
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* of packets in the receive buffer.
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*/
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1995-04-23 18:31:50 +00:00
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1998-12-15 15:51:37 +00:00
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/*
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* Miscellaneous definitions not directly related to hardware.
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*/
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/* The following line must be delete when "net/if_media.h" support it. */
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#ifndef IFM_10_FL
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#define IFM_10_FL /* 13 */ IFM_10_5
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#endif
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#if 0
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/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
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static int const bit2media [] = {
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IFM_HDX | IFM_ETHER | IFM_AUTO,
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IFM_HDX | IFM_ETHER | IFM_MANUAL,
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IFM_HDX | IFM_ETHER | IFM_10_T,
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IFM_HDX | IFM_ETHER | IFM_10_2,
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IFM_HDX | IFM_ETHER | IFM_10_5,
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IFM_HDX | IFM_ETHER | IFM_10_FL,
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IFM_FDX | IFM_ETHER | IFM_10_T,
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/* More can be come here... */
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0
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};
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#else
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/* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
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static int const bit2media [] = {
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IFM_ETHER | IFM_AUTO,
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IFM_ETHER | IFM_MANUAL,
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IFM_ETHER | IFM_10_T,
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IFM_ETHER | IFM_10_2,
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IFM_ETHER | IFM_10_5,
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IFM_ETHER | IFM_10_FL,
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IFM_ETHER | IFM_10_T,
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/* More can be come here... */
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0
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};
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#endif
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1995-04-23 18:31:50 +00:00
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/*
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* Check for specific bits in specific registers have specific values.
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1998-12-15 15:51:37 +00:00
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* A common utility function called from various sub-probe routines.
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1995-04-23 18:31:50 +00:00
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*/
|
2000-09-14 12:02:07 +00:00
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int
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fe_simple_probe (struct fe_softc const * sc,
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struct fe_simple_probe_struct const * sp)
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1995-04-23 18:31:50 +00:00
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{
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2000-09-14 12:02:07 +00:00
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struct fe_simple_probe_struct const *p;
|
2005-02-20 19:33:13 +00:00
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int8_t bits;
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1995-04-23 18:31:50 +00:00
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2000-09-14 12:02:07 +00:00
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for (p = sp; p->mask != 0; p++) {
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2005-02-20 19:33:13 +00:00
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bits = fe_inb(sc, p->port);
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printf("port %d, mask %x, bits %x read %x\n", p->port,
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p->mask, p->bits, bits);
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if ((bits & p->mask) != p->bits)
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2000-09-14 12:02:07 +00:00
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return 0;
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1995-04-23 18:31:50 +00:00
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}
|
2000-09-14 12:02:07 +00:00
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return 1;
|
1995-04-23 18:31:50 +00:00
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}
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1998-12-15 15:51:37 +00:00
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/* Test if a given 6 byte value is a valid Ethernet station (MAC)
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address. "Vendor" is an expected vendor code (first three bytes,)
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or a zero when nothing expected. */
|
2000-09-14 12:02:07 +00:00
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int
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2005-01-10 09:29:48 +00:00
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fe_valid_Ether_p (u_char const * addr, unsigned vendor)
|
1998-12-15 15:51:37 +00:00
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{
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#ifdef FE_DEBUG
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printf("fe?: validating %6D against %06x\n", addr, ":", vendor);
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#endif
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/* All zero is not allowed as a vendor code. */
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if (addr[0] == 0 && addr[1] == 0 && addr[2] == 0) return 0;
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switch (vendor) {
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case 0x000000:
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/* Legal Ethernet address (stored in ROM) must have
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its Group and Local bits cleared. */
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if ((addr[0] & 0x03) != 0) return 0;
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break;
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case 0x020000:
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/* Same as above, but a local address is allowed in
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this context. */
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2004-10-07 20:56:29 +00:00
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if (ETHER_IS_MULTICAST(addr)) return 0;
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1998-12-15 15:51:37 +00:00
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break;
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default:
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/* Make sure the vendor part matches if one is given. */
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if ( addr[0] != ((vendor >> 16) & 0xFF)
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|| addr[1] != ((vendor >> 8) & 0xFF)
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|| addr[2] != ((vendor ) & 0xFF)) return 0;
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break;
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}
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/* Host part must not be all-zeros nor all-ones. */
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if (addr[3] == 0xFF && addr[4] == 0xFF && addr[5] == 0xFF) return 0;
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if (addr[3] == 0x00 && addr[4] == 0x00 && addr[5] == 0x00) return 0;
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/* Given addr looks like an Ethernet address. */
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return 1;
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}
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/* Fill our softc struct with default value. */
|
2000-09-14 12:02:07 +00:00
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void
|
1998-12-15 15:51:37 +00:00
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fe_softc_defaults (struct fe_softc *sc)
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{
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/* Prepare for typical register prototypes. We assume a
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"typical" board has <32KB> of <fast> SRAM connected with a
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<byte-wide> data lines. */
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sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
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sc->proto_dlcr5 = 0;
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sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
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| FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
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sc->proto_dlcr7 = FE_D7_BYTSWP_LH;
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sc->proto_bmpr13 = 0;
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/* Assume the probe process (to be done later) is stable. */
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sc->stability = 0;
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/* A typical board needs no hooks. */
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sc->init = NULL;
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sc->stop = NULL;
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|
|
/* Assume the board has no software-controllable media selection. */
|
|
|
|
sc->mbitmap = MB_HM;
|
|
|
|
sc->defmedia = MB_HM;
|
|
|
|
sc->msel = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Common error reporting routine used in probe routines for
|
|
|
|
"soft configured IRQ"-type boards. */
|
2000-09-14 12:02:07 +00:00
|
|
|
void
|
1998-12-15 15:51:37 +00:00
|
|
|
fe_irq_failure (char const *name, int unit, int irq, char const *list)
|
|
|
|
{
|
|
|
|
printf("fe%d: %s board is detected, but %s IRQ was given\n",
|
|
|
|
unit, name, (irq == NO_IRQ ? "no" : "invalid"));
|
|
|
|
if (list != NULL) {
|
|
|
|
printf("fe%d: specify an IRQ from %s in kernel config\n",
|
|
|
|
unit, list);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
2000-09-14 12:02:07 +00:00
|
|
|
* Hardware (vendor) specific hooks.
|
1998-12-15 15:51:37 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Generic media selection scheme for MB86965 based boards.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
void
|
1998-12-15 15:51:37 +00:00
|
|
|
fe_msel_965 (struct fe_softc *sc)
|
|
|
|
{
|
|
|
|
u_char b13;
|
|
|
|
|
|
|
|
/* Find the appropriate bits for BMPR13 tranceiver control. */
|
|
|
|
switch (IFM_SUBTYPE(sc->media.ifm_media)) {
|
|
|
|
case IFM_AUTO: b13 = FE_B13_PORT_AUTO | FE_B13_TPTYPE_UTP; break;
|
|
|
|
case IFM_10_T: b13 = FE_B13_PORT_TP | FE_B13_TPTYPE_UTP; break;
|
|
|
|
default: b13 = FE_B13_PORT_AUI; break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Write it into the register. It takes effect immediately. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_BMPR13, sc->proto_bmpr13 | b13);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/*
|
|
|
|
* Fujitsu MB86965 JLI mode support routines.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/*
|
|
|
|
* Routines to read all bytes from the config EEPROM through MB86965A.
|
|
|
|
* It is a MicroWire (3-wire) serial EEPROM with 6-bit address.
|
|
|
|
* (93C06 or 93C46.)
|
|
|
|
*/
|
1996-03-17 08:36:38 +00:00
|
|
|
static void
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_strobe_eeprom_jli (struct fe_softc *sc, u_short bmpr16)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
|
|
|
/*
|
1998-12-15 15:51:37 +00:00
|
|
|
* We must guarantee 1us (or more) interval to access slow
|
1996-03-17 08:36:38 +00:00
|
|
|
* EEPROMs. The following redundant code provides enough
|
|
|
|
* delay with ISA timing. (Even if the bus clock is "tuned.")
|
|
|
|
* Some modification will be needed on faster busses.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, bmpr16, FE_B16_SELECT);
|
|
|
|
fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
|
|
|
|
fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK);
|
|
|
|
fe_outb(sc, bmpr16, FE_B16_SELECT);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
void
|
|
|
|
fe_read_eeprom_jli (struct fe_softc * sc, u_char * data)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
|
|
|
u_char n, val, bit;
|
1998-12-15 15:51:37 +00:00
|
|
|
u_char save16, save17;
|
|
|
|
|
|
|
|
/* Save the current value of the EEPROM interface registers. */
|
2000-09-14 12:02:07 +00:00
|
|
|
save16 = fe_inb(sc, FE_BMPR16);
|
|
|
|
save17 = fe_inb(sc, FE_BMPR17);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1996-03-17 08:36:38 +00:00
|
|
|
/* Read bytes from EEPROM; two bytes per an iteration. */
|
2000-09-14 12:02:07 +00:00
|
|
|
for (n = 0; n < JLI_EEPROM_SIZE / 2; n++) {
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Reset the EEPROM interface. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_BMPR16, 0x00);
|
|
|
|
fe_outb(sc, FE_BMPR17, 0x00);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Start EEPROM access. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_BMPR16, FE_B16_SELECT);
|
|
|
|
fe_outb(sc, FE_BMPR17, FE_B17_DATA);
|
|
|
|
fe_strobe_eeprom_jli(sc, FE_BMPR16);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/* Pass the iteration count as well as a READ command. */
|
1995-04-23 18:31:50 +00:00
|
|
|
val = 0x80 | n;
|
2000-09-14 12:02:07 +00:00
|
|
|
for (bit = 0x80; bit != 0x00; bit >>= 1) {
|
|
|
|
fe_outb(sc, FE_BMPR17, (val & bit) ? FE_B17_DATA : 0);
|
|
|
|
fe_strobe_eeprom_jli(sc, FE_BMPR16);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_BMPR17, 0x00);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Read a byte. */
|
|
|
|
val = 0;
|
2000-09-14 12:02:07 +00:00
|
|
|
for (bit = 0x80; bit != 0x00; bit >>= 1) {
|
|
|
|
fe_strobe_eeprom_jli(sc, FE_BMPR16);
|
|
|
|
if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA)
|
1995-04-23 18:31:50 +00:00
|
|
|
val |= bit;
|
|
|
|
}
|
|
|
|
*data++ = val;
|
|
|
|
|
|
|
|
/* Read one more byte. */
|
|
|
|
val = 0;
|
2000-09-14 12:02:07 +00:00
|
|
|
for (bit = 0x80; bit != 0x00; bit >>= 1) {
|
|
|
|
fe_strobe_eeprom_jli(sc, FE_BMPR16);
|
|
|
|
if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA)
|
1995-04-23 18:31:50 +00:00
|
|
|
val |= bit;
|
|
|
|
}
|
|
|
|
*data++ = val;
|
|
|
|
}
|
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
#if 0
|
1996-03-17 08:36:38 +00:00
|
|
|
/* Reset the EEPROM interface, again. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_BMPR16, 0x00);
|
|
|
|
fe_outb(sc, FE_BMPR17, 0x00);
|
1998-12-15 15:51:37 +00:00
|
|
|
#else
|
|
|
|
/* Make sure to restore the original value of EEPROM interface
|
|
|
|
registers, since we are not yet sure we have MB86965A on
|
|
|
|
the address. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_BMPR17, save17);
|
|
|
|
fe_outb(sc, FE_BMPR16, save16);
|
1998-12-15 15:51:37 +00:00
|
|
|
#endif
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
#if 1
|
1995-04-23 18:31:50 +00:00
|
|
|
/* Report what we got. */
|
1998-12-15 15:51:37 +00:00
|
|
|
if (bootverbose) {
|
|
|
|
int i;
|
|
|
|
data -= JLI_EEPROM_SIZE;
|
|
|
|
for (i = 0; i < JLI_EEPROM_SIZE; i += 16) {
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp,
|
|
|
|
"EEPROM(JLI):%3x: %16D\n", i, data + i, " ");
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
void
|
1998-12-15 15:51:37 +00:00
|
|
|
fe_init_jli (struct fe_softc * sc)
|
|
|
|
{
|
|
|
|
/* "Reset" by writing into a magic location. */
|
|
|
|
DELAY(200);
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, 0x1E, fe_inb(sc, 0x1E));
|
1998-12-15 15:51:37 +00:00
|
|
|
DELAY(300);
|
|
|
|
}
|
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
1998-12-15 15:51:37 +00:00
|
|
|
* SSi 78Q8377A support routines.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
1998-12-15 15:51:37 +00:00
|
|
|
* Routines to read all bytes from the config EEPROM through 78Q8377A.
|
|
|
|
* It is a MicroWire (3-wire) serial EEPROM with 8-bit address. (I.e.,
|
2000-09-14 12:02:07 +00:00
|
|
|
* 93C56 or 93C66.)
|
|
|
|
*
|
|
|
|
* As I don't have SSi manuals, (hmm, an old song again!) I'm not exactly
|
|
|
|
* sure the following code is correct... It is just stolen from the
|
|
|
|
* C-NET(98)P2 support routine in FreeBSD(98).
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
|
|
|
|
void
|
|
|
|
fe_read_eeprom_ssi (struct fe_softc *sc, u_char *data)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
u_char val, bit;
|
|
|
|
int n;
|
|
|
|
u_char save6, save7, save12;
|
1996-11-15 16:15:56 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Save the current value for the DLCR registers we are about
|
|
|
|
to destroy. */
|
|
|
|
save6 = fe_inb(sc, FE_DLCR6);
|
|
|
|
save7 = fe_inb(sc, FE_DLCR7);
|
1998-12-15 15:51:37 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Put the 78Q8377A into a state that we can access the EEPROM. */
|
|
|
|
fe_outb(sc, FE_DLCR6,
|
|
|
|
FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_DLC_DISABLE);
|
|
|
|
fe_outb(sc, FE_DLCR7,
|
|
|
|
FE_D7_BYTSWP_LH | FE_D7_RBS_BMPR | FE_D7_RDYPNS | FE_D7_POWER_UP);
|
1998-12-15 15:51:37 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Save the current value for the BMPR12 register, too. */
|
|
|
|
save12 = fe_inb(sc, FE_DLCR12);
|
1998-12-15 15:51:37 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Read bytes from EEPROM; two bytes per an iteration. */
|
|
|
|
for (n = 0; n < SSI_EEPROM_SIZE / 2; n++) {
|
1998-12-15 15:51:37 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Start EEPROM access */
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP);
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
|
1998-12-15 15:51:37 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Send the following four bits to the EEPROM in the
|
|
|
|
specified order: a dummy bit, a start bit, and
|
|
|
|
command bits (10) for READ. */
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL );
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT);
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT);
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL );
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
|
1996-11-15 16:15:56 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Pass the iteration count to the chip. */
|
|
|
|
for (bit = 0x80; bit != 0x00; bit >>= 1) {
|
|
|
|
val = ( n & bit ) ? SSI_DAT : 0;
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | val);
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | val);
|
|
|
|
}
|
1998-12-15 15:51:37 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Read a byte. */
|
|
|
|
val = 0;
|
|
|
|
for (bit = 0x80; bit != 0x00; bit >>= 1) {
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK);
|
|
|
|
if (fe_inb(sc, FE_DLCR12) & SSI_DIN)
|
|
|
|
val |= bit;
|
|
|
|
}
|
|
|
|
*data++ = val;
|
1998-12-15 15:51:37 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Read one more byte. */
|
|
|
|
val = 0;
|
|
|
|
for (bit = 0x80; bit != 0x00; bit >>= 1) {
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL);
|
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK);
|
|
|
|
if (fe_inb(sc, FE_DLCR12) & SSI_DIN)
|
|
|
|
val |= bit;
|
|
|
|
}
|
|
|
|
*data++ = val;
|
1996-11-15 16:15:56 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR12, SSI_EEP);
|
|
|
|
}
|
1996-11-15 16:15:56 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Reset the EEPROM interface. (For now.) */
|
|
|
|
fe_outb(sc, FE_DLCR12, 0x00);
|
1998-12-15 15:51:37 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Restore the saved register values, for the case that we
|
|
|
|
didn't have 78Q8377A at the given address. */
|
|
|
|
fe_outb(sc, FE_DLCR12, save12);
|
|
|
|
fe_outb(sc, FE_DLCR7, save7);
|
|
|
|
fe_outb(sc, FE_DLCR6, save6);
|
1998-12-15 15:51:37 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
#if 1
|
|
|
|
/* Report what we got. */
|
|
|
|
if (bootverbose) {
|
|
|
|
int i;
|
|
|
|
data -= SSI_EEPROM_SIZE;
|
|
|
|
for (i = 0; i < SSI_EEPROM_SIZE; i += 16) {
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp,
|
|
|
|
"EEPROM(SSI):%3x: %16D\n", i, data + i, " ");
|
2000-09-14 12:02:07 +00:00
|
|
|
}
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
1996-11-15 16:15:56 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/*
|
2000-09-14 12:02:07 +00:00
|
|
|
* TDK/LANX boards support routines.
|
1998-12-15 15:51:37 +00:00
|
|
|
*/
|
1996-11-15 16:15:56 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* It is assumed that the CLK line is low and SDA is high (float) upon entry. */
|
|
|
|
#define LNX_PH(D,K,N) \
|
|
|
|
((LNX_SDA_##D | LNX_CLK_##K) << N)
|
|
|
|
#define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \
|
|
|
|
(LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24))
|
|
|
|
|
|
|
|
#define LNX_CYCLE_START LNX_CYCLE(HI,LO,LO,HI, HI,HI,LO,LO)
|
|
|
|
#define LNX_CYCLE_STOP LNX_CYCLE(LO,LO,HI,HI, LO,HI,HI,LO)
|
|
|
|
#define LNX_CYCLE_HI LNX_CYCLE(HI,HI,HI,HI, LO,HI,LO,LO)
|
|
|
|
#define LNX_CYCLE_LO LNX_CYCLE(LO,LO,LO,HI, LO,HI,LO,LO)
|
|
|
|
#define LNX_CYCLE_INIT LNX_CYCLE(LO,HI,HI,HI, LO,LO,LO,LO)
|
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
static void
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_eeprom_cycle_lnx (struct fe_softc *sc, u_short reg20, u_long cycle)
|
1998-12-15 15:51:37 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, reg20, (cycle ) & 0xFF);
|
|
|
|
DELAY(15);
|
|
|
|
fe_outb(sc, reg20, (cycle >> 8) & 0xFF);
|
|
|
|
DELAY(15);
|
|
|
|
fe_outb(sc, reg20, (cycle >> 16) & 0xFF);
|
|
|
|
DELAY(15);
|
|
|
|
fe_outb(sc, reg20, (cycle >> 24) & 0xFF);
|
|
|
|
DELAY(15);
|
|
|
|
}
|
1996-11-15 16:15:56 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
static u_char
|
|
|
|
fe_eeprom_receive_lnx (struct fe_softc *sc, u_short reg20)
|
|
|
|
{
|
|
|
|
u_char dat;
|
1996-11-15 16:15:56 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, reg20, LNX_CLK_HI | LNX_SDA_FL);
|
|
|
|
DELAY(15);
|
|
|
|
dat = fe_inb(sc, reg20);
|
|
|
|
fe_outb(sc, reg20, LNX_CLK_LO | LNX_SDA_FL);
|
|
|
|
DELAY(15);
|
|
|
|
return (dat & LNX_SDA_IN);
|
1996-11-15 16:15:56 +00:00
|
|
|
}
|
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
void
|
|
|
|
fe_read_eeprom_lnx (struct fe_softc *sc, u_char *data)
|
1996-11-15 16:15:56 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
int i;
|
|
|
|
u_char n, bit, val;
|
|
|
|
u_char save20;
|
|
|
|
u_short reg20 = 0x14;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
save20 = fe_inb(sc, reg20);
|
|
|
|
|
|
|
|
/* NOTE: DELAY() timing constants are approximately three
|
|
|
|
times longer (slower) than the required minimum. This is
|
|
|
|
to guarantee a reliable operation under some tough
|
|
|
|
conditions... Fortunately, this routine is only called
|
|
|
|
during the boot phase, so the speed is less important than
|
|
|
|
stability. */
|
|
|
|
|
|
|
|
#if 1
|
|
|
|
/* Reset the X24C01's internal state machine and put it into
|
|
|
|
the IDLE state. We usually don't need this, but *if*
|
|
|
|
someone (e.g., probe routine of other driver) write some
|
|
|
|
garbage into the register at 0x14, synchronization will be
|
|
|
|
lost, and the normal EEPROM access protocol won't work.
|
|
|
|
Moreover, as there are no easy way to reset, we need a
|
|
|
|
_manoeuvre_ here. (It even lacks a reset pin, so pushing
|
|
|
|
the RESET button on the PC doesn't help!) */
|
|
|
|
fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_INIT);
|
|
|
|
for (i = 0; i < 10; i++)
|
|
|
|
fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START);
|
|
|
|
fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP);
|
|
|
|
DELAY(10000);
|
1995-04-23 18:31:50 +00:00
|
|
|
#endif
|
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Issue a start condition. */
|
|
|
|
fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START);
|
|
|
|
|
|
|
|
/* Send seven bits of the starting address (zero, in this
|
|
|
|
case) and a command bit for READ. */
|
|
|
|
val = 0x01;
|
|
|
|
for (bit = 0x80; bit != 0x00; bit >>= 1) {
|
|
|
|
if (val & bit) {
|
|
|
|
fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_HI);
|
|
|
|
} else {
|
|
|
|
fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO);
|
|
|
|
}
|
1996-03-17 08:36:38 +00:00
|
|
|
}
|
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Receive an ACK bit. */
|
|
|
|
if (fe_eeprom_receive_lnx(sc, reg20)) {
|
|
|
|
/* ACK was not received. EEPROM is not present (i.e.,
|
|
|
|
this board was not a TDK/LANX) or not working
|
|
|
|
properly. */
|
|
|
|
if (bootverbose) {
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp,
|
|
|
|
"no ACK received from EEPROM(LNX)\n");
|
2000-09-14 12:02:07 +00:00
|
|
|
}
|
|
|
|
/* Clear the given buffer to indicate we could not get
|
|
|
|
any info. and return. */
|
|
|
|
bzero(data, LNX_EEPROM_SIZE);
|
|
|
|
goto RET;
|
|
|
|
}
|
1998-12-15 15:51:37 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Read bytes from EEPROM. */
|
|
|
|
for (n = 0; n < LNX_EEPROM_SIZE; n++) {
|
1995-04-23 18:31:50 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Read a byte and store it into the buffer. */
|
|
|
|
val = 0x00;
|
|
|
|
for (bit = 0x80; bit != 0x00; bit >>= 1) {
|
|
|
|
if (fe_eeprom_receive_lnx(sc, reg20))
|
|
|
|
val |= bit;
|
|
|
|
}
|
|
|
|
*data++ = val;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Acknowledge if we have to read more. */
|
|
|
|
if (n < LNX_EEPROM_SIZE - 1) {
|
|
|
|
fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO);
|
|
|
|
}
|
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Issue a STOP condition, de-activating the clock line.
|
|
|
|
It will be safer to keep the clock line low than to leave
|
|
|
|
it high. */
|
|
|
|
fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP);
|
1998-12-15 15:51:37 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
RET:
|
|
|
|
fe_outb(sc, reg20, save20);
|
|
|
|
|
|
|
|
#if 1
|
|
|
|
/* Report what we got. */
|
|
|
|
if (bootverbose) {
|
|
|
|
data -= LNX_EEPROM_SIZE;
|
|
|
|
for (i = 0; i < LNX_EEPROM_SIZE; i += 16) {
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp,
|
|
|
|
"EEPROM(LNX):%3x: %16D\n", i, data + i, " ");
|
2000-09-14 12:02:07 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
void
|
|
|
|
fe_init_lnx (struct fe_softc * sc)
|
|
|
|
{
|
|
|
|
/* Reset the 86960. Do we need this? FIXME. */
|
|
|
|
fe_outb(sc, 0x12, 0x06);
|
|
|
|
DELAY(100);
|
|
|
|
fe_outb(sc, 0x12, 0x07);
|
|
|
|
DELAY(100);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Setup IRQ control register on the ASIC. */
|
|
|
|
fe_outb(sc, 0x14, sc->priv_info);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
|
1996-11-15 16:15:56 +00:00
|
|
|
/*
|
2000-09-14 12:02:07 +00:00
|
|
|
* Ungermann-Bass boards support routine.
|
1996-11-15 16:15:56 +00:00
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
void
|
|
|
|
fe_init_ubn (struct fe_softc * sc)
|
1996-11-15 16:15:56 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Do we need this? FIXME. */
|
|
|
|
fe_outb(sc, FE_DLCR7,
|
|
|
|
sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
|
|
|
|
fe_outb(sc, 0x18, 0x00);
|
|
|
|
DELAY(200);
|
1996-11-15 16:15:56 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
/* Setup IRQ control register on the ASIC. */
|
|
|
|
fe_outb(sc, 0x14, sc->priv_info);
|
1996-11-15 16:15:56 +00:00
|
|
|
}
|
2000-09-14 12:02:07 +00:00
|
|
|
|
1996-11-15 16:15:56 +00:00
|
|
|
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
|
|
|
* Install interface into kernel networking data structures
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
int
|
|
|
|
fe_attach (device_t dev)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
struct fe_softc *sc = device_get_softc(dev);
|
2005-06-10 16:49:24 +00:00
|
|
|
struct ifnet *ifp;
|
2000-09-14 12:02:07 +00:00
|
|
|
int flags = device_get_flags(dev);
|
|
|
|
int b, error;
|
2005-06-10 16:49:24 +00:00
|
|
|
|
|
|
|
ifp = sc->ifp = if_alloc(IFT_ETHER);
|
|
|
|
if (ifp == NULL) {
|
|
|
|
device_printf(dev, "can not ifalloc\n");
|
|
|
|
return (ENOSPC);
|
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET,
|
|
|
|
fe_intr, sc, &sc->irq_handle);
|
|
|
|
if (error) {
|
2005-09-16 12:49:06 +00:00
|
|
|
if_free(ifp);
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_release_resource(dev);
|
|
|
|
return ENXIO;
|
|
|
|
}
|
1998-10-22 05:58:45 +00:00
|
|
|
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
|
|
|
* Initialize ifnet structure
|
|
|
|
*/
|
2005-06-10 16:49:24 +00:00
|
|
|
ifp->if_softc = sc;
|
|
|
|
if_initname(sc->ifp, device_get_name(dev), device_get_unit(dev));
|
|
|
|
ifp->if_start = fe_start;
|
|
|
|
ifp->if_ioctl = fe_ioctl;
|
|
|
|
ifp->if_watchdog = fe_watchdog;
|
|
|
|
ifp->if_init = fe_init;
|
|
|
|
ifp->if_linkmib = &sc->mibdata;
|
|
|
|
ifp->if_linkmiblen = sizeof (sc->mibdata);
|
1998-12-15 15:51:37 +00:00
|
|
|
|
|
|
|
#if 0 /* I'm not sure... */
|
|
|
|
sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
|
|
|
|
#endif
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
1998-12-15 15:51:37 +00:00
|
|
|
* Set fixed interface flags.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2005-06-10 16:49:24 +00:00
|
|
|
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST |
|
2004-08-13 23:08:08 +00:00
|
|
|
IFF_NEEDSGIANT;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
#if 1
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
|
|
|
* Set maximum size of output queue, if it has not been set.
|
|
|
|
* It is done here as this driver may be started after the
|
1996-03-17 08:36:38 +00:00
|
|
|
* system initialization (i.e., the interface is PCMCIA.)
|
1995-04-23 18:31:50 +00:00
|
|
|
*
|
|
|
|
* I'm not sure this is really necessary, but, even if it is,
|
|
|
|
* it should be done somewhere else, e.g., in if_attach(),
|
|
|
|
* since it must be a common workaround for all network drivers.
|
|
|
|
* FIXME.
|
|
|
|
*/
|
2005-06-10 16:49:24 +00:00
|
|
|
if (ifp->if_snd.ifq_maxlen == 0)
|
|
|
|
ifp->if_snd.ifq_maxlen = ifqmaxlen;
|
1995-04-23 18:31:50 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#if FE_SINGLE_TRANSMISSION
|
|
|
|
/* Override txb config to allocate minimum. */
|
|
|
|
sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
|
|
|
|
sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Modify hardware config if it is requested. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if (flags & FE_FLAGS_OVERRIDE_DLCR6)
|
|
|
|
sc->proto_dlcr6 = flags & FE_FLAGS_DLCR6_VALUE;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Find TX buffer size, based on the hardware dependent proto. */
|
2000-09-14 12:02:07 +00:00
|
|
|
switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
|
1995-04-23 18:31:50 +00:00
|
|
|
case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break;
|
|
|
|
case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break;
|
|
|
|
case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break;
|
|
|
|
default:
|
|
|
|
/* Oops, we can't work with single buffer configuration. */
|
1998-12-15 15:51:37 +00:00
|
|
|
if (bootverbose) {
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp,
|
|
|
|
"strange TXBSIZ config; fixing\n");
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
|
|
|
|
sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
|
|
|
|
sc->txb_size = 2048;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/* Initialize the if_media interface. */
|
2000-09-14 12:02:07 +00:00
|
|
|
ifmedia_init(&sc->media, 0, fe_medchange, fe_medstat);
|
1998-12-15 15:51:37 +00:00
|
|
|
for (b = 0; bit2media[b] != 0; b++) {
|
|
|
|
if (sc->mbitmap & (1 << b)) {
|
|
|
|
ifmedia_add(&sc->media, bit2media[b], 0, NULL);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
for (b = 0; bit2media[b] != 0; b++) {
|
|
|
|
if (sc->defmedia & (1 << b)) {
|
|
|
|
ifmedia_set(&sc->media, bit2media[b]);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#if 0 /* Turned off; this is called later, when the interface UPs. */
|
|
|
|
fe_medchange(sc);
|
|
|
|
#endif
|
|
|
|
|
1996-04-23 18:36:56 +00:00
|
|
|
/* Attach and stop the interface. */
|
2005-06-10 16:49:24 +00:00
|
|
|
ether_ifattach(sc->ifp, sc->enaddr);
|
1998-12-15 15:51:37 +00:00
|
|
|
fe_stop(sc);
|
1996-03-17 08:36:38 +00:00
|
|
|
|
|
|
|
/* Print additional info when attached. */
|
2004-03-14 07:12:25 +00:00
|
|
|
device_printf(dev, "type %s%s\n", sc->typestr,
|
2000-09-14 12:02:07 +00:00
|
|
|
(sc->proto_dlcr4 & FE_D4_DSC) ? ", full duplex" : "");
|
1998-12-15 15:51:37 +00:00
|
|
|
if (bootverbose) {
|
1995-04-23 18:31:50 +00:00
|
|
|
int buf, txb, bbw, sbw, ram;
|
|
|
|
|
|
|
|
buf = txb = bbw = sbw = ram = -1;
|
|
|
|
switch ( sc->proto_dlcr6 & FE_D6_BUFSIZ ) {
|
|
|
|
case FE_D6_BUFSIZ_8KB: buf = 8; break;
|
|
|
|
case FE_D6_BUFSIZ_16KB: buf = 16; break;
|
|
|
|
case FE_D6_BUFSIZ_32KB: buf = 32; break;
|
|
|
|
case FE_D6_BUFSIZ_64KB: buf = 64; break;
|
|
|
|
}
|
|
|
|
switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) {
|
|
|
|
case FE_D6_TXBSIZ_2x2KB: txb = 2; break;
|
|
|
|
case FE_D6_TXBSIZ_2x4KB: txb = 4; break;
|
|
|
|
case FE_D6_TXBSIZ_2x8KB: txb = 8; break;
|
|
|
|
}
|
|
|
|
switch ( sc->proto_dlcr6 & FE_D6_BBW ) {
|
|
|
|
case FE_D6_BBW_BYTE: bbw = 8; break;
|
|
|
|
case FE_D6_BBW_WORD: bbw = 16; break;
|
|
|
|
}
|
|
|
|
switch ( sc->proto_dlcr6 & FE_D6_SBW ) {
|
|
|
|
case FE_D6_SBW_BYTE: sbw = 8; break;
|
|
|
|
case FE_D6_SBW_WORD: sbw = 16; break;
|
|
|
|
}
|
|
|
|
switch ( sc->proto_dlcr6 & FE_D6_SRAM ) {
|
|
|
|
case FE_D6_SRAM_100ns: ram = 100; break;
|
|
|
|
case FE_D6_SRAM_150ns: ram = 150; break;
|
|
|
|
}
|
2000-09-14 12:02:07 +00:00
|
|
|
device_printf(dev, "SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
|
|
|
|
buf, bbw, ram, txb, sbw);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
2000-09-14 12:02:07 +00:00
|
|
|
if (sc->stability & UNSTABLE_IRQ)
|
|
|
|
device_printf(dev, "warning: IRQ number may be incorrect\n");
|
|
|
|
if (sc->stability & UNSTABLE_MAC)
|
|
|
|
device_printf(dev, "warning: above MAC address may be incorrect\n");
|
|
|
|
if (sc->stability & UNSTABLE_TYPE)
|
|
|
|
device_printf(dev, "warning: hardware type was not validated\n");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
fe_alloc_port(device_t dev, int size)
|
|
|
|
{
|
|
|
|
struct fe_softc *sc = device_get_softc(dev);
|
|
|
|
struct resource *res;
|
|
|
|
int rid;
|
|
|
|
|
|
|
|
rid = 0;
|
|
|
|
res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
|
|
|
|
0ul, ~0ul, size, RF_ACTIVE);
|
|
|
|
if (res) {
|
|
|
|
sc->port_used = size;
|
|
|
|
sc->port_res = res;
|
|
|
|
sc->iot = rman_get_bustag(res);
|
|
|
|
sc->ioh = rman_get_bushandle(res);
|
|
|
|
return (0);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
2000-09-14 12:02:07 +00:00
|
|
|
|
|
|
|
return (ENOENT);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
fe_alloc_irq(device_t dev, int flags)
|
|
|
|
{
|
|
|
|
struct fe_softc *sc = device_get_softc(dev);
|
|
|
|
struct resource *res;
|
|
|
|
int rid;
|
|
|
|
|
|
|
|
rid = 0;
|
2004-03-17 17:50:55 +00:00
|
|
|
res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | flags);
|
2000-09-14 12:02:07 +00:00
|
|
|
if (res) {
|
|
|
|
sc->irq_res = res;
|
|
|
|
return (0);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
return (ENOENT);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
fe_release_resource(device_t dev)
|
|
|
|
{
|
|
|
|
struct fe_softc *sc = device_get_softc(dev);
|
|
|
|
|
|
|
|
if (sc->port_res) {
|
|
|
|
bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->port_res);
|
|
|
|
sc->port_res = NULL;
|
|
|
|
}
|
|
|
|
if (sc->irq_res) {
|
|
|
|
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
|
|
|
|
sc->irq_res = NULL;
|
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1998-12-15 15:51:37 +00:00
|
|
|
* Reset interface, after some (hardware) trouble is deteced.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
1995-12-10 13:40:44 +00:00
|
|
|
static void
|
1998-12-15 15:51:37 +00:00
|
|
|
fe_reset (struct fe_softc *sc)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
1998-12-15 15:51:37 +00:00
|
|
|
/* Record how many packets are lost by this accident. */
|
2005-06-10 16:49:24 +00:00
|
|
|
sc->ifp->if_oerrors += sc->txb_sched + sc->txb_count;
|
1998-12-15 15:51:37 +00:00
|
|
|
sc->mibdata.dot3StatsInternalMacTransmitErrors++;
|
|
|
|
|
|
|
|
/* Put the interface into known initial state. */
|
|
|
|
fe_stop(sc);
|
2005-06-10 16:49:24 +00:00
|
|
|
if (sc->ifp->if_flags & IFF_UP)
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_init(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Stop everything on the interface.
|
|
|
|
*
|
|
|
|
* All buffered packets, both transmitting and receiving,
|
|
|
|
* if any, will be lost by stopping the interface.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
void
|
1998-12-15 15:51:37 +00:00
|
|
|
fe_stop (struct fe_softc *sc)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
|
|
|
int s;
|
|
|
|
|
|
|
|
s = splimp();
|
|
|
|
|
|
|
|
/* Disable interrupts. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR2, 0x00);
|
|
|
|
fe_outb(sc, FE_DLCR3, 0x00);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Stop interface hardware. */
|
2000-09-14 12:02:07 +00:00
|
|
|
DELAY(200);
|
|
|
|
fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
|
|
|
|
DELAY(200);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Clear all interrupt status. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR0, 0xFF);
|
|
|
|
fe_outb(sc, FE_DLCR1, 0xFF);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Put the chip in stand-by mode. */
|
2000-09-14 12:02:07 +00:00
|
|
|
DELAY(200);
|
|
|
|
fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN);
|
|
|
|
DELAY(200);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Reset transmitter variables and interface flags. */
|
2005-08-09 10:20:02 +00:00
|
|
|
sc->ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING);
|
2005-06-10 16:49:24 +00:00
|
|
|
sc->ifp->if_timer = 0;
|
1995-04-23 18:31:50 +00:00
|
|
|
sc->txb_free = sc->txb_size;
|
|
|
|
sc->txb_count = 0;
|
|
|
|
sc->txb_sched = 0;
|
|
|
|
|
|
|
|
/* MAR loading can be delayed. */
|
|
|
|
sc->filter_change = 0;
|
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/* Call a device-specific hook. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if (sc->stop)
|
|
|
|
sc->stop(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
(void) splx(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Device timeout/watchdog routine. Entered if the device neglects to
|
|
|
|
* generate an interrupt after a transmit has been started on it.
|
|
|
|
*/
|
1995-12-10 13:40:44 +00:00
|
|
|
static void
|
1995-12-05 02:01:59 +00:00
|
|
|
fe_watchdog ( struct ifnet *ifp )
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
2005-06-10 16:49:24 +00:00
|
|
|
struct fe_softc *sc = ifp->if_softc;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1996-03-17 08:36:38 +00:00
|
|
|
/* A "debug" message. */
|
2002-10-01 00:52:58 +00:00
|
|
|
if_printf(ifp, "transmission timeout (%d+%d)%s\n",
|
|
|
|
sc->txb_sched, sc->txb_count,
|
1998-12-15 15:51:37 +00:00
|
|
|
(ifp->if_flags & IFF_UP) ? "" : " when down");
|
2005-06-10 16:49:24 +00:00
|
|
|
if (sc->ifp->if_opackets == 0 && sc->ifp->if_ipackets == 0)
|
2002-10-01 00:52:58 +00:00
|
|
|
if_printf(ifp, "wrong IRQ setting in config?\n");
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_reset(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize device.
|
|
|
|
*/
|
1995-12-10 13:40:44 +00:00
|
|
|
static void
|
1998-12-15 15:51:37 +00:00
|
|
|
fe_init (void * xsc)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
1998-12-15 15:51:37 +00:00
|
|
|
struct fe_softc *sc = xsc;
|
1997-11-07 08:53:44 +00:00
|
|
|
int s;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Start initializing 86960. */
|
|
|
|
s = splimp();
|
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/* Call a hook before we start initializing the chip. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if (sc->init)
|
|
|
|
sc->init(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Make sure to disable the chip, also.
|
|
|
|
* This may also help re-programming the chip after
|
|
|
|
* hot insertion of PCMCIAs.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
DELAY(200);
|
|
|
|
fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
|
|
|
|
DELAY(200);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Power up the chip and select register bank for DLCRs. */
|
2000-09-14 12:02:07 +00:00
|
|
|
DELAY(200);
|
|
|
|
fe_outb(sc, FE_DLCR7,
|
|
|
|
sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
|
|
|
|
DELAY(200);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Feed the station address. */
|
2005-06-10 16:49:24 +00:00
|
|
|
fe_outblk(sc, FE_DLCR8, IFP2ENADDR(sc->ifp), ETHER_ADDR_LEN);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Clear multicast address filter to receive nothing. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR7,
|
|
|
|
sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
|
|
|
|
fe_outblk(sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Select the BMPR bank for runtime register access. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR7,
|
|
|
|
sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Initialize registers. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */
|
|
|
|
fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */
|
|
|
|
fe_outb(sc, FE_DLCR2, 0x00);
|
|
|
|
fe_outb(sc, FE_DLCR3, 0x00);
|
|
|
|
fe_outb(sc, FE_DLCR4, sc->proto_dlcr4);
|
|
|
|
fe_outb(sc, FE_DLCR5, sc->proto_dlcr5);
|
|
|
|
fe_outb(sc, FE_BMPR10, 0x00);
|
|
|
|
fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1);
|
|
|
|
fe_outb(sc, FE_BMPR12, 0x00);
|
|
|
|
fe_outb(sc, FE_BMPR13, sc->proto_bmpr13);
|
|
|
|
fe_outb(sc, FE_BMPR14, 0x00);
|
|
|
|
fe_outb(sc, FE_BMPR15, 0x00);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Enable interrupts. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR2, FE_TMASK);
|
|
|
|
fe_outb(sc, FE_DLCR3, FE_RMASK);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/* Select requested media, just before enabling DLC. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if (sc->msel)
|
|
|
|
sc->msel(sc);
|
1998-12-15 15:51:37 +00:00
|
|
|
|
1995-04-23 18:31:50 +00:00
|
|
|
/* Enable transmitter and receiver. */
|
2000-09-14 12:02:07 +00:00
|
|
|
DELAY(200);
|
|
|
|
fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
|
|
|
|
DELAY(200);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
#ifdef DIAGNOSTIC
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
|
|
|
* Make sure to empty the receive buffer.
|
|
|
|
*
|
|
|
|
* This may be redundant, but *if* the receive buffer were full
|
1996-11-15 16:15:56 +00:00
|
|
|
* at this point, then the driver would hang. I have experienced
|
1996-03-17 08:36:38 +00:00
|
|
|
* some strange hang-up just after UP. I hope the following
|
1995-04-23 18:31:50 +00:00
|
|
|
* code solve the problem.
|
|
|
|
*
|
|
|
|
* I have changed the order of hardware initialization.
|
|
|
|
* I think the receive buffer cannot have any packets at this
|
|
|
|
* point in this version. The following code *must* be
|
|
|
|
* redundant now. FIXME.
|
1996-11-15 16:15:56 +00:00
|
|
|
*
|
2005-09-22 05:52:54 +00:00
|
|
|
* I've heard a rumore that on some PC Card implementation of
|
1996-11-15 16:15:56 +00:00
|
|
|
* 8696x, the receive buffer can have some data at this point.
|
|
|
|
* The following message helps discovering the fact. FIXME.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (!(fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)) {
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp,
|
|
|
|
"receive buffer has some data after reset\n");
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_emptybuffer(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
1996-11-15 16:15:56 +00:00
|
|
|
/* Do we need this here? Actually, no. I must be paranoia. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */
|
|
|
|
fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */
|
1995-04-23 18:31:50 +00:00
|
|
|
#endif
|
1998-12-15 15:51:37 +00:00
|
|
|
|
1995-04-23 18:31:50 +00:00
|
|
|
/* Set 'running' flag, because we are now running. */
|
2005-08-09 10:20:02 +00:00
|
|
|
sc->ifp->if_drv_flags |= IFF_DRV_RUNNING;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
1996-03-17 08:36:38 +00:00
|
|
|
* At this point, the interface is running properly,
|
1995-04-23 18:31:50 +00:00
|
|
|
* except that it receives *no* packets. we then call
|
|
|
|
* fe_setmode() to tell the chip what packets to be
|
|
|
|
* received, based on the if_flags and multicast group
|
|
|
|
* list. It completes the initialization process.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_setmode(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
#if 0
|
1995-04-23 18:31:50 +00:00
|
|
|
/* ...and attempt to start output queued packets. */
|
1998-12-15 15:51:37 +00:00
|
|
|
/* TURNED OFF, because the semi-auto media prober wants to UP
|
|
|
|
the interface keeping it idle. The upper layer will soon
|
|
|
|
start the interface anyway, and there are no significant
|
|
|
|
delay. */
|
2005-06-10 16:49:24 +00:00
|
|
|
fe_start(sc->ifp);
|
1995-04-23 18:31:50 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
(void) splx(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This routine actually starts the transmission on the interface
|
|
|
|
*/
|
1996-03-17 08:36:38 +00:00
|
|
|
static void
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_xmit (struct fe_softc *sc)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Set a timer just in case we never hear from the board again.
|
|
|
|
* We use longer timeout for multiple packet transmission.
|
|
|
|
* I'm not sure this timer value is appropriate. FIXME.
|
|
|
|
*/
|
2005-06-10 16:49:24 +00:00
|
|
|
sc->ifp->if_timer = 1 + sc->txb_count;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Update txb variables. */
|
|
|
|
sc->txb_sched = sc->txb_count;
|
|
|
|
sc->txb_count = 0;
|
|
|
|
sc->txb_free = sc->txb_size;
|
1996-11-15 16:15:56 +00:00
|
|
|
sc->tx_excolls = 0;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Start transmitter, passing packets in TX buffer. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_BMPR10, sc->txb_sched | FE_B10_START);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Start output on interface.
|
|
|
|
* We make two assumptions here:
|
|
|
|
* 1) that the current priority is set to splimp _before_ this code
|
|
|
|
* is called *and* is returned to the appropriate priority after
|
|
|
|
* return
|
2005-08-09 10:20:02 +00:00
|
|
|
* 2) that the IFF_DRV_OACTIVE flag is checked before this code is called
|
1995-04-23 18:31:50 +00:00
|
|
|
* (i.e. that the output part of the interface is idle)
|
|
|
|
*/
|
2002-09-28 17:15:38 +00:00
|
|
|
static void
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_start (struct ifnet *ifp)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
1996-03-17 08:36:38 +00:00
|
|
|
struct fe_softc *sc = ifp->if_softc;
|
1995-04-23 18:31:50 +00:00
|
|
|
struct mbuf *m;
|
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
#ifdef DIAGNOSTIC
|
1995-04-23 18:31:50 +00:00
|
|
|
/* Just a sanity check. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
|
|
|
* Txb_count and txb_free co-works to manage the
|
|
|
|
* transmission buffer. Txb_count keeps track of the
|
|
|
|
* used potion of the buffer, while txb_free does unused
|
|
|
|
* potion. So, as long as the driver runs properly,
|
|
|
|
* txb_count is zero if and only if txb_free is same
|
|
|
|
* as txb_size (which represents whole buffer.)
|
|
|
|
*/
|
2002-10-01 00:52:58 +00:00
|
|
|
if_printf(ifp, "inconsistent txb variables (%d, %d)\n",
|
|
|
|
sc->txb_count, sc->txb_free);
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
|
|
|
* So, what should I do, then?
|
|
|
|
*
|
|
|
|
* We now know txb_count and txb_free contradicts. We
|
|
|
|
* cannot, however, tell which is wrong. More
|
|
|
|
* over, we cannot peek 86960 transmission buffer or
|
|
|
|
* reset the transmission buffer. (In fact, we can
|
|
|
|
* reset the entire interface. I don't want to do it.)
|
|
|
|
*
|
1996-03-17 08:36:38 +00:00
|
|
|
* If txb_count is incorrect, leaving it as-is will cause
|
|
|
|
* sending of garbage after next interrupt. We have to
|
1995-04-23 18:31:50 +00:00
|
|
|
* avoid it. Hence, we reset the txb_count here. If
|
|
|
|
* txb_free was incorrect, resetting txb_count just loose
|
|
|
|
* some packets. We can live with it.
|
|
|
|
*/
|
|
|
|
sc->txb_count = 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* First, see if there are buffered packets and an idle
|
|
|
|
* transmitter - should never happen at this point.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
|
2002-10-01 00:52:58 +00:00
|
|
|
if_printf(ifp, "transmitter idle with %d buffered packets\n",
|
|
|
|
sc->txb_count);
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_xmit(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Stop accepting more transmission packets temporarily, when
|
|
|
|
* a filter change request is delayed. Updating the MARs on
|
1996-03-17 08:36:38 +00:00
|
|
|
* 86960 flushes the transmission buffer, so it is delayed
|
1995-04-23 18:31:50 +00:00
|
|
|
* until all buffered transmission packets have been sent
|
|
|
|
* out.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (sc->filter_change) {
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
1996-03-17 08:36:38 +00:00
|
|
|
* Filter change request is delayed only when the DLC is
|
1995-04-23 18:31:50 +00:00
|
|
|
* working. DLC soon raise an interrupt after finishing
|
|
|
|
* the work.
|
|
|
|
*/
|
|
|
|
goto indicate_active;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (;;) {
|
|
|
|
|
|
|
|
/*
|
|
|
|
* See if there is room to put another packet in the buffer.
|
|
|
|
* We *could* do better job by peeking the send queue to
|
|
|
|
* know the length of the next packet. Current version just
|
|
|
|
* tests against the worst case (i.e., longest packet). FIXME.
|
1995-05-30 08:16:23 +00:00
|
|
|
*
|
1995-04-23 18:31:50 +00:00
|
|
|
* When adding the packet-peek feature, don't forget adding a
|
|
|
|
* test on txb_count against QUEUEING_MAX.
|
|
|
|
* There is a little chance the packet count exceeds
|
|
|
|
* the limit. Assume transmission buffer is 8KB (2x8KB
|
|
|
|
* configuration) and an application sends a bunch of small
|
|
|
|
* (i.e., minimum packet sized) packets rapidly. An 8KB
|
|
|
|
* buffer can hold 130 blocks of 62 bytes long...
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (sc->txb_free
|
|
|
|
< ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN) {
|
1995-04-23 18:31:50 +00:00
|
|
|
/* No room. */
|
|
|
|
goto indicate_active;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if FE_SINGLE_TRANSMISSION
|
2000-09-14 12:02:07 +00:00
|
|
|
if (sc->txb_count > 0) {
|
1995-04-23 18:31:50 +00:00
|
|
|
/* Just one packet per a transmission buffer. */
|
|
|
|
goto indicate_active;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Get the next mbuf chain for a packet to send.
|
|
|
|
*/
|
2005-06-10 16:49:24 +00:00
|
|
|
IF_DEQUEUE(&sc->ifp->if_snd, m);
|
2000-09-14 12:02:07 +00:00
|
|
|
if (m == NULL) {
|
1995-04-23 18:31:50 +00:00
|
|
|
/* No more packets to send. */
|
|
|
|
goto indicate_inactive;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Copy the mbuf chain into the transmission buffer.
|
|
|
|
* txb_* variables are updated as necessary.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_write_mbufs(sc, m);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Start transmitter if it's idle. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if ((sc->txb_count > 0) && (sc->txb_sched == 0))
|
|
|
|
fe_xmit(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
1996-03-17 08:36:38 +00:00
|
|
|
* Tap off here if there is a bpf listener,
|
|
|
|
* and the device is *not* in promiscuous mode.
|
|
|
|
* (86960 receives self-generated packets if
|
|
|
|
* and only if it is in "receive everything"
|
|
|
|
* mode.)
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2005-06-10 16:49:24 +00:00
|
|
|
if (!(sc->ifp->if_flags & IFF_PROMISC))
|
|
|
|
BPF_MTAP(sc->ifp, m);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
m_freem(m);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
indicate_inactive:
|
|
|
|
/*
|
|
|
|
* We are using the !OACTIVE flag to indicate to
|
|
|
|
* the outside world that we can accept an
|
|
|
|
* additional packet rather than that the
|
|
|
|
* transmitter is _actually_ active. Indeed, the
|
|
|
|
* transmitter may be active, but if we haven't
|
|
|
|
* filled all the buffers with data then we still
|
|
|
|
* want to accept more.
|
|
|
|
*/
|
2005-08-09 10:20:02 +00:00
|
|
|
sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
1995-04-23 18:31:50 +00:00
|
|
|
return;
|
|
|
|
|
|
|
|
indicate_active:
|
|
|
|
/*
|
|
|
|
* The transmitter is active, and there are no room for
|
|
|
|
* more outgoing packets in the transmission buffer.
|
|
|
|
*/
|
2005-08-09 10:20:02 +00:00
|
|
|
sc->ifp->if_drv_flags |= IFF_DRV_OACTIVE;
|
1995-04-23 18:31:50 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Drop (skip) a packet from receive buffer in 86960 memory.
|
|
|
|
*/
|
1996-03-17 08:36:38 +00:00
|
|
|
static void
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_droppacket (struct fe_softc * sc, int len)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
1996-11-15 16:15:56 +00:00
|
|
|
int i;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* 86960 manual says that we have to read 8 bytes from the buffer
|
|
|
|
* before skip the packets and that there must be more than 8 bytes
|
|
|
|
* remaining in the buffer when issue a skip command.
|
|
|
|
* Remember, we have already read 4 bytes before come here.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (len > 12) {
|
1996-11-15 16:15:56 +00:00
|
|
|
/* Read 4 more bytes, and skip the rest of the packet. */
|
1999-05-04 12:59:59 +00:00
|
|
|
if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
|
1998-12-15 15:51:37 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
(void) fe_inb(sc, FE_BMPR8);
|
|
|
|
(void) fe_inb(sc, FE_BMPR8);
|
|
|
|
(void) fe_inb(sc, FE_BMPR8);
|
|
|
|
(void) fe_inb(sc, FE_BMPR8);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
(void) fe_inw(sc, FE_BMPR8);
|
|
|
|
(void) fe_inw(sc, FE_BMPR8);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_BMPR14, FE_B14_SKIP);
|
1996-11-15 16:15:56 +00:00
|
|
|
} else {
|
|
|
|
/* We should not come here unless receiving RUNTs. */
|
1999-05-04 12:59:59 +00:00
|
|
|
if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
|
1998-12-15 15:51:37 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
for (i = 0; i < len; i++)
|
|
|
|
(void) fe_inb(sc, FE_BMPR8);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
for (i = 0; i < len; i += 2)
|
|
|
|
(void) fe_inw(sc, FE_BMPR8);
|
1996-11-15 16:15:56 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
#ifdef DIAGNOSTIC
|
1996-11-15 16:15:56 +00:00
|
|
|
/*
|
|
|
|
* Empty receiving buffer.
|
|
|
|
*/
|
|
|
|
static void
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_emptybuffer (struct fe_softc * sc)
|
1996-11-15 16:15:56 +00:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
u_char saved_dlcr5;
|
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
#ifdef FE_DEBUG
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp, "emptying receive buffer\n");
|
1996-11-15 16:15:56 +00:00
|
|
|
#endif
|
1998-12-15 15:51:37 +00:00
|
|
|
|
1996-11-15 16:15:56 +00:00
|
|
|
/*
|
|
|
|
* Stop receiving packets, temporarily.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
saved_dlcr5 = fe_inb(sc, FE_DLCR5);
|
|
|
|
fe_outb(sc, FE_DLCR5, sc->proto_dlcr5);
|
1997-01-14 18:24:59 +00:00
|
|
|
DELAY(1300);
|
1996-11-15 16:15:56 +00:00
|
|
|
|
|
|
|
/*
|
1998-12-15 15:51:37 +00:00
|
|
|
* When we come here, the receive buffer management may
|
1996-11-15 16:15:56 +00:00
|
|
|
* have been broken. So, we cannot use skip operation.
|
1997-01-14 18:24:59 +00:00
|
|
|
* Just discard everything in the buffer.
|
1996-11-15 16:15:56 +00:00
|
|
|
*/
|
1999-05-04 12:59:59 +00:00
|
|
|
if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
|
1998-12-15 15:51:37 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
for (i = 0; i < 65536; i++) {
|
|
|
|
if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
|
|
|
|
break;
|
|
|
|
(void) fe_inb(sc, FE_BMPR8);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
for (i = 0; i < 65536; i += 2) {
|
|
|
|
if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
|
|
|
|
break;
|
|
|
|
(void) fe_inw(sc, FE_BMPR8);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
1996-11-15 16:15:56 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Double check.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) {
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp,
|
|
|
|
"could not empty receive buffer\n");
|
1996-11-15 16:15:56 +00:00
|
|
|
/* Hmm. What should I do if this happens? FIXME. */
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Restart receiving packets.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR5, saved_dlcr5);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
1998-12-15 15:51:37 +00:00
|
|
|
#endif
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Transmission interrupt handler
|
|
|
|
* The control flow of this function looks silly. FIXME.
|
|
|
|
*/
|
|
|
|
static void
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_tint (struct fe_softc * sc, u_char tstat)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
|
|
|
int left;
|
|
|
|
int col;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Handle "excessive collision" interrupt.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (tstat & FE_D0_COLL16) {
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Find how many packets (including this collided one)
|
|
|
|
* are left unsent in transmission buffer.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
left = fe_inb(sc, FE_BMPR10);
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp, "excessive collision (%d/%d)\n",
|
|
|
|
left, sc->txb_sched);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
1996-11-15 16:15:56 +00:00
|
|
|
* Clear the collision flag (in 86960) here
|
|
|
|
* to avoid confusing statistics.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR0, FE_D0_COLLID);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Restart transmitter, skipping the
|
|
|
|
* collided packet.
|
|
|
|
*
|
|
|
|
* We *must* skip the packet to keep network running
|
|
|
|
* properly. Excessive collision error is an
|
|
|
|
* indication of the network overload. If we
|
|
|
|
* tried sending the same packet after excessive
|
|
|
|
* collision, the network would be filled with
|
|
|
|
* out-of-time packets. Packets belonging
|
|
|
|
* to reliable transport (such as TCP) are resent
|
|
|
|
* by some upper layer.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1);
|
1996-11-15 16:15:56 +00:00
|
|
|
|
|
|
|
/* Update statistics. */
|
|
|
|
sc->tx_excolls++;
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Handle "transmission complete" interrupt.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (tstat & FE_D0_TXDONE) {
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Add in total number of collisions on last
|
|
|
|
* transmission. We also clear "collision occurred" flag
|
|
|
|
* here.
|
|
|
|
*
|
|
|
|
* 86960 has a design flaw on collision count on multiple
|
|
|
|
* packet transmission. When we send two or more packets
|
|
|
|
* with one start command (that's what we do when the
|
1996-03-17 08:36:38 +00:00
|
|
|
* transmission queue is crowded), 86960 informs us number
|
|
|
|
* of collisions occurred on the last packet on the
|
1995-04-23 18:31:50 +00:00
|
|
|
* transmission only. Number of collisions on previous
|
|
|
|
* packets are lost. I have told that the fact is clearly
|
|
|
|
* stated in the Fujitsu document.
|
|
|
|
*
|
|
|
|
* I considered not to mind it seriously. Collision
|
|
|
|
* count is not so important, anyway. Any comments? FIXME.
|
|
|
|
*/
|
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
if (fe_inb(sc, FE_DLCR0) & FE_D0_COLLID) {
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Clear collision flag. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR0, FE_D0_COLLID);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Extract collision count from 86960. */
|
2000-09-14 12:02:07 +00:00
|
|
|
col = fe_inb(sc, FE_DLCR4);
|
|
|
|
col = (col & FE_D4_COL) >> FE_D4_COL_SHIFT;
|
|
|
|
if (col == 0) {
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
|
|
|
* Status register indicates collisions,
|
|
|
|
* while the collision count is zero.
|
|
|
|
* This can happen after multiple packet
|
|
|
|
* transmission, indicating that one or more
|
|
|
|
* previous packet(s) had been collided.
|
|
|
|
*
|
|
|
|
* Since the accurate number of collisions
|
|
|
|
* has been lost, we just guess it as 1;
|
|
|
|
* Am I too optimistic? FIXME.
|
|
|
|
*/
|
|
|
|
col = 1;
|
|
|
|
}
|
2005-06-10 16:49:24 +00:00
|
|
|
sc->ifp->if_collisions += col;
|
2000-09-14 12:02:07 +00:00
|
|
|
if (col == 1)
|
1998-12-15 15:51:37 +00:00
|
|
|
sc->mibdata.dot3StatsSingleCollisionFrames++;
|
2000-09-14 12:02:07 +00:00
|
|
|
else
|
1998-12-15 15:51:37 +00:00
|
|
|
sc->mibdata.dot3StatsMultipleCollisionFrames++;
|
|
|
|
sc->mibdata.dot3StatsCollFrequencies[col-1]++;
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1996-11-15 16:15:56 +00:00
|
|
|
* Update transmission statistics.
|
|
|
|
* Be sure to reflect number of excessive collisions.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
1998-12-15 15:51:37 +00:00
|
|
|
col = sc->tx_excolls;
|
2005-06-10 16:49:24 +00:00
|
|
|
sc->ifp->if_opackets += sc->txb_sched - col;
|
|
|
|
sc->ifp->if_oerrors += col;
|
|
|
|
sc->ifp->if_collisions += col * 16;
|
1998-12-15 15:51:37 +00:00
|
|
|
sc->mibdata.dot3StatsExcessiveCollisions += col;
|
|
|
|
sc->mibdata.dot3StatsCollFrequencies[15] += col;
|
1995-04-23 18:31:50 +00:00
|
|
|
sc->txb_sched = 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The transmitter is no more active.
|
1995-05-30 08:16:23 +00:00
|
|
|
* Reset output active flag and watchdog timer.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2005-08-09 10:20:02 +00:00
|
|
|
sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
2005-06-10 16:49:24 +00:00
|
|
|
sc->ifp->if_timer = 0;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If more data is ready to transmit in the buffer, start
|
|
|
|
* transmitting them. Otherwise keep transmitter idle,
|
|
|
|
* even if more data is queued. This gives receive
|
|
|
|
* process a slight priority.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (sc->txb_count > 0)
|
|
|
|
fe_xmit(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Ethernet interface receiver interrupt.
|
|
|
|
*/
|
|
|
|
static void
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_rint (struct fe_softc * sc, u_char rstat)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
|
|
|
u_short len;
|
|
|
|
u_char status;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Update statistics if this interrupt is caused by an error.
|
1998-12-15 15:51:37 +00:00
|
|
|
* Note that, when the system was not sufficiently fast, the
|
|
|
|
* receive interrupt might not be acknowledged immediately. If
|
|
|
|
* one or more errornous frames were received before this routine
|
|
|
|
* was scheduled, they are ignored, and the following error stats
|
|
|
|
* give less than real values.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR | FE_D1_SRTPKT)) {
|
|
|
|
if (rstat & FE_D1_OVRFLO)
|
1998-12-15 15:51:37 +00:00
|
|
|
sc->mibdata.dot3StatsInternalMacReceiveErrors++;
|
2000-09-14 12:02:07 +00:00
|
|
|
if (rstat & FE_D1_CRCERR)
|
1998-12-15 15:51:37 +00:00
|
|
|
sc->mibdata.dot3StatsFCSErrors++;
|
2000-09-14 12:02:07 +00:00
|
|
|
if (rstat & FE_D1_ALGERR)
|
1998-12-15 15:51:37 +00:00
|
|
|
sc->mibdata.dot3StatsAlignmentErrors++;
|
|
|
|
#if 0
|
|
|
|
/* The reference MAC receiver defined in 802.3
|
|
|
|
silently ignores short frames (RUNTs) without
|
|
|
|
notifying upper layer. RFC 1650 (dot3 MIB) is
|
|
|
|
based on the 802.3, and it has no stats entry for
|
|
|
|
RUNTs... */
|
2000-09-14 12:02:07 +00:00
|
|
|
if (rstat & FE_D1_SRTPKT)
|
1998-12-15 15:51:37 +00:00
|
|
|
sc->mibdata.dot3StatsFrameTooShorts++; /* :-) */
|
1995-04-23 18:31:50 +00:00
|
|
|
#endif
|
2005-06-10 16:49:24 +00:00
|
|
|
sc->ifp->if_ierrors++;
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* MB86960 has a flag indicating "receive queue empty."
|
1996-03-17 08:36:38 +00:00
|
|
|
* We just loop, checking the flag, to pull out all received
|
1995-04-23 18:31:50 +00:00
|
|
|
* packets.
|
|
|
|
*
|
1996-03-17 08:36:38 +00:00
|
|
|
* We limit the number of iterations to avoid infinite-loop.
|
1997-01-14 18:24:59 +00:00
|
|
|
* The upper bound is set to unrealistic high value.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
for (i = 0; i < FE_MAX_RECV_COUNT * 2; i++) {
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1996-03-17 08:36:38 +00:00
|
|
|
/* Stop the iteration if 86960 indicates no packets. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)
|
|
|
|
return;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
1998-12-15 15:51:37 +00:00
|
|
|
* Extract a receive status byte.
|
1995-04-23 18:31:50 +00:00
|
|
|
* As our 86960 is in 16 bit bus access mode, we have to
|
|
|
|
* use inw() to get the status byte. The significant
|
|
|
|
* value is returned in lower 8 bits.
|
|
|
|
*/
|
1999-05-04 12:59:59 +00:00
|
|
|
if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
|
1998-12-15 15:51:37 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
status = fe_inb(sc, FE_BMPR8);
|
|
|
|
(void) fe_inb(sc, FE_BMPR8);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
status = (u_char) fe_inw(sc, FE_BMPR8);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1996-11-15 16:15:56 +00:00
|
|
|
/*
|
|
|
|
* Extract the packet length.
|
|
|
|
* It is a sum of a header (14 bytes) and a payload.
|
|
|
|
* CRC has been stripped off by the 86960.
|
|
|
|
*/
|
1999-05-04 12:59:59 +00:00
|
|
|
if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
|
1998-12-15 15:51:37 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
len = fe_inb(sc, FE_BMPR8);
|
|
|
|
len |= (fe_inb(sc, FE_BMPR8) << 8);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
1998-12-15 15:51:37 +00:00
|
|
|
else
|
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
len = fe_inw(sc, FE_BMPR8);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
1998-12-15 15:51:37 +00:00
|
|
|
* AS our 86960 is programed to ignore errored frame,
|
|
|
|
* we must not see any error indication in the
|
|
|
|
* receive buffer. So, any error condition is a
|
|
|
|
* serious error, e.g., out-of-sync of the receive
|
|
|
|
* buffer pointers.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if ((status & 0xF0) != 0x20 ||
|
|
|
|
len > ETHER_MAX_LEN - ETHER_CRC_LEN ||
|
|
|
|
len < ETHER_MIN_LEN - ETHER_CRC_LEN) {
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp,
|
|
|
|
"RX buffer out-of-sync\n");
|
|
|
|
sc->ifp->if_ierrors++;
|
1998-12-15 15:51:37 +00:00
|
|
|
sc->mibdata.dot3StatsInternalMacReceiveErrors++;
|
|
|
|
fe_reset(sc);
|
|
|
|
return;
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Go get a packet.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (fe_get_packet(sc, len) < 0) {
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
1998-12-15 15:51:37 +00:00
|
|
|
* Negative return from fe_get_packet()
|
|
|
|
* indicates no available mbuf. We stop
|
|
|
|
* receiving packets, even if there are more
|
|
|
|
* in the buffer. We hope we can get more
|
|
|
|
* mbuf next time.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2005-06-10 16:49:24 +00:00
|
|
|
sc->ifp->if_ierrors++;
|
1998-12-15 15:51:37 +00:00
|
|
|
sc->mibdata.dot3StatsMissedFrames++;
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_droppacket(sc, len);
|
1998-12-15 15:51:37 +00:00
|
|
|
return;
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Successfully received a packet. Update stat. */
|
2005-06-10 16:49:24 +00:00
|
|
|
sc->ifp->if_ipackets++;
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
1998-12-15 15:51:37 +00:00
|
|
|
|
|
|
|
/* Maximum number of frames has been received. Something
|
|
|
|
strange is happening here... */
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp, "unusual receive flood\n");
|
1998-12-15 15:51:37 +00:00
|
|
|
sc->mibdata.dot3StatsInternalMacReceiveErrors++;
|
|
|
|
fe_reset(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Ethernet interface interrupt processor
|
|
|
|
*/
|
1998-10-22 05:58:45 +00:00
|
|
|
static void
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_intr (void *arg)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
struct fe_softc *sc = arg;
|
1995-04-23 18:31:50 +00:00
|
|
|
u_char tstat, rstat;
|
1998-12-15 15:51:37 +00:00
|
|
|
int loop_count = FE_MAX_LOOP;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/* Loop until there are no more new interrupt conditions. */
|
|
|
|
while (loop_count-- > 0) {
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
|
|
|
* Get interrupt conditions, masking unneeded flags.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
tstat = fe_inb(sc, FE_DLCR0) & FE_TMASK;
|
|
|
|
rstat = fe_inb(sc, FE_DLCR1) & FE_RMASK;
|
|
|
|
if (tstat == 0 && rstat == 0)
|
|
|
|
return;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Reset the conditions we are acknowledging.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR0, tstat);
|
|
|
|
fe_outb(sc, FE_DLCR1, rstat);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
1998-12-15 15:51:37 +00:00
|
|
|
* Handle transmitter interrupts.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (tstat)
|
|
|
|
fe_tint(sc, tstat);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Handle receiver interrupts
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (rstat)
|
|
|
|
fe_rint(sc, rstat);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Update the multicast address filter if it is
|
|
|
|
* needed and possible. We do it now, because
|
|
|
|
* we can make sure the transmission buffer is empty,
|
|
|
|
* and there is a good chance that the receive queue
|
|
|
|
* is empty. It will minimize the possibility of
|
1996-03-17 08:36:38 +00:00
|
|
|
* packet loss.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (sc->filter_change &&
|
|
|
|
sc->txb_count == 0 && sc->txb_sched == 0) {
|
1995-04-23 18:31:50 +00:00
|
|
|
fe_loadmar(sc);
|
2005-08-09 10:20:02 +00:00
|
|
|
sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If it looks like the transmitter can take more data,
|
|
|
|
* attempt to start output on the interface. This is done
|
|
|
|
* after handling the receiver interrupt to give the
|
|
|
|
* receive operation priority.
|
|
|
|
*
|
|
|
|
* BTW, I'm not sure in what case the OACTIVE is on at
|
|
|
|
* this point. Is the following test redundant?
|
|
|
|
*
|
|
|
|
* No. This routine polls for both transmitter and
|
|
|
|
* receiver interrupts. 86960 can raise a receiver
|
|
|
|
* interrupt when the transmission buffer is full.
|
|
|
|
*/
|
2005-08-09 10:20:02 +00:00
|
|
|
if ((sc->ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0)
|
2005-06-10 16:49:24 +00:00
|
|
|
fe_start(sc->ifp);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
1998-12-15 15:51:37 +00:00
|
|
|
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp, "too many loops\n");
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Process an ioctl request. This code needs some work - it looks
|
|
|
|
* pretty ugly.
|
|
|
|
*/
|
1996-03-17 08:36:38 +00:00
|
|
|
static int
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_ioctl (struct ifnet * ifp, u_long command, caddr_t data)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
1996-03-17 08:36:38 +00:00
|
|
|
struct fe_softc *sc = ifp->if_softc;
|
1998-12-15 15:51:37 +00:00
|
|
|
struct ifreq *ifr = (struct ifreq *)data;
|
1995-04-23 18:31:50 +00:00
|
|
|
int s, error = 0;
|
|
|
|
|
|
|
|
s = splimp();
|
|
|
|
|
|
|
|
switch (command) {
|
|
|
|
|
|
|
|
case SIOCSIFFLAGS:
|
|
|
|
/*
|
|
|
|
* Switch interface state between "running" and
|
|
|
|
* "stopped", reflecting the UP flag.
|
|
|
|
*/
|
2005-06-10 16:49:24 +00:00
|
|
|
if (sc->ifp->if_flags & IFF_UP) {
|
2005-08-09 10:20:02 +00:00
|
|
|
if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
|
1998-12-15 15:51:37 +00:00
|
|
|
fe_init(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
} else {
|
2005-08-09 10:20:02 +00:00
|
|
|
if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
|
1998-12-15 15:51:37 +00:00
|
|
|
fe_stop(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Promiscuous and/or multicast flags may have changed,
|
|
|
|
* so reprogram the multicast filter and/or receive mode.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_setmode(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/* Done. */
|
1995-04-23 18:31:50 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case SIOCADDMULTI:
|
|
|
|
case SIOCDELMULTI:
|
|
|
|
/*
|
1998-12-15 15:51:37 +00:00
|
|
|
* Multicast list has changed; set the hardware filter
|
|
|
|
* accordingly.
|
1995-04-23 18:31:50 +00:00
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_setmode(sc);
|
1998-12-15 15:51:37 +00:00
|
|
|
break;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
case SIOCSIFMEDIA:
|
|
|
|
case SIOCGIFMEDIA:
|
|
|
|
/* Let if_media to handle these commands and to call
|
|
|
|
us back. */
|
|
|
|
error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
|
1995-04-23 18:31:50 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
2002-11-14 23:54:55 +00:00
|
|
|
error = ether_ioctl(ifp, command, data);
|
1998-12-15 15:51:37 +00:00
|
|
|
break;
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
(void) splx(s);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1996-03-17 08:36:38 +00:00
|
|
|
* Retrieve packet from receive buffer and send to the next level up via
|
2000-05-14 02:18:43 +00:00
|
|
|
* ether_input().
|
1995-04-23 18:31:50 +00:00
|
|
|
* Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
|
|
|
|
*/
|
|
|
|
static int
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_get_packet (struct fe_softc * sc, u_short len)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
2005-06-10 16:49:24 +00:00
|
|
|
struct ifnet *ifp = sc->ifp;
|
1995-04-23 18:31:50 +00:00
|
|
|
struct ether_header *eh;
|
|
|
|
struct mbuf *m;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* NFS wants the data be aligned to the word (4 byte)
|
|
|
|
* boundary. Ethernet header has 14 bytes. There is a
|
|
|
|
* 2-byte gap.
|
|
|
|
*/
|
|
|
|
#define NFS_MAGIC_OFFSET 2
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This function assumes that an Ethernet packet fits in an
|
|
|
|
* mbuf (with a cluster attached when necessary.) On FreeBSD
|
|
|
|
* 2.0 for x86, which is the primary target of this driver, an
|
|
|
|
* mbuf cluster has 4096 bytes, and we are happy. On ancient
|
|
|
|
* BSDs, such as vanilla 4.3 for 386, a cluster size was 1024,
|
|
|
|
* however. If the following #error message were printed upon
|
|
|
|
* compile, you need to rewrite this function.
|
|
|
|
*/
|
1996-08-06 21:14:36 +00:00
|
|
|
#if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET )
|
1995-04-23 18:31:50 +00:00
|
|
|
#error "Too small MCLBYTES to use fe driver."
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Our strategy has one more problem. There is a policy on
|
|
|
|
* mbuf cluster allocation. It says that we must have at
|
|
|
|
* least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to
|
|
|
|
* allocate a cluster. For a packet of a size between
|
|
|
|
* (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule...
|
1996-03-17 08:36:38 +00:00
|
|
|
* On the other hand, the current code is short, simple,
|
1995-04-23 18:31:50 +00:00
|
|
|
* and fast, however. It does no harmful thing, just waists
|
|
|
|
* some memory. Any comments? FIXME.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* Allocate an mbuf with packet header info. */
|
2003-02-19 05:47:46 +00:00
|
|
|
MGETHDR(m, M_DONTWAIT, MT_DATA);
|
2000-09-14 12:02:07 +00:00
|
|
|
if (m == NULL)
|
|
|
|
return -1;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Attach a cluster if this packet doesn't fit in a normal mbuf. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if (len > MHLEN - NFS_MAGIC_OFFSET) {
|
2003-02-19 05:47:46 +00:00
|
|
|
MCLGET(m, M_DONTWAIT);
|
2000-09-14 12:02:07 +00:00
|
|
|
if (!(m->m_flags & M_EXT)) {
|
|
|
|
m_freem(m);
|
1995-04-23 18:31:50 +00:00
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Initialize packet header info. */
|
2002-11-14 23:54:55 +00:00
|
|
|
m->m_pkthdr.rcvif = ifp;
|
1995-04-23 18:31:50 +00:00
|
|
|
m->m_pkthdr.len = len;
|
|
|
|
|
|
|
|
/* Set the length of this packet. */
|
|
|
|
m->m_len = len;
|
|
|
|
|
1996-03-17 08:36:38 +00:00
|
|
|
/* The following silliness is to make NFS happy */
|
1995-04-23 18:31:50 +00:00
|
|
|
m->m_data += NFS_MAGIC_OFFSET;
|
|
|
|
|
|
|
|
/* Get (actually just point to) the header part. */
|
1998-12-15 15:51:37 +00:00
|
|
|
eh = mtod(m, struct ether_header *);
|
|
|
|
|
|
|
|
/* Get a packet. */
|
1999-05-04 12:59:59 +00:00
|
|
|
if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
|
1998-12-15 15:51:37 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_insb(sc, FE_BMPR8, (u_int8_t *)eh, len);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_insw(sc, FE_BMPR8, (u_int16_t *)eh, (len + 1) >> 1);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Feed the packet to upper layer. */
|
2002-11-14 23:54:55 +00:00
|
|
|
(*ifp->if_input)(ifp, m);
|
1995-04-23 18:31:50 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
|
|
|
|
* Returns number of bytes actually written, including length word.
|
|
|
|
*
|
|
|
|
* If an mbuf chain is too long for an Ethernet frame, it is not sent.
|
|
|
|
* Packets shorter than Ethernet minimum are legal, and we pad them
|
1995-05-30 08:16:23 +00:00
|
|
|
* before sending out. An exception is "partial" packets which are
|
1995-04-23 18:31:50 +00:00
|
|
|
* shorter than mandatory Ethernet header.
|
|
|
|
*/
|
|
|
|
static void
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_write_mbufs (struct fe_softc *sc, struct mbuf *m)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
|
|
|
u_short length, len;
|
|
|
|
struct mbuf *mp;
|
|
|
|
u_char *data;
|
|
|
|
u_short savebyte; /* WARNING: Architecture dependent! */
|
|
|
|
#define NO_PENDING_BYTE 0xFFFF
|
|
|
|
|
2000-09-14 12:02:07 +00:00
|
|
|
static u_char padding [ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN];
|
1996-10-07 17:50:00 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
#ifdef DIAGNOSTIC
|
1995-04-23 18:31:50 +00:00
|
|
|
/* First, count up the total number of bytes to copy */
|
|
|
|
length = 0;
|
2000-09-14 12:02:07 +00:00
|
|
|
for (mp = m; mp != NULL; mp = mp->m_next)
|
1995-04-23 18:31:50 +00:00
|
|
|
length += mp->m_len;
|
2000-09-14 12:02:07 +00:00
|
|
|
|
1995-04-23 18:31:50 +00:00
|
|
|
/* Check if this matches the one in the packet header. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if (length != m->m_pkthdr.len) {
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp,
|
|
|
|
"packet length mismatch? (%d/%d)\n",
|
|
|
|
length, m->m_pkthdr.len);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
1998-12-15 15:51:37 +00:00
|
|
|
#else
|
|
|
|
/* Just use the length value in the packet header. */
|
|
|
|
length = m->m_pkthdr.len;
|
1995-04-23 18:31:50 +00:00
|
|
|
#endif
|
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
#ifdef DIAGNOSTIC
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
|
|
|
* Should never send big packets. If such a packet is passed,
|
|
|
|
* it should be a bug of upper layer. We just ignore it.
|
|
|
|
* ... Partial (too short) packets, neither.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (length < ETHER_HDR_LEN ||
|
|
|
|
length > ETHER_MAX_LEN - ETHER_CRC_LEN) {
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp,
|
|
|
|
"got an out-of-spec packet (%u bytes) to send\n", length);
|
|
|
|
sc->ifp->if_oerrors++;
|
1998-12-15 15:51:37 +00:00
|
|
|
sc->mibdata.dot3StatsInternalMacTransmitErrors++;
|
1995-04-23 18:31:50 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Put the length word for this frame.
|
|
|
|
* Does 86960 accept odd length? -- Yes.
|
|
|
|
* Do we need to pad the length to minimum size by ourselves?
|
|
|
|
* -- Generally yes. But for (or will be) the last
|
|
|
|
* packet in the transmission buffer, we can skip the
|
|
|
|
* padding process. It may gain performance slightly. FIXME.
|
|
|
|
*/
|
1999-05-04 12:59:59 +00:00
|
|
|
if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
|
1998-12-15 15:51:37 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
len = max(length, ETHER_MIN_LEN - ETHER_CRC_LEN);
|
|
|
|
fe_outb(sc, FE_BMPR8, len & 0x00ff);
|
|
|
|
fe_outb(sc, FE_BMPR8, (len & 0xff00) >> 8);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outw(sc, FE_BMPR8,
|
|
|
|
max(length, ETHER_MIN_LEN - ETHER_CRC_LEN));
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Update buffer status now.
|
|
|
|
* Truncate the length up to an even number, since we use outw().
|
|
|
|
*/
|
1999-05-04 12:59:59 +00:00
|
|
|
if ((sc->proto_dlcr6 & FE_D6_SBW) != FE_D6_SBW_BYTE)
|
1998-12-15 15:51:37 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
length = (length + 1) & ~1;
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
2000-09-14 12:02:07 +00:00
|
|
|
sc->txb_free -= FE_DATA_LEN_LEN +
|
|
|
|
max(length, ETHER_MIN_LEN - ETHER_CRC_LEN);
|
1995-04-23 18:31:50 +00:00
|
|
|
sc->txb_count++;
|
|
|
|
|
|
|
|
/*
|
1995-05-30 08:16:23 +00:00
|
|
|
* Transfer the data from mbuf chain to the transmission buffer.
|
1995-04-23 18:31:50 +00:00
|
|
|
* MB86960 seems to require that data be transferred as words, and
|
|
|
|
* only words. So that we require some extra code to patch
|
|
|
|
* over odd-length mbufs.
|
|
|
|
*/
|
1999-05-04 12:59:59 +00:00
|
|
|
if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
|
1998-12-15 15:51:37 +00:00
|
|
|
{
|
|
|
|
/* 8-bit cards are easy. */
|
2000-09-14 12:02:07 +00:00
|
|
|
for (mp = m; mp != 0; mp = mp->m_next) {
|
|
|
|
if (mp->m_len)
|
|
|
|
fe_outsb(sc, FE_BMPR8, mtod(mp, caddr_t),
|
|
|
|
mp->m_len);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* 16-bit cards are a pain. */
|
|
|
|
savebyte = NO_PENDING_BYTE;
|
2000-09-14 12:02:07 +00:00
|
|
|
for (mp = m; mp != 0; mp = mp->m_next) {
|
1998-12-15 15:51:37 +00:00
|
|
|
|
|
|
|
/* Ignore empty mbuf. */
|
|
|
|
len = mp->m_len;
|
2000-09-14 12:02:07 +00:00
|
|
|
if (len == 0)
|
|
|
|
continue;
|
1998-12-15 15:51:37 +00:00
|
|
|
|
|
|
|
/* Find the actual data to send. */
|
|
|
|
data = mtod(mp, caddr_t);
|
|
|
|
|
|
|
|
/* Finish the last byte. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if (savebyte != NO_PENDING_BYTE) {
|
|
|
|
fe_outw(sc, FE_BMPR8, savebyte | (*data << 8));
|
1998-12-15 15:51:37 +00:00
|
|
|
data++;
|
|
|
|
len--;
|
|
|
|
savebyte = NO_PENDING_BYTE;
|
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/* output contiguous words */
|
|
|
|
if (len > 1) {
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outsw(sc, FE_BMPR8, (u_int16_t *)data,
|
|
|
|
len >> 1);
|
1998-12-15 15:51:37 +00:00
|
|
|
data += len & ~1;
|
|
|
|
len &= 1;
|
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/* Save a remaining byte, if there is one. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if (len > 0)
|
1998-12-15 15:51:37 +00:00
|
|
|
savebyte = *data;
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/* Spit the last byte, if the length is odd. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if (savebyte != NO_PENDING_BYTE)
|
|
|
|
fe_outw(sc, FE_BMPR8, savebyte);
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
1996-10-07 17:50:00 +00:00
|
|
|
|
|
|
|
/* Pad to the Ethernet minimum length, if the packet is too short. */
|
2000-09-14 12:02:07 +00:00
|
|
|
if (length < ETHER_MIN_LEN - ETHER_CRC_LEN) {
|
1999-05-04 12:59:59 +00:00
|
|
|
if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
|
1998-12-15 15:51:37 +00:00
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outsb(sc, FE_BMPR8, padding,
|
|
|
|
ETHER_MIN_LEN - ETHER_CRC_LEN - length);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outsw(sc, FE_BMPR8, (u_int16_t *)padding,
|
|
|
|
(ETHER_MIN_LEN - ETHER_CRC_LEN - length) >> 1);
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
1996-10-07 17:50:00 +00:00
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Compute the multicast address filter from the
|
|
|
|
* list of multicast addresses we need to listen to.
|
|
|
|
*/
|
|
|
|
static struct fe_filter
|
|
|
|
fe_mcaf ( struct fe_softc *sc )
|
|
|
|
{
|
|
|
|
int index;
|
|
|
|
struct fe_filter filter;
|
1997-01-13 21:26:53 +00:00
|
|
|
struct ifmultiaddr *ifma;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
filter = fe_filter_nothing;
|
2005-08-03 00:18:35 +00:00
|
|
|
IF_ADDR_LOCK(sc->ifp);
|
2005-06-10 16:49:24 +00:00
|
|
|
TAILQ_FOREACH(ifma, &sc->ifp->if_multiaddrs, ifma_link) {
|
1997-01-13 21:26:53 +00:00
|
|
|
if (ifma->ifma_addr->sa_family != AF_LINK)
|
|
|
|
continue;
|
2004-06-09 14:34:04 +00:00
|
|
|
index = ether_crc32_le(LLADDR((struct sockaddr_dl *)
|
|
|
|
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
|
1998-12-15 15:51:37 +00:00
|
|
|
#ifdef FE_DEBUG
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp, "hash(%6D) == %d\n",
|
|
|
|
enm->enm_addrlo , ":", index);
|
1995-04-23 18:31:50 +00:00
|
|
|
#endif
|
1995-05-30 08:16:23 +00:00
|
|
|
|
1995-04-23 18:31:50 +00:00
|
|
|
filter.data[index >> 3] |= 1 << (index & 7);
|
|
|
|
}
|
2005-08-03 00:18:35 +00:00
|
|
|
IF_ADDR_UNLOCK(sc->ifp);
|
1995-04-23 18:31:50 +00:00
|
|
|
return ( filter );
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Calculate a new "multicast packet filter" and put the 86960
|
|
|
|
* receiver in appropriate mode.
|
|
|
|
*/
|
|
|
|
static void
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_setmode (struct fe_softc *sc)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If the interface is not running, we postpone the update
|
|
|
|
* process for receive modes and multicast address filter
|
|
|
|
* until the interface is restarted. It reduces some
|
|
|
|
* complicated job on maintaining chip states. (Earlier versions
|
|
|
|
* of this driver had a bug on that point...)
|
|
|
|
*
|
|
|
|
* To complete the trick, fe_init() calls fe_setmode() after
|
|
|
|
* restarting the interface.
|
|
|
|
*/
|
2005-08-09 10:20:02 +00:00
|
|
|
if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING))
|
2000-09-14 12:02:07 +00:00
|
|
|
return;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Promiscuous mode is handled separately.
|
|
|
|
*/
|
2005-08-09 10:20:02 +00:00
|
|
|
if (sc->ifp->if_flags & IFF_PROMISC) {
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
|
|
|
* Program 86960 to receive all packets on the segment
|
|
|
|
* including those directed to other stations.
|
|
|
|
* Multicast filter stored in MARs are ignored
|
|
|
|
* under this setting, so we don't need to update it.
|
|
|
|
*
|
|
|
|
* Promiscuous mode in FreeBSD 2 is used solely by
|
|
|
|
* BPF, and BPF only listens to valid (no error) packets.
|
1996-03-17 08:36:38 +00:00
|
|
|
* So, we ignore erroneous ones even in this mode.
|
1995-04-23 18:31:50 +00:00
|
|
|
* (Older versions of fe driver mistook the point.)
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR5,
|
|
|
|
sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
|
1995-04-23 18:31:50 +00:00
|
|
|
sc->filter_change = 0;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Turn the chip to the normal (non-promiscuous) mode.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Find the new multicast filter value.
|
|
|
|
*/
|
2005-08-09 10:20:02 +00:00
|
|
|
if (sc->ifp->if_flags & IFF_ALLMULTI)
|
1995-04-23 18:31:50 +00:00
|
|
|
sc->filter = fe_filter_all;
|
2000-09-14 12:02:07 +00:00
|
|
|
else
|
|
|
|
sc->filter = fe_mcaf(sc);
|
1995-04-23 18:31:50 +00:00
|
|
|
sc->filter_change = 1;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We have to update the multicast filter in the 86960, A.S.A.P.
|
|
|
|
*
|
1996-03-17 08:36:38 +00:00
|
|
|
* Note that the DLC (Data Link Control unit, i.e. transmitter
|
1995-04-23 18:31:50 +00:00
|
|
|
* and receiver) must be stopped when feeding the filter, and
|
1996-03-17 08:36:38 +00:00
|
|
|
* DLC trashes all packets in both transmission and receive
|
1995-04-23 18:31:50 +00:00
|
|
|
* buffers when stopped.
|
|
|
|
*
|
1996-03-17 08:36:38 +00:00
|
|
|
* To reduce the packet loss, we delay the filter update
|
1995-04-23 18:31:50 +00:00
|
|
|
* process until buffers are empty.
|
|
|
|
*/
|
2000-09-14 12:02:07 +00:00
|
|
|
if (sc->txb_sched == 0 && sc->txb_count == 0 &&
|
|
|
|
!(fe_inb(sc, FE_DLCR1) & FE_D1_PKTRDY)) {
|
1995-04-23 18:31:50 +00:00
|
|
|
/*
|
|
|
|
* Buffers are (apparently) empty. Load
|
|
|
|
* the new filter value into MARs now.
|
|
|
|
*/
|
|
|
|
fe_loadmar(sc);
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Buffers are not empty. Mark that we have to update
|
|
|
|
* the MARs. The new filter will be loaded by feintr()
|
|
|
|
* later.
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Load a new multicast address filter into MARs.
|
|
|
|
*
|
1996-03-17 08:36:38 +00:00
|
|
|
* The caller must have splimp'ed before fe_loadmar.
|
1995-04-23 18:31:50 +00:00
|
|
|
* This function starts the DLC upon return. So it can be called only
|
|
|
|
* when the chip is working, i.e., from the driver's point of view, when
|
|
|
|
* a device is RUNNING. (I mistook the point in previous versions.)
|
|
|
|
*/
|
|
|
|
static void
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_loadmar (struct fe_softc * sc)
|
1995-04-23 18:31:50 +00:00
|
|
|
{
|
|
|
|
/* Stop the DLC (transmitter and receiver). */
|
2000-09-14 12:02:07 +00:00
|
|
|
DELAY(200);
|
|
|
|
fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
|
|
|
|
DELAY(200);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Select register bank 1 for MARs. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Copy filter value into the registers. */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outblk(sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Restore the bank selection for BMPRs (i.e., runtime registers). */
|
2000-09-14 12:02:07 +00:00
|
|
|
fe_outb(sc, FE_DLCR7,
|
|
|
|
sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* Restart the DLC. */
|
2000-09-14 12:02:07 +00:00
|
|
|
DELAY(200);
|
|
|
|
fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
|
|
|
|
DELAY(200);
|
1995-04-23 18:31:50 +00:00
|
|
|
|
|
|
|
/* We have just updated the filter. */
|
|
|
|
sc->filter_change = 0;
|
1998-12-15 15:51:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Change the media selection. */
|
|
|
|
static int
|
|
|
|
fe_medchange (struct ifnet *ifp)
|
|
|
|
{
|
|
|
|
struct fe_softc *sc = (struct fe_softc *)ifp->if_softc;
|
|
|
|
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
/* If_media should not pass any request for a media which this
|
|
|
|
interface doesn't support. */
|
|
|
|
int b;
|
1995-04-23 18:31:50 +00:00
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
for (b = 0; bit2media[b] != 0; b++) {
|
|
|
|
if (bit2media[b] == sc->media.ifm_media) break;
|
|
|
|
}
|
|
|
|
if (((1 << b) & sc->mbitmap) == 0) {
|
2005-06-10 16:49:24 +00:00
|
|
|
if_printf(sc->ifp,
|
|
|
|
"got an unsupported media request (0x%x)\n",
|
|
|
|
sc->media.ifm_media);
|
1998-12-15 15:51:37 +00:00
|
|
|
return EINVAL;
|
|
|
|
}
|
1995-04-23 18:31:50 +00:00
|
|
|
#endif
|
1998-12-15 15:51:37 +00:00
|
|
|
|
|
|
|
/* We don't actually change media when the interface is down.
|
|
|
|
fe_init() will do the job, instead. Should we also wait
|
|
|
|
until the transmission buffer being empty? Changing the
|
|
|
|
media when we are sending a frame will cause two garbages
|
|
|
|
on wires, one on old media and another on new. FIXME */
|
2005-06-10 16:49:24 +00:00
|
|
|
if (sc->ifp->if_flags & IFF_UP) {
|
1998-12-15 15:51:37 +00:00
|
|
|
if (sc->msel) sc->msel(sc);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|
|
|
|
|
1998-12-15 15:51:37 +00:00
|
|
|
/* I don't know how I can support media status callback... FIXME. */
|
1995-04-23 18:31:50 +00:00
|
|
|
static void
|
1998-12-15 15:51:37 +00:00
|
|
|
fe_medstat (struct ifnet *ifp, struct ifmediareq *ifmr)
|
|
|
|
{
|
|
|
|
(void)ifp;
|
|
|
|
(void)ifmr;
|
1995-04-23 18:31:50 +00:00
|
|
|
}
|