d/freebsd-nq
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
91d00a4fce
freebsd-nq/sys/dev/aic7xxx/aic7xxx.reg

1595 lines
34 KiB
Reg
Raw Normal View History

Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
* Aic7xxx register and scratch ram definitions.
*
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
* Copyright (c) 1994-2001 Justin T. Gibbs.
* Copyright (c) 2000-2001 Adaptec Inc.
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
Modify my copyright notice to allow the sequencer to be used with GPLed software (aka Linux). Fix a few bugs in the sequencer assembler. Make it easy to compiler the assembler with debugging turned on.
1997-06-27 19:38:56 +00:00
* notice, this list of conditions, and the following disclaimer,
Simplify my copyright license terms. aic7xxx.c: Add a function for sucking firmware out of the controller prior to reset. Remove some inline bloat from functions that should not have been inlined. During initialization, wait 1ms after the chip reset before touching any registers. You can get machine checks on certain architectures (Atari I think?) without the delay. Return CAM_REQ_CMP for external BDR requests instead of CAM_BDR_SENT. Bump some messages to bootverbose levels above 1. Don't clear any negotiated sync rate if the target rejects a WDTR message. The sync rate is only cleared if the target accepts a WDTR message. Fix a small bug in the mesgin handling code that could cause us to believe that we had recieved a message that was actually received by another target. This could only confuse us in some very rare transmission negotiation scenarios. Remove some unecessary cleanup of residual information after a residual is reported. The sequencer does this when the command is queued now.
1999-12-06 18:23:31 +00:00
* without modification.
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
* substantially similar to the "NO WARRANTY" disclaimer below
* ("Disclaimer") and any redistribution must be conditioned upon
* including a substantially similar Disclaimer requirement for further
* binary redistribution.
* 3. Neither the names of the above-listed copyright holders nor the names
* of any contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
*
Simplify my copyright license terms. aic7xxx.c: Add a function for sucking firmware out of the controller prior to reset. Remove some inline bloat from functions that should not have been inlined. During initialization, wait 1ms after the chip reset before touching any registers. You can get machine checks on certain architectures (Atari I think?) without the delay. Return CAM_REQ_CMP for external BDR requests instead of CAM_BDR_SENT. Bump some messages to bootverbose levels above 1. Don't clear any negotiated sync rate if the target rejects a WDTR message. The sync rate is only cleared if the target accepts a WDTR message. Fix a small bug in the mesgin handling code that could cause us to believe that we had recieved a message that was actually received by another target. This could only confuse us in some very rare transmission negotiation scenarios. Remove some unecessary cleanup of residual information after a residual is reported. The sequencer does this when the command is queued now.
1999-12-06 18:23:31 +00:00
* Alternatively, this software may be distributed under the terms of the
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
* GNU General Public License ("GPL") version 2 as published by the Free
* Software Foundation.
Modify my copyright notice to allow the sequencer to be used with GPLed software (aka Linux). Fix a few bugs in the sequencer assembler. Make it easy to compiler the assembler with debugging turned on.
1997-06-27 19:38:56 +00:00
*
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
*
$Id$ -> $FreeBSD$
1999-08-28 01:08:13 +00:00
* $FreeBSD$
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
*/
Correct/Simplify ignore wide residue message handling aic7xxx.c: In ahc_handle_ign_wide_residue(): o Use SCB_XFERLEN_ODD SCB field to determine transfer "oddness" rather than the DATA_COUNT_ODD logic. SCB_XFERLEN_ODD is toggled on every ignore wide residue message so that multiple ignore wide residue messages for the same transaction are properly supported. o If the sg list has been exausted, the sequencer doesn't bother to update the residual data count since it is known to be zero. Perform the zeroing manually before calculating the remaining data count. o Ensure that SG_LIST_NULL is cleared in the residual sg pointer for "mid-transfer" ignore wide residue cases. o Use multibyte in/out macros instead of shifting/masking by hand. aic7xxx.h: Modify the SCB_GET_LUN() macro to mask the lun hardware SCB field with LID. This leaves two bits in the LUN field that can be used for other purposes. aic7xxx.reg: Change LID to be 0x3F. This is the maximum supported lun size for non-packetized SCSI. Map the top bit of the lun to SCB_XFERLEN_ODD. The host must set this bit whenever a transfer is an odd length. Remove the ODD_SEG bit field that was used to carry the odd transfer length information through the SG cache. This is obviated by SCB_XFERLEN_ODD field. Remove the DATA_COUNT_ODD scratch ram byte that was used dynamicaly compute data transfer oddness. This is obviated by SCB_XFERLEN_ODD field. aic7xxx.seq: Be more careful in our handling of the SCB_LUN field. It must be masked with LID if only lun information is desired. Remove all updates to the DATA_COUNT_ODD scratch ram field. Remove all uses of ODD_SEG. These two save quite a few sequencer instructions. Use SCB_XFERLEN_ODD to validate the end of transfer ignore wide residue message case. aic7xxx_inline.h: In ahc_queue_scb(), setup the SCB_XFERLEN_ODD field. Approved by: RE
2003-05-26 21:24:01 +00:00
VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#39 $"
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
* This file is processed by the aic7xxx_asm utility for use in assembling
* firmware for the aic7xxx family of SCSI host adapters as well as to generate
* a C header file for use in the kernel portion of the Aic7xxx driver.
*
* All page numbers refer to the Adaptec AIC-7770 Data Book available from
* Adaptec's Technical Documents Department 1-800-934-2766
*/
/*
* SCSI Sequence Control (p. 3-11).
* Each bit, when set starts a specific SCSI sequence on the bus
*/
register SCSISEQ {
address 0x000
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field TEMODE 0x80
field ENSELO 0x40
field ENSELI 0x20
field ENRSELI 0x10
field ENAUTOATNO 0x08
field ENAUTOATNI 0x04
field ENAUTOATNP 0x02
field SCSIRSTO 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* SCSI Transfer Control 0 Register (pp. 3-13).
* Controls the SCSI module data path.
*/
register SXFRCTL0 {
address 0x001
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field DFON 0x80
field DFPEXP 0x40
field FAST20 0x20
field CLRSTCNT 0x10
field SPIOEN 0x08
field SCAMEN 0x04
field CLRCHN 0x02
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* SCSI Transfer Control 1 Register (pp. 3-14,15).
* Controls the SCSI module data path.
*/
register SXFRCTL1 {
address 0x002
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field BITBUCKET 0x80
field SWRAPEN 0x40
field ENSPCHK 0x20
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
mask STIMESEL 0x18
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field ENSTIMER 0x04
field ACTNEGEN 0x02
field STPWEN 0x01 /* Powered Termination */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* SCSI Control Signal Read Register (p. 3-15).
* Reads the actual state of the SCSI bus pins
*/
register SCSISIGI {
address 0x003
access_mode RO
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CDI 0x80
field IOI 0x40
field MSGI 0x20
field ATNI 0x10
field SELI 0x08
field BSYI 0x04
field REQI 0x02
field ACKI 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
* Possible phases in SCSISIGI
*/
mask PHASE_MASK CDI|IOI|MSGI
mask P_DATAOUT 0x00
mask P_DATAIN IOI
Pull the correct file over to freefall.
2000-09-16 20:59:12 +00:00
mask P_DATAOUT_DT P_DATAOUT|MSGI
mask P_DATAIN_DT P_DATAIN|MSGI
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
mask P_COMMAND CDI
mask P_MESGOUT CDI|MSGI
mask P_STATUS CDI|IOI
mask P_MESGIN CDI|IOI|MSGI
}
/*
* SCSI Control Signal Write Register (p. 3-16).
* Writing to this register modifies the control signals on the bus. Only
* those signals that are allowed in the current mode (Initiator/Target) are
* asserted.
*/
register SCSISIGO {
address 0x003
access_mode WO
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CDO 0x80
field IOO 0x40
field MSGO 0x20
field ATNO 0x10
field SELO 0x08
field BSYO 0x04
field REQO 0x02
field ACKO 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
* Possible phases to write into SCSISIG0
*/
mask PHASE_MASK CDI|IOI|MSGI
mask P_DATAOUT 0x00
mask P_DATAIN IOI
mask P_COMMAND CDI
mask P_MESGOUT CDI|MSGI
mask P_STATUS CDI|IOI
mask P_MESGIN CDI|IOI|MSGI
}
/*
* SCSI Rate Control (p. 3-17).
* Contents of this register determine the Synchronous SCSI data transfer
* rate and the maximum synchronous Req/Ack offset. An offset of 0 in the
* SOFS (3:0) bits disables synchronous data transfers. Any offset value
* greater than 0 enables synchronous transfers.
*/
register SCSIRATE {
address 0x004
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field WIDEXFER 0x80 /* Wide transfer control */
field ENABLE_CRC 0x40 /* CRC for D-Phases */
field SINGLE_EDGE 0x10 /* Disable DT Transfers */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
mask SXFR 0x70 /* Sync transfer rate */
Update copyrights to Y2K. 93cx6.c: Make the SRAM dump output a little prettier. aic7xxx.c: Store all SG entries into our SG array in kernel space. This makes data-overrun and other error reporting more useful as we can dump all SG entries. In the past, we only stored the SG entries that the sequencer might need to access, which meant we skipped the first element that is embedded into the SCB. Add a table of chip strings and replace ugly switch statements with table lookups. Add a table with bus phase strings and message reponses to parity errors in those phases. Use the table to pretty print bus phase messages as well as collapse another switch statement. Fix a bug in target mode that could cause us to unpause the sequencer early in bus reset processing. Add the 80MHz/DT mode into our syncrate table. This rate is not yet used or enabled. Correct some comments, clean up some code... aic7xxx.h: Add U160 controller feature information. Add some more bit fields for various SEEPROM formats. aic7xxx.reg: Add U160 register and register bit definitions. aic7xxx.seq: Make phasemis state tracking more straight forward. This avoids the consumption of SINDEX which is a very useful register. For the U160 chips, you must use the 'mov' instruction to update DFCNTRL. Using 'or' to set the PRELOADED bit is completely ineffective. At the end of the command phase, wair for our ACK signal to de-assert before disabling the SCSI dma engine. For slow devices, this avoids clearing the ACK before the other end has had a chance to see it and lower REQ.
2000-01-07 23:08:20 +00:00
mask SXFR_ULTRA2 0x0f /* Sync transfer rate */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
mask SOFS 0x0f /* Sync offset */
}
/*
* SCSI ID (p. 3-18).
* Contains the ID of the board and the current target on the
* selected channel.
*/
register SCSIID {
address 0x005
access_mode RW
mask TID 0xf0 /* Target ID mask */
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
mask TWIN_TID 0x70
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field TWIN_CHNLB 0x80
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
mask OID 0x0f /* Our ID mask */
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
/*
* SCSI Maximum Offset (p. 4-61 aic7890/91 Data Book)
* The aic7890/91 allow an offset of up to 127 transfers in both wide
* and narrow mode.
*/
alias SCSIOFFSET
mask SOFS_ULTRA2 0x7f /* Sync offset U2 chips */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* SCSI Latched Data (p. 3-19).
* Read/Write latches used to transfer data on the SCSI bus during
* Automatic or Manual PIO mode. SCSIDATH can be used for the
* upper byte of a 16bit wide asynchronouse data phase transfer.
*/
register SCSIDATL {
address 0x006
access_mode RW
}
register SCSIDATH {
address 0x007
access_mode RW
}
/*
* SCSI Transfer Count (pp. 3-19,20)
* These registers count down the number of bytes transferred
* across the SCSI bus. The counter is decremented only once
* the data has been safely transferred. SDONE in SSTAT0 is
* set when STCNT goes to 0
*/
register STCNT {
address 0x008
size 3
access_mode RW
}
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
/* ALT_MODE registers (Ultra2 and Ultra160 chips) */
register SXFRCTL2 {
address 0x013
access_mode RW
field AUTORSTDIS 0x10
field CMDDMAEN 0x08
mask ASYNC_SETUP 0x07
}
Update copyrights to Y2K. 93cx6.c: Make the SRAM dump output a little prettier. aic7xxx.c: Store all SG entries into our SG array in kernel space. This makes data-overrun and other error reporting more useful as we can dump all SG entries. In the past, we only stored the SG entries that the sequencer might need to access, which meant we skipped the first element that is embedded into the SCB. Add a table of chip strings and replace ugly switch statements with table lookups. Add a table with bus phase strings and message reponses to parity errors in those phases. Use the table to pretty print bus phase messages as well as collapse another switch statement. Fix a bug in target mode that could cause us to unpause the sequencer early in bus reset processing. Add the 80MHz/DT mode into our syncrate table. This rate is not yet used or enabled. Correct some comments, clean up some code... aic7xxx.h: Add U160 controller feature information. Add some more bit fields for various SEEPROM formats. aic7xxx.reg: Add U160 register and register bit definitions. aic7xxx.seq: Make phasemis state tracking more straight forward. This avoids the consumption of SINDEX which is a very useful register. For the U160 chips, you must use the 'mov' instruction to update DFCNTRL. Using 'or' to set the PRELOADED bit is completely ineffective. At the end of the command phase, wair for our ACK signal to de-assert before disabling the SCSI dma engine. For slow devices, this avoids clearing the ACK before the other end has had a chance to see it and lower REQ.
2000-01-07 23:08:20 +00:00
/* ALT_MODE register on Ultra160 chips */
register OPTIONMODE {
address 0x008
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field AUTORATEEN 0x80
field AUTOACKEN 0x40
field ATNMGMNTEN 0x20
field BUSFREEREV 0x10
field EXPPHASEDIS 0x08
field SCSIDATL_IMGEN 0x04
field AUTO_MSGOUT_DE 0x02
field DIS_MSGIN_DUALEDGE 0x01
Update copyrights to Y2K. 93cx6.c: Make the SRAM dump output a little prettier. aic7xxx.c: Store all SG entries into our SG array in kernel space. This makes data-overrun and other error reporting more useful as we can dump all SG entries. In the past, we only stored the SG entries that the sequencer might need to access, which meant we skipped the first element that is embedded into the SCB. Add a table of chip strings and replace ugly switch statements with table lookups. Add a table with bus phase strings and message reponses to parity errors in those phases. Use the table to pretty print bus phase messages as well as collapse another switch statement. Fix a bug in target mode that could cause us to unpause the sequencer early in bus reset processing. Add the 80MHz/DT mode into our syncrate table. This rate is not yet used or enabled. Correct some comments, clean up some code... aic7xxx.h: Add U160 controller feature information. Add some more bit fields for various SEEPROM formats. aic7xxx.reg: Add U160 register and register bit definitions. aic7xxx.seq: Make phasemis state tracking more straight forward. This avoids the consumption of SINDEX which is a very useful register. For the U160 chips, you must use the 'mov' instruction to update DFCNTRL. Using 'or' to set the PRELOADED bit is completely ineffective. At the end of the command phase, wair for our ACK signal to de-assert before disabling the SCSI dma engine. For slow devices, this avoids clearing the ACK before the other end has had a chance to see it and lower REQ.
2000-01-07 23:08:20 +00:00
mask OPTIONMODE_DEFAULTS AUTO_MSGOUT_DE|DIS_MSGIN_DUALEDGE
}
/* ALT_MODE register on Ultra160 chips */
register TARGCRCCNT {
address 0x00a
size 2
access_mode RW
}
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
* Clear SCSI Interrupt 0 (p. 3-20)
* Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT0.
*/
register CLRSINT0 {
address 0x00b
access_mode WO
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CLRSELDO 0x40
field CLRSELDI 0x20
field CLRSELINGO 0x10
field CLRSWRAP 0x08
field CLRIOERR 0x08 /* Ultra2 Only */
field CLRSPIORDY 0x02
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* SCSI Status 0 (p. 3-21)
* Contains one set of SCSI Interrupt codes
* These are most likely of interest to the sequencer
*/
register SSTAT0 {
address 0x00b
access_mode RO
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field TARGET 0x80 /* Board acting as target */
field SELDO 0x40 /* Selection Done */
field SELDI 0x20 /* Board has been selected */
field SELINGO 0x10 /* Selection In Progress */
field SWRAP 0x08 /* 24bit counter wrap */
field IOERR 0x08 /* LVD Tranceiver mode changed */
field SDONE 0x04 /* STCNT = 0x000000 */
field SPIORDY 0x02 /* SCSI PIO Ready */
field DMADONE 0x01 /* DMA transfer completed */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* Clear SCSI Interrupt 1 (p. 3-23)
* Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1.
*/
register CLRSINT1 {
address 0x00c
access_mode WO
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CLRSELTIMEO 0x80
field CLRATNO 0x40
field CLRSCSIRSTI 0x20
field CLRBUSFREE 0x08
field CLRSCSIPERR 0x04
field CLRPHASECHG 0x02
field CLRREQINIT 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* SCSI Status 1 (p. 3-24)
*/
register SSTAT1 {
address 0x00c
access_mode RO
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field SELTO 0x80
field ATNTARG 0x40
field SCSIRSTI 0x20
field PHASEMIS 0x10
field BUSFREE 0x08
field SCSIPERR 0x04
field PHASECHG 0x02
field REQINIT 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* SCSI Status 2 (pp. 3-25,26)
*/
register SSTAT2 {
address 0x00d
access_mode RO
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field OVERRUN 0x80
field SHVALID 0x40 /* Shaddow Layer non-zero */
field EXP_ACTIVE 0x10 /* SCSI Expander Active */
field CRCVALERR 0x08 /* CRC doesn't match (U3 only) */
field CRCENDERR 0x04 /* No terminal CRC packet (U3 only) */
field CRCREQERR 0x02 /* Illegal CRC packet req (U3 only) */
field DUAL_EDGE_ERR 0x01 /* Incorrect data phase (U3 only) */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
mask SFCNT 0x1f
}
/*
* SCSI Status 3 (p. 3-26)
*/
register SSTAT3 {
address 0x00e
access_mode RO
mask SCSICNT 0xf0
mask OFFCNT 0x0f
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
mask U2OFFCNT 0x7f
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
* SCSI ID for the aic7890/91 chips
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
*/
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
register SCSIID_ULTRA2 {
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
address 0x00f
access_mode RW
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
mask TID 0xf0 /* Target ID mask */
mask OID 0x0f /* Our ID mask */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* SCSI Interrupt Mode 1 (p. 3-28)
* Setting any bit will enable the corresponding function
* in SIMODE0 to interrupt via the IRQ pin.
*/
register SIMODE0 {
address 0x010
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field ENSELDO 0x40
field ENSELDI 0x20
field ENSELINGO 0x10
field ENSWRAP 0x08
field ENIOERR 0x08 /* LVD Tranceiver mode changes */
field ENSDONE 0x04
field ENSPIORDY 0x02
field ENDMADONE 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* SCSI Interrupt Mode 1 (pp. 3-28,29)
* Setting any bit will enable the corresponding function
* in SIMODE1 to interrupt via the IRQ pin.
*/
register SIMODE1 {
address 0x011
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field ENSELTIMO 0x80
field ENATNTARG 0x40
field ENSCSIRST 0x20
field ENPHASEMIS 0x10
field ENBUSFREE 0x08
field ENSCSIPERR 0x04
field ENPHASECHG 0x02
field ENREQINIT 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* SCSI Data Bus (High) (p. 3-29)
* This register reads data on the SCSI Data bus directly.
*/
register SCSIBUSL {
address 0x012
aic7xxx.c: Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
access_mode RW
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
register SCSIBUSH {
address 0x013
aic7xxx.c: Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
access_mode RW
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* SCSI/Host Address (p. 3-30)
* These registers hold the host address for the byte about to be
* transferred on the SCSI bus. They are counted up in the same
* manner as STCNT is counted down. SHADDR should always be used
* to determine the address of the last byte transferred since HADDR
* can be skewed by write ahead.
*/
register SHADDR {
address 0x014
size 4
access_mode RO
}
/*
* Selection Timeout Timer (p. 3-30)
*/
register SELTIMER {
address 0x018
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field STAGE6 0x20
field STAGE5 0x10
field STAGE4 0x08
field STAGE3 0x04
field STAGE2 0x02
field STAGE1 0x01
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
alias TARGIDIN
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* Selection/Reselection ID (p. 3-31)
* Upper four bits are the device id. The ONEBIT is set when the re/selecting
* device did not set its own ID.
*/
register SELID {
address 0x019
access_mode RW
mask SELID_MASK 0xf0
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field ONEBIT 0x08
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
Update copyrights to Y2K. 93cx6.c: Make the SRAM dump output a little prettier. aic7xxx.c: Store all SG entries into our SG array in kernel space. This makes data-overrun and other error reporting more useful as we can dump all SG entries. In the past, we only stored the SG entries that the sequencer might need to access, which meant we skipped the first element that is embedded into the SCB. Add a table of chip strings and replace ugly switch statements with table lookups. Add a table with bus phase strings and message reponses to parity errors in those phases. Use the table to pretty print bus phase messages as well as collapse another switch statement. Fix a bug in target mode that could cause us to unpause the sequencer early in bus reset processing. Add the 80MHz/DT mode into our syncrate table. This rate is not yet used or enabled. Correct some comments, clean up some code... aic7xxx.h: Add U160 controller feature information. Add some more bit fields for various SEEPROM formats. aic7xxx.reg: Add U160 register and register bit definitions. aic7xxx.seq: Make phasemis state tracking more straight forward. This avoids the consumption of SINDEX which is a very useful register. For the U160 chips, you must use the 'mov' instruction to update DFCNTRL. Using 'or' to set the PRELOADED bit is completely ineffective. At the end of the command phase, wair for our ACK signal to de-assert before disabling the SCSI dma engine. For slow devices, this avoids clearing the ACK before the other end has had a chance to see it and lower REQ.
2000-01-07 23:08:20 +00:00
register SCAMCTL {
address 0x01a
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field ENSCAMSELO 0x80
field CLRSCAMSELID 0x40
field ALTSTIM 0x20
field DFLTTID 0x10
Update copyrights to Y2K. 93cx6.c: Make the SRAM dump output a little prettier. aic7xxx.c: Store all SG entries into our SG array in kernel space. This makes data-overrun and other error reporting more useful as we can dump all SG entries. In the past, we only stored the SG entries that the sequencer might need to access, which meant we skipped the first element that is embedded into the SCB. Add a table of chip strings and replace ugly switch statements with table lookups. Add a table with bus phase strings and message reponses to parity errors in those phases. Use the table to pretty print bus phase messages as well as collapse another switch statement. Fix a bug in target mode that could cause us to unpause the sequencer early in bus reset processing. Add the 80MHz/DT mode into our syncrate table. This rate is not yet used or enabled. Correct some comments, clean up some code... aic7xxx.h: Add U160 controller feature information. Add some more bit fields for various SEEPROM formats. aic7xxx.reg: Add U160 register and register bit definitions. aic7xxx.seq: Make phasemis state tracking more straight forward. This avoids the consumption of SINDEX which is a very useful register. For the U160 chips, you must use the 'mov' instruction to update DFCNTRL. Using 'or' to set the PRELOADED bit is completely ineffective. At the end of the command phase, wair for our ACK signal to de-assert before disabling the SCSI dma engine. For slow devices, this avoids clearing the ACK before the other end has had a chance to see it and lower REQ.
2000-01-07 23:08:20 +00:00
mask SCAMLVL 0x03
}
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
/*
* Target Mode Selecting in ID bitmask (aic7890/91/96/97)
*/
register TARGID {
address 0x01b
size 2
access_mode RW
}
/*
* Serial Port I/O Cabability register (p. 4-95 aic7860 Data Book)
* Indicates if external logic has been attached to the chip to
* perform the tasks of accessing a serial eeprom, testing termination
* strength, and performing cable detection. On the aic7860, most of
* these features are handled on chip, but on the aic7855 an attached
* aic3800 does the grunt work.
*/
register SPIOCAP {
address 0x01b
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field SOFT1 0x80
field SOFT0 0x40
field SOFTCMDEN 0x20
field EXT_BRDCTL 0x10 /* External Board control */
field SEEPROM 0x08 /* External serial eeprom logic */
field EEPROM 0x04 /* Writable external BIOS ROM */
field ROM 0x02 /* Logic for accessing external ROM */
field SSPIOCPS 0x01 /* Termination and cable detection */
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
}
Clean up and order register definitions.
1999-03-08 22:43:23 +00:00
register BRDCTL {
address 0x01d
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field BRDDAT7 0x80
field BRDDAT6 0x40
field BRDDAT5 0x20
field BRDSTB 0x10
field BRDCS 0x08
field BRDRW 0x04
field BRDCTL1 0x02
field BRDCTL0 0x01
Clean up and order register definitions.
1999-03-08 22:43:23 +00:00
/* 7890 Definitions */
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field BRDDAT4 0x10
field BRDDAT3 0x08
field BRDDAT2 0x04
field BRDRW_ULTRA2 0x02
field BRDSTB_ULTRA2 0x01
Clean up and order register definitions.
1999-03-08 22:43:23 +00:00
}
/*
* Serial EEPROM Control (p. 4-92 in 7870 Databook)
* Controls the reading and writing of an external serial 1-bit
* EEPROM Device. In order to access the serial EEPROM, you must
* first set the SEEMS bit that generates a request to the memory
* port for access to the serial EEPROM device. When the memory
* port is not busy servicing another request, it reconfigures
* to allow access to the serial EEPROM. When this happens, SEERDY
* gets set high to verify that the memory port access has been
* granted.
*
* After successful arbitration for the memory port, the SEECS bit of
* the SEECTL register is connected to the chip select. The SEECK,
* SEEDO, and SEEDI are connected to the clock, data out, and data in
* lines respectively. The SEERDY bit of SEECTL is useful in that it
* gives us an 800 nsec timer. After a write to the SEECTL register,
* the SEERDY goes high 800 nsec later. The one exception to this is
* when we first request access to the memory port. The SEERDY goes
* high to signify that access has been granted and, for this case, has
* no implied timing.
*
* See 93cx6.c for detailed information on the protocol necessary to
* read the serial EEPROM.
*/
register SEECTL {
address 0x01e
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field EXTARBACK 0x80
field EXTARBREQ 0x40
field SEEMS 0x20
field SEERDY 0x10
field SEECS 0x08
field SEECK 0x04
field SEEDO 0x02
field SEEDI 0x01
Clean up and order register definitions.
1999-03-08 22:43:23 +00:00
}
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
* SCSI Block Control (p. 3-32)
* Controls Bus type and channel selection. In a twin channel configuration
* addresses 0x00-0x1e are gated to the appropriate channel based on this
* register. SELWIDE allows for the coexistence of 8bit and 16bit devices
* on a wide bus.
*/
register SBLKCTL {
address 0x01f
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field DIAGLEDEN 0x80 /* Aic78X0 only */
field DIAGLEDON 0x40 /* Aic78X0 only */
field AUTOFLUSHDIS 0x20
field SELBUSB 0x08
field ENAB40 0x08 /* LVD transceiver active */
field ENAB20 0x04 /* SE/HVD transceiver active */
field SELWIDE 0x02
field XCVR 0x01 /* External transceiver active */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* Sequencer Control (p. 3-33)
* Error detection mode and speed configuration
*/
register SEQCTL {
address 0x060
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field PERRORDIS 0x80
field PAUSEDIS 0x40
field FAILDIS 0x20
field FASTMODE 0x10
field BRKADRINTEN 0x08
field STEP 0x04
field SEQRESET 0x02
field LOADRAM 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* Sequencer RAM Data (p. 3-34)
* Single byte window into the Scratch Ram area starting at the address
* specified by SEQADDR0 and SEQADDR1. To write a full word, simply write
Add support for routing initiator transactions to disabled luns to the black hole device. The controller will now only accept selections if the black hole device is present and some other target/lun is enabled for target mode. Handle the IGNORE WIDE RESIDUE message. This support has not been tested. Checkpoint work on handling ABORT, BUS DEVICE RESET, TERMINATE I/O PROCESS, and CLEAR QUEUE messages as a target. Fix a few problems with tagged command handling in target mode. Wait until the sync offset counter falls to 0 before changing phase after a data-in transfer completes as the DMA logic seems to indicate transfer complete as soon as our last REQ is issued. Simplify some of the target mode message handling code in the sequencer.
1999-01-14 06:14:15 +00:00
* four bytes in succession. The SEQADDRs will increment after the most
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
* significant byte is written
*/
register SEQRAM {
address 0x061
access_mode RW
}
/*
* Sequencer Address Registers (p. 3-35)
* Only the first bit of SEQADDR1 holds addressing information
*/
register SEQADDR0 {
address 0x062
access_mode RW
}
register SEQADDR1 {
address 0x063
access_mode RW
mask SEQADDR1_MASK 0x01
}
/*
* Accumulator
* We cheat by passing arguments in the Accumulator up to the kernel driver
*/
register ACCUM {
address 0x064
access_mode RW
accumulator
}
register SINDEX {
address 0x065
access_mode RW
sindex
}
register DINDEX {
address 0x066
access_mode RW
}
register ALLONES {
address 0x069
access_mode RO
allones
}
register ALLZEROS {
address 0x06a
access_mode RO
allzeros
}
register NONE {
address 0x06a
access_mode WO
none
}
register FLAGS {
address 0x06b
access_mode RO
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field ZERO 0x02
field CARRY 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
register SINDIR {
address 0x06c
access_mode RO
}
register DINDIR {
address 0x06d
access_mode WO
}
register FUNCTION1 {
address 0x06e
access_mode RW
}
register STACK {
address 0x06f
access_mode RO
}
aic7xxx.reg: Add a constant for the controller's stack size and the maximum scsi offset. aic7xxx.seq: Style nit. The source is implied to be the destination unless overridden in an "and" instruction. Update target mode code for changes in identify seen sequencer flags. aic7xxx_pci.c: Ensure that the PCIERRGENDIS bit is set in the PCIERRGEN config space register. Perhaps this is a reason for the spurios parity errors reported on U160 controllers. Honor the AHC_NO_BIOS_INIT flag. Allow PCI interrupt reporting to be disabled, by clearing the PERRRESEN bit in the command register. This option is now enabled via a new softc flag: AHC_DISABLE_PCI_PERR. Disable SERR and pause the controller prior to performing our mmapped I/O test. This should handle the case of controllers that do not "auto-access pause". For legacy controllers, use SCB ram instead of scratch ram since the latter may contain settings left over from the BIOS that we will use if an seeprom is not found. Make use of new ahc_inl/outl() inlines. aic7xxx.h: Reformat a few comments to follow driver style. Add a controller flags that indicate that a controller has not been initialized by the BIOS and whether to disable PCI parity errors.. Remove stack probing softc members. Add a few more syncrate constants that are useful in speed fallback calculations. Add the SHOW_MASKED_ERRORS debug flag. aic7xxx.h: aic7xxx.c: Implement the SCB_SILENT flag. This is useful for hushing up the driver during DV or other operations that we expect to cause transmission errors. The messages will still print if the SHOW_MASKED_ERRORS debug option is enabled. aic7xxx_inline.h: Implement ahc_[in|out][w|l|q]. This removes the need for manual 'or and shift" type operations throughout the driver. aic7xxx.c: Move SELTO dignostic so that the SCB is still valid when we use it for printing path information. If we are narrow, limit syncrate to Ultra2. Don't clobber ppr_options when forcing a renegotiation. The current ppr_options may be referenced while queuing new commands. Don't set our width to unknown when forcing negotiation on narrow controllers. This will confuse the negotiation code into negotiating with a wide message on narrow controllers. Add an "asserting atn" diagnostic with controller/target information. Remove the probe_stack code. The stack is always 4 deep on legacy controllers, so probing is pointless. This also avoids an issue where probing the stack would upset the aic7770. In ahc_reset(), record whether or not we found the controller in a reset state. If the controller was already reset, assume that no BIOS has initialized the controller and ignore left over scratch ram settings. Fix an ifdef bug that caused sequencer debugging to be enabled always. Clear the ultraenb flag in our tstate during startup. The ultraenbled'ness of a device is recorded in the user transfer settings. tstate->ultraenb bitmask indicates which devices we have negotiated an ultra speed with. Just after initialization, we are async. Setting the ultraenb flag while async seems to be harmless, but it was confusing to see the ULTRAENB flag set in the SCB. Enhance residual diagnostic to indicate if the residual if for sense information or normal data transfers. Indicate the features, bugs, and flags set in the softc that are used to control firmware patch download when booting verbose. In ahc_dump_card_state() fix a logic reversal. The SCSIPHASE register only exists on U160 controllers. The SCSISIGI register exists on all controllers. Not the other way around. Also print out the ERROR register. Allow ahc_dump_card_state() to be called when the sequencer is not paused. Add dump card state markers as in the U320 driver.
2003-01-20 20:44:55 +00:00
const STACK_SIZE 4
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
* Board Control (p. 3-43)
*/
register BCTL {
address 0x084
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field ACE 0x08
field ENABLE 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* On the aic78X0 chips, Board Control is replaced by the DSCommand
* register (p. 4-64)
*/
Clean up and order register definitions.
1999-03-08 22:43:23 +00:00
register DSCOMMAND0 {
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
address 0x084
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CACHETHEN 0x80 /* Cache Threshold enable */
field DPARCKEN 0x40 /* Data Parity Check Enable */
field MPARCKEN 0x20 /* Memory Parity Check Enable */
field EXTREQLCK 0x10 /* External Request Lock */
Clean up and order register definitions.
1999-03-08 22:43:23 +00:00
/* aic7890/91/96/97 only */
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field INTSCBRAMSEL 0x08 /* Internal SCB RAM Select */
field RAMPS 0x04 /* External SCB RAM Present */
field USCBSIZE32 0x02 /* Use 32byte SCB Page Size */
field CIOPARCKEN 0x01 /* Internal bus parity error enable */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
ahc_pci.c: If bus_dma will give us addresses > 32 bits, setup our dma tag to accept up to 39bit addresses. aic7770.c: Update the softc directly rather than use an intermediate "probe_config" structure. aic7xxx.c: Complete core work to support 39bit addresses for bulk data dma operations. Controller data structures still must reside under the 4GB boundary to reduce code/data size in the sequencer and related data structures. This has been tested under Linux IA64 and will be tested on IA64 for FreeBSD as soon as our port can run there. Add bus dmamap synchronization calls around manipulation of all controller/kernel shared host data structures. Implement data pointer reinitialation for a second data phase in a single connection in the kernel rather than bloat the sequencer. This is an extremely rare operation (does it ever happen?) and the sequencer implementation was flawed for some of the newest chips. Don't ever allow our target role to initiate a PPR. This is forbidden by the SCSI spec. Add a few missing endian conversions in the ignore wide pointers code. The core has been tested on the PPC under Linux and should work for FreeBSD PPC. As soon as I can test the OSM layer for FreeBSD PPC, I will. Move some of ahc_softc_init() into ahc_alloc() now that the probe_config structure is gone. Add a 4GB boundary condition on all of our dma tags. 32bit DAC under PCI only works on a single 4GB "page". Although we can cross 4GB on a true 64bit bus, the card won't always be installed in one and we can save code space and cost in implementing high address support by assuming the high DWORD address will never change. Add diagnostics to ahc_search_qinfifo(). Correct a target mode issue with bus resets. To avoid an interrupt storm from a malicious third party holding the reset line, the sequencer would defer re-enabling the reset interrupt until either a select-out or select-in. Unfortunately, the select-in enable bit is cleared by a bus reset, so a second reset will render the card deaf to an initiator's attempts to contact it. We now re-enable bus reset interrupts immediately if the target role is enabled. aic7xxx.h: Remove struct ahc_probe_config. SCB's now contain a pointer to the sg_map_node so we can perfrom bus dma sync operations on the SG list prior to queuing a command. aic7xxx.reg: Register the Perforce ID for this file with the VERSION keyword so it is printed in generated files. Add the DSCOMMAND1 register which is used to access the high DWORD of address bits. Add the data pointer reinitialize sequencer interrupt code. aic7xxx.seq: Register the Perforce ID for this file with the VERSION keyword so it is printed in generated files. Remove code to re-enable the bus reset interrupt after a select-in. In target mode we cannot defer this operation as ENSELI is cleared by a bus reset. Complete 39bit support. Generate a sequencer inteerrupt rather than handle the data pointers re-initialitation in the sequencer. Inline the "seen identify" assertion to save a few cycles. Short circuit the update of our residual data if we have fully completed a transfer. The residual is correct from our last S/G load operation. Short circuit full SDPTR processing if the residual is 0. Just mark the transfer as complete. aic7xxx_93cx6.c: Synchronize perforce IDs. aic7xxx_freebsd.c: Complete untested 39bit support. Add missing endia conversions. Clear our residuals prior to starting a command. The update residual code in the core only sets the residual if there is one. aic7xxx_freebsd.h: Modeify ahc_dmamap_sync() macros to take an offset and a length. This is how sync operations are performed in NetBSD, and we should update our bus dma implementation to match. aic7xxx_inline.h: Add data structure synchronization helper functions. Fix a bug in ahc_intr() where we would not clear our unsolicited interrupt counter after running our PCI interrupt handler. This may have been the cause of the spurious PCI interrupt messages. aic7xxx_pci.c: Adjust for loss of probe_config structure. Guard against bogus 9005 subdevice information as seen on some IBM MB configurations. Add 39bit address support. MFC after: 10 days
2001-07-18 21:39:48 +00:00
register DSCOMMAND1 {
address 0x085
access_mode RW
mask DSLATT 0xfc /* PCI latency timer (non-ultra2) */
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field HADDLDSEL1 0x02 /* Host Address Load Select Bits */
field HADDLDSEL0 0x01
ahc_pci.c: If bus_dma will give us addresses > 32 bits, setup our dma tag to accept up to 39bit addresses. aic7770.c: Update the softc directly rather than use an intermediate "probe_config" structure. aic7xxx.c: Complete core work to support 39bit addresses for bulk data dma operations. Controller data structures still must reside under the 4GB boundary to reduce code/data size in the sequencer and related data structures. This has been tested under Linux IA64 and will be tested on IA64 for FreeBSD as soon as our port can run there. Add bus dmamap synchronization calls around manipulation of all controller/kernel shared host data structures. Implement data pointer reinitialation for a second data phase in a single connection in the kernel rather than bloat the sequencer. This is an extremely rare operation (does it ever happen?) and the sequencer implementation was flawed for some of the newest chips. Don't ever allow our target role to initiate a PPR. This is forbidden by the SCSI spec. Add a few missing endian conversions in the ignore wide pointers code. The core has been tested on the PPC under Linux and should work for FreeBSD PPC. As soon as I can test the OSM layer for FreeBSD PPC, I will. Move some of ahc_softc_init() into ahc_alloc() now that the probe_config structure is gone. Add a 4GB boundary condition on all of our dma tags. 32bit DAC under PCI only works on a single 4GB "page". Although we can cross 4GB on a true 64bit bus, the card won't always be installed in one and we can save code space and cost in implementing high address support by assuming the high DWORD address will never change. Add diagnostics to ahc_search_qinfifo(). Correct a target mode issue with bus resets. To avoid an interrupt storm from a malicious third party holding the reset line, the sequencer would defer re-enabling the reset interrupt until either a select-out or select-in. Unfortunately, the select-in enable bit is cleared by a bus reset, so a second reset will render the card deaf to an initiator's attempts to contact it. We now re-enable bus reset interrupts immediately if the target role is enabled. aic7xxx.h: Remove struct ahc_probe_config. SCB's now contain a pointer to the sg_map_node so we can perfrom bus dma sync operations on the SG list prior to queuing a command. aic7xxx.reg: Register the Perforce ID for this file with the VERSION keyword so it is printed in generated files. Add the DSCOMMAND1 register which is used to access the high DWORD of address bits. Add the data pointer reinitialize sequencer interrupt code. aic7xxx.seq: Register the Perforce ID for this file with the VERSION keyword so it is printed in generated files. Remove code to re-enable the bus reset interrupt after a select-in. In target mode we cannot defer this operation as ENSELI is cleared by a bus reset. Complete 39bit support. Generate a sequencer inteerrupt rather than handle the data pointers re-initialitation in the sequencer. Inline the "seen identify" assertion to save a few cycles. Short circuit the update of our residual data if we have fully completed a transfer. The residual is correct from our last S/G load operation. Short circuit full SDPTR processing if the residual is 0. Just mark the transfer as complete. aic7xxx_93cx6.c: Synchronize perforce IDs. aic7xxx_freebsd.c: Complete untested 39bit support. Add missing endia conversions. Clear our residuals prior to starting a command. The update residual code in the core only sets the residual if there is one. aic7xxx_freebsd.h: Modeify ahc_dmamap_sync() macros to take an offset and a length. This is how sync operations are performed in NetBSD, and we should update our bus dma implementation to match. aic7xxx_inline.h: Add data structure synchronization helper functions. Fix a bug in ahc_intr() where we would not clear our unsolicited interrupt counter after running our PCI interrupt handler. This may have been the cause of the spurious PCI interrupt messages. aic7xxx_pci.c: Adjust for loss of probe_config structure. Guard against bogus 9005 subdevice information as seen on some IBM MB configurations. Add 39bit address support. MFC after: 10 days
2001-07-18 21:39:48 +00:00
}
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
ahc_pci.c: If bus_dma will give us addresses > 32 bits, setup our dma tag to accept up to 39bit addresses. aic7770.c: Update the softc directly rather than use an intermediate "probe_config" structure. aic7xxx.c: Complete core work to support 39bit addresses for bulk data dma operations. Controller data structures still must reside under the 4GB boundary to reduce code/data size in the sequencer and related data structures. This has been tested under Linux IA64 and will be tested on IA64 for FreeBSD as soon as our port can run there. Add bus dmamap synchronization calls around manipulation of all controller/kernel shared host data structures. Implement data pointer reinitialation for a second data phase in a single connection in the kernel rather than bloat the sequencer. This is an extremely rare operation (does it ever happen?) and the sequencer implementation was flawed for some of the newest chips. Don't ever allow our target role to initiate a PPR. This is forbidden by the SCSI spec. Add a few missing endian conversions in the ignore wide pointers code. The core has been tested on the PPC under Linux and should work for FreeBSD PPC. As soon as I can test the OSM layer for FreeBSD PPC, I will. Move some of ahc_softc_init() into ahc_alloc() now that the probe_config structure is gone. Add a 4GB boundary condition on all of our dma tags. 32bit DAC under PCI only works on a single 4GB "page". Although we can cross 4GB on a true 64bit bus, the card won't always be installed in one and we can save code space and cost in implementing high address support by assuming the high DWORD address will never change. Add diagnostics to ahc_search_qinfifo(). Correct a target mode issue with bus resets. To avoid an interrupt storm from a malicious third party holding the reset line, the sequencer would defer re-enabling the reset interrupt until either a select-out or select-in. Unfortunately, the select-in enable bit is cleared by a bus reset, so a second reset will render the card deaf to an initiator's attempts to contact it. We now re-enable bus reset interrupts immediately if the target role is enabled. aic7xxx.h: Remove struct ahc_probe_config. SCB's now contain a pointer to the sg_map_node so we can perfrom bus dma sync operations on the SG list prior to queuing a command. aic7xxx.reg: Register the Perforce ID for this file with the VERSION keyword so it is printed in generated files. Add the DSCOMMAND1 register which is used to access the high DWORD of address bits. Add the data pointer reinitialize sequencer interrupt code. aic7xxx.seq: Register the Perforce ID for this file with the VERSION keyword so it is printed in generated files. Remove code to re-enable the bus reset interrupt after a select-in. In target mode we cannot defer this operation as ENSELI is cleared by a bus reset. Complete 39bit support. Generate a sequencer inteerrupt rather than handle the data pointers re-initialitation in the sequencer. Inline the "seen identify" assertion to save a few cycles. Short circuit the update of our residual data if we have fully completed a transfer. The residual is correct from our last S/G load operation. Short circuit full SDPTR processing if the residual is 0. Just mark the transfer as complete. aic7xxx_93cx6.c: Synchronize perforce IDs. aic7xxx_freebsd.c: Complete untested 39bit support. Add missing endia conversions. Clear our residuals prior to starting a command. The update residual code in the core only sets the residual if there is one. aic7xxx_freebsd.h: Modeify ahc_dmamap_sync() macros to take an offset and a length. This is how sync operations are performed in NetBSD, and we should update our bus dma implementation to match. aic7xxx_inline.h: Add data structure synchronization helper functions. Fix a bug in ahc_intr() where we would not clear our unsolicited interrupt counter after running our PCI interrupt handler. This may have been the cause of the spurious PCI interrupt messages. aic7xxx_pci.c: Adjust for loss of probe_config structure. Guard against bogus 9005 subdevice information as seen on some IBM MB configurations. Add 39bit address support. MFC after: 10 days
2001-07-18 21:39:48 +00:00
* Bus On/Off Time (p. 3-44) aic7770 only
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
*/
register BUSTIME {
address 0x085
access_mode RW
mask BOFF 0xf0
mask BON 0x0f
}
/*
Clean up and order register definitions.
1999-03-08 22:43:23 +00:00
* Bus Speed (p. 3-45) aic7770 only
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
*/
register BUSSPD {
address 0x086
access_mode RW
mask DFTHRSH 0xc0
mask STBOFF 0x38
mask STBON 0x07
mask DFTHRSH_100 0xc0
aic7xxx.c: Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
mask DFTHRSH_75 0x80
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
Clean up and order register definitions.
1999-03-08 22:43:23 +00:00
/* aic7850/55/60/70/80/95 only */
register DSPCISTATUS {
address 0x086
mask DFTHRSH_100 0xc0
}
Better workaround for aic7890 chip bug. Use the HS_MAILBOX register to tell the sequencer to pause itself for a target msg variable update. This avoids the pause race entirely as HS_MAILBOX can be accessed without pausing the chip. 3.2 Merge candidate.
1999-05-14 05:07:25 +00:00
/* aic7890/91/96/97 only */
register HS_MAILBOX {
address 0x086
mask HOST_MAILBOX 0xF0
mask SEQ_MAILBOX 0x0F
o Correct the offsets into the syncrate table for paritcular negotiation features (DT, ULTRA2, ULTRA, FAST). The offsets where not properly updated when the DT entry was added and so the driver could attempt to negotiate a speed faster than that supported by the target device or even requested by the user via SCSI-Select settings. * o Update the target mode incoming command queue kernel index value ever 128 commands instead of 32. This means that the kernel will always try to keep its index (as seen on the card - the kernel may actually have cleared more space) 128 commands ahead of where the sequencer is adding entries. o Use the HS_MAILBOX register instead of the KERNEL_TQINPOS location in SRAM to indicate the kernel's target queue possition on Ultra2 cards. This avoids the "pause bug" on these cards and also turns out to be much more efficient. o When enabling or disabling a particular target id for target mode, make sure that the taret id in the SCSIID register does not reference an ID that is not to receive target selections. This is only an issue on chips that support the multiple target id feature where the value in SCSIID will still affect selection behavior regardless of the values in the target id bit field registers. o Remove some target mode debugging printfs. o Make sure that the sense length reported in ATIO commands is always zero. This driver does not, yet, report HBA generated sense information for accepted commands. o Honor the CAM_TIME_INFINITY and CAM_TIME_DEFAULT values for the CCB timeout field. o Make the driver compile with AHC_DEBUG again. * Noticed by: Andrew Gallatin<gallatin@cs.duke.edu>
2000-03-18 22:28:20 +00:00
mask HOST_TQINPOS 0x80 /* Boundary at either 0 or 128 */
Better workaround for aic7890 chip bug. Use the HS_MAILBOX register to tell the sequencer to pause itself for a target msg variable update. This avoids the pause race entirely as HS_MAILBOX can be accessed without pausing the chip. 3.2 Merge candidate.
1999-05-14 05:07:25 +00:00
}
const HOST_MAILBOX_SHIFT 4
const SEQ_MAILBOX_SHIFT 0
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
* Host Control (p. 3-47) R/W
* Overall host control of the device.
*/
register HCNTRL {
address 0x087
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field POWRDN 0x40
field SWINT 0x10
field IRQMS 0x08
field PAUSE 0x04
field INTEN 0x02
field CHIPRST 0x01
field CHIPRSTACK 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* Host Address (p. 3-48)
* This register contains the address of the byte about
* to be transferred across the host bus.
*/
register HADDR {
address 0x088
size 4
access_mode RW
}
register HCNT {
address 0x08c
size 3
access_mode RW
}
/*
* SCB Pointer (p. 3-49)
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
* Gate one of the SCBs into the SCBARRAY window.
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
*/
register SCBPTR {
address 0x090
access_mode RW
}
/*
* Interrupt Status (p. 3-50)
* Status for system interrupts
*/
register INTSTAT {
address 0x091
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field BRKADRINT 0x08
field SCSIINT 0x04
field CMDCMPLT 0x02
field SEQINT 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
mask BAD_PHASE SEQINT /* unknown scsi bus phase */
mask SEND_REJECT 0x10|SEQINT /* sending a message reject */
Bring in many bugfixes and changes obtained from formal testing: aic7xxx.c: aic7xxx.h: aic7xxx.reg: aic7xxx.seq: Bring in the protocol violation handler from the U320 driver and replace the NO_IDENT sequencer interrupt code with the PROTO_VIOLATION code. Support for this code required the following changes: SEQ_FLAGS: IDENTIFY_SEEN -> NOT_IDENTIFIED Added NO_CDB_SENT SCB_CONTROL: TARGET_SCB == STATUS_RCVD for initiator mode scb->flags: Added SCB_TARGET_SCB since we cannot rely on TARGET_SCB as a target/initiator differentiator due to it being overloaded in initiator mode to indicate that status has been received. aic7xxx.seq: Move data fifo CLRCHN to mesgin_rdptrs which is a safer location for doing this operation. This also saves a sequencer instruction. aic7xxx.c: aic7xxx.h: Change ahc/ahd_upate_neg_request() to take a "negotiation type" enum that allows us to negotiate: o only if the goal and current parameters differ. o only if the goal is non-async o always - even if the negotiation will be for async. aic7xxx.seq: Reset the FIFO whenever a short CDB transfer occurs so that the FIFO contents do not corrupt a future CDB transfer retry. Add support for catching the various protocol violations handled by ahc_handle_protocol_violation. Reformat some comments. aic7xxx.c: aic7xxx.h: Just for safety, have the aic7xxx driver probe the stack depth. aic7xxx.c: aic7xxx.h: Save and restore stack contents during diagnostics. Some chip variants overwrite stale entries on a stack "pop". Don't use 0 to probe the stack depth. 0 is the typical value used to backfill the stack if entries are overwritten on a "pop". aic7xxx.h: Add a missing typedef. Collapse SCB flag entries so they are bit contiguous. Add AHD_ULTRA2_XFER_PERIOD for narrow fallback calculations aic7xxx.c: Don't panic (as a diagnostic to catch bugs) if we decided to force the renegotiation of async even if we believe we are already async. This should allow us to negotiate async instead of the full user goal rate during startup if bus resets are disabled. Add a space to the end of the ahc/ahd_print_devinfo routines so that it behaves as expected by the code that uses it. Only force a renegotiation on a selection timeout if the SCB was valid. Doing otherwise may be dangerous as the connection was not valid for an unknown reason. Add additional diagnostic output to ahc_dump_card_state(), and have it use the register pretty printing functions. Update ahc_reg_print() to handle a NULL cur_col. Add a newline to ahc_dump_card_state() output. Bring back "use_ppr". We need to use_ppr anytime doppr is true or we have non-zero protocol options. The later case was not handled in the recent removal of use_ppr. Move a comment and remove a useless clearing of use_ppr. Don't disable ENBUSFREE when single stepping on a DT capable controller. We cannot re-enable unexpected busfree detection, so we must clear BUSFREE on each step instead. Correct the lookup of the SCB ID in ahc_handle_proto_error. Remove a diagnostic printf. Remove unecessary restoration of the STACK for older chips. Approved by: re (blanket)
2002-11-30 19:30:09 +00:00
mask PROTO_VIOLATION 0x20|SEQINT /* SCSI protocol violation */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
mask NO_MATCH 0x30|SEQINT /* no cmd match for reconnect */
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
mask IGN_WIDE_RES 0x40|SEQINT /* Complex IGN Wide Res Msg */
ahc_pci.c: If bus_dma will give us addresses > 32 bits, setup our dma tag to accept up to 39bit addresses. aic7770.c: Update the softc directly rather than use an intermediate "probe_config" structure. aic7xxx.c: Complete core work to support 39bit addresses for bulk data dma operations. Controller data structures still must reside under the 4GB boundary to reduce code/data size in the sequencer and related data structures. This has been tested under Linux IA64 and will be tested on IA64 for FreeBSD as soon as our port can run there. Add bus dmamap synchronization calls around manipulation of all controller/kernel shared host data structures. Implement data pointer reinitialation for a second data phase in a single connection in the kernel rather than bloat the sequencer. This is an extremely rare operation (does it ever happen?) and the sequencer implementation was flawed for some of the newest chips. Don't ever allow our target role to initiate a PPR. This is forbidden by the SCSI spec. Add a few missing endian conversions in the ignore wide pointers code. The core has been tested on the PPC under Linux and should work for FreeBSD PPC. As soon as I can test the OSM layer for FreeBSD PPC, I will. Move some of ahc_softc_init() into ahc_alloc() now that the probe_config structure is gone. Add a 4GB boundary condition on all of our dma tags. 32bit DAC under PCI only works on a single 4GB "page". Although we can cross 4GB on a true 64bit bus, the card won't always be installed in one and we can save code space and cost in implementing high address support by assuming the high DWORD address will never change. Add diagnostics to ahc_search_qinfifo(). Correct a target mode issue with bus resets. To avoid an interrupt storm from a malicious third party holding the reset line, the sequencer would defer re-enabling the reset interrupt until either a select-out or select-in. Unfortunately, the select-in enable bit is cleared by a bus reset, so a second reset will render the card deaf to an initiator's attempts to contact it. We now re-enable bus reset interrupts immediately if the target role is enabled. aic7xxx.h: Remove struct ahc_probe_config. SCB's now contain a pointer to the sg_map_node so we can perfrom bus dma sync operations on the SG list prior to queuing a command. aic7xxx.reg: Register the Perforce ID for this file with the VERSION keyword so it is printed in generated files. Add the DSCOMMAND1 register which is used to access the high DWORD of address bits. Add the data pointer reinitialize sequencer interrupt code. aic7xxx.seq: Register the Perforce ID for this file with the VERSION keyword so it is printed in generated files. Remove code to re-enable the bus reset interrupt after a select-in. In target mode we cannot defer this operation as ENSELI is cleared by a bus reset. Complete 39bit support. Generate a sequencer inteerrupt rather than handle the data pointers re-initialitation in the sequencer. Inline the "seen identify" assertion to save a few cycles. Short circuit the update of our residual data if we have fully completed a transfer. The residual is correct from our last S/G load operation. Short circuit full SDPTR processing if the residual is 0. Just mark the transfer as complete. aic7xxx_93cx6.c: Synchronize perforce IDs. aic7xxx_freebsd.c: Complete untested 39bit support. Add missing endia conversions. Clear our residuals prior to starting a command. The update residual code in the core only sets the residual if there is one. aic7xxx_freebsd.h: Modeify ahc_dmamap_sync() macros to take an offset and a length. This is how sync operations are performed in NetBSD, and we should update our bus dma implementation to match. aic7xxx_inline.h: Add data structure synchronization helper functions. Fix a bug in ahc_intr() where we would not clear our unsolicited interrupt counter after running our PCI interrupt handler. This may have been the cause of the spurious PCI interrupt messages. aic7xxx_pci.c: Adjust for loss of probe_config structure. Guard against bogus 9005 subdevice information as seen on some IBM MB configurations. Add 39bit address support. MFC after: 10 days
2001-07-18 21:39:48 +00:00
mask PDATA_REINIT 0x50|SEQINT /*
* Returned to data phase
* that requires data
* transfer pointers to be
* recalculated from the
* transfer residual.
*/
aic7xxx.c: Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
mask HOST_MSG_LOOP 0x60|SEQINT /*
Revamp the way that exceptional message handling is performed so that it is more robust and common code can be used for both the target and iniator roles. The mechanism for tracking negotiation state has also been simplified. Add support for sync/wide negotiation in target mode and fix many of the target mode bugs running at higher speeds uncovered. Make a first stab at getting all of the bus skew delays correct. Sync+Wide dataout transfers still cause problems, but this may be an initiator problem. Ensure that we exit BITBUCKET mode if the controller is restarted. Add support for target mode only firmware downloads. This has been tested on the aic7880, but should mean that we can perform target mode on any aic7xxx controller. Mixed mode (initiator and target roles in the same firmware load) is currently only supported on the aic7890, but with optimization, may fit on chips with less instruction space.
1998-12-10 04:14:50 +00:00
* The bus is ready for the
* host to perform another
* message transaction. This
* mechanism is used for things
* like sync/wide negotiation
* that require a kernel based
* message state engine.
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
*/
aic7xxx.c: Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
mask BAD_STATUS 0x70|SEQINT /* Bad status from target */
mask PERR_DETECTED 0x80|SEQINT /*
Kill the "unpause_always" argument to unpause_sequencer(). The reasons for optimizing the unpause operation no-longer exist, and this is much safer. When restarting the sequencer, reconstitute the free SCB list on the card. This deals with a single instruction gap between marking the SCB as free and actually getting it onto the free list. Reduce the number of transfer negotiations that occur. In the past, we renegotiated after every reported check condition status. This ensures that we catch devices that have unexpectidly reset. In this situation, the target will always report the check condition before performing a data-phase. The new behavior is to renegotiate for any check-condition where the residual matches the orginal data-length of the command (including 0 length transffers). This avoids renegotiations during things like variable tape block reads, where the check condition is reported only to indicate the residual of the read. Revamp the parity error detection logic. We now properly report and handle injected parity errors in all phases. The old code used to hang on message-in parity errors. Correct the reporting of selection timeout errors to the XPT. When a selection timeout occurs, only the currently selecting command is flagged with SELTO status instead of aborting all currently active commands to that target. Fix flipped arguments in ahc_match_scb and in some of the callers of this routine. I wish that gcc allowed you to request warnings for enums passed as ints. Make ahc_find_msg generically handle all message types. Work around the target mode data-in wideodd bug in all non-U2 chips. We can now do sync-wide target mode transfers in target mode across the hole product line. Use lastphase exclusively for handling timeouts. The current phase doesn't take the bus free state into account. Fix a bug in the timeout handler that could cause corruption of the disconnected list. When sending an embedded cdb to a target, ensure that we start on a quad word boundary in the data-fifo. It seems that unaligned stores do not work correctly.
2000-02-09 21:25:00 +00:00
* Either the phase_lock
* or inb_next routine has
* noticed a parity error.
*/
aic7xxx.c: Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
mask DATA_OVERRUN 0x90|SEQINT /*
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
* Target attempted to write
* beyond the bounds of its
* command.
*/
aic7xxx.c: When restarting the sequencer, ensure that the SCBCNT register is 0. A non-zero count will prevent the setting of the CCSCBDIR bit in any future dma operations. The only time CCSCBCNT would be non-zero is if we happened to halt the dma during a reset, but even that should never happen. Better safe than sorry. When a command completes before the target responds to an ATN for a recovery command, we now notify the kernel so that any recovery operation requeued in the qinfifo can be removed safely. In the past, we did this in ahc_done(), but ahc_done() may be called without the card paused. This also avoids a recursive call to ahc_search_qinifo() which could have occurred if ahc_search_qinififo() happened to be the routine to complete a recovery action. Fix 8bit math used for adjusting the qinfifo. The index must be wrapped properly within the 256 entry array. We rely on the fact that qinfifonext is a uint8_t in most cases to handle this wrap, but we missed a few spots where the resultant calculation was promoted to an int. Change the way that we deal with aborting the first or second entry from the qinfifo. We now swap the first entry in the qinfifo with the "next queued scb" to force the sequencer to see an abort collision if we ever touch the qinififo while the sequencer is mid SCB dma. aic7xxx.reg: Add new MKMSG_FAILED sequencer interrupt. This displaced the BOGUS_TAG interrupt used in some previous sequencer code debugging. aic7xxx.seq: Increment our position in the qinfifo only once the dma is complete and we have verified that the queue has not been changed during our DMA. This simplifies code in the kernel. Protect against "instruction creep" when issuing a pausing sequencer interrupt. On at least the 7890/91/96/97, the sequencer will coast after issuing the interrupt for up to two instructions. In the past we delt with this by using carefully placed nops. Now we call a routine to issue the interrupt followed by a nop and a ret. Tell the kernel should an SCB complete with the MK_MESSAGE flag still set. This means the target ignored our ATN request. Clear the channel twice as we exit the data phase. On the aic7890/91, the S/G preload logic may require the second clearing to get the last S/G out of the FIFO. aic7xxx_freebsd.c: Don't bother searching the qinfifo for a doubly queued recovery scb in ahc_done. This case is handled by the core driver now. Free the path used to issue async callbacks after the callback is complete. aic7xxx_inline.h: Split the SCB queue routine into a routine that swaps the SCB with the "next queued SCB" and a routine that calls the swapping routine and notifies the card of the new SCB. The swapping routine is now also used by ahc_search_qinfifo.
2000-11-06 20:05:38 +00:00
mask MKMSG_FAILED 0xa0|SEQINT /*
* Target completed command
* without honoring our ATN
* request to issue a message.
aic7xxx.c: Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
*/
Sync Perforce IDs, add tranceiver state change support, and correct numerous error recovery buglets. Many thanks to Tor Egge for his assistance in diagnosing problems with the error recovery code. aic7xxx.c: Report missed bus free events using their own sequencer interrupt code to avoid confusion with other "bad phase" interrupts. Remove a delay used in debugging. This delay could only be hit in certain, very extreme, error recovery scenarios. Handle transceiver state changes correctly. You can now plug an SE device into a hot-plug LVD bus without hanging the controller. When stepping through a critical section, panic if we step more than a reasonable number of times. After a bus reset, disable bus reset interupts until we either our first attempt to (re)select another device, or another device attemps to select us. This removes the need to busy wait in kernel for the scsi reset line to fall yet still ensures we see any reset events that impact the state of either our initiator or target roles. Before this change, we had the potential of servicing a "storm" of reset interrupts if the reset line was held for a significant amount of time. Indicate the current sequencer address whenever we dump the card's state. aic7xxx.reg: Transceiver state change register definitions. Add the missed bussfree sequencer interrupt code. Re-enable the scsi reset interrupt if it has been disabled before every attempt to (re)select a device and when we have been selected as a target. When being (re)selected, check to see if the selection dissappeared just after we enabled our bus free interrupt. If the bus has gone free again, go back to the idle loop and wait for another selection. Note two locations where we should change our behavior if ATN is still raised. If ATN is raised during the presentation of a command complete or disconnect message, we should ignore the message and expect the target to put us in msgout phase. We don't currently do this as it requires some code re-arrangement so that critical sections can be properly placed around our handling of these two events. Otherwise, we cannot guarantee that the check of ATN is atomic relative to our acking of the message in byte (the kernel could assert ATN). Only set the IDENTIFY_SEEN flag after we have settled on the SCB for this transaction. The kernel looks at this flag before assuming that SCB_TAG is valid. This avoids confusion during certain types of error recovery. Add a critical section around findSCB. We cannot allow the kernel to remove an entry from the disconnected list while we are traversing it. Ditto for get_free_or_disc_scb. aic7xxx_freebsd.c: Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is set in SEQ_FLAGS. Fix a typo that caused us to execute some code for the non-SCB paging case when paging SCBs. This only occurred during error recovery.
2000-11-10 20:13:41 +00:00
mask MISSED_BUSFREE 0xb0|SEQINT /*
* The sequencer never saw
* the bus go free after
* either a command complete
* or disconnect message.
aic7xxx.c: Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
*/
mask SCB_MISMATCH 0xc0|SEQINT /*
* Downloaded SCB's tag does
* not match the entry we
* intended to download.
*/
ahc_eisa.c: Initialize rid to 0. This doesn't seem to make any difference (the driver doesn't care what rid it gets and no-one seems to check rid's value), but follows standard conventions. Pass in our device_t to ahc_alloc(). We now use device_T softc storage, so passing NULL results in a panic. Set the unit number in our softc so that the driver core can retrieve it. ahc_pci.c: Set the unit number in our softc so that the driver core can retrieve it. aic7770.c: Insert our softc into the list of softcs when initialization is successful. aic7xxx.c: Remove a workaround for an aic7895 bug we will never trigger. Add additional diagnostic info to ahc_dump_card_state(). Always panic the system if a sequencer assertion fails. AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. Replace a hard coded number with a constant. Guard against looping forever in ahc_pause_and_flushwork(). A hot eject or card failure may make the intstat register return 0xFF, so limit the number of interrupts we'll process. Correct the code in ahc_search_qinfifo() that guarantees that the sequencer will see an abort collision if the qinfifo is modified when a DMA is in progress. We now do this fixup after modifying the queue. This guarantees that the HSCB we place at the head of the queue is not the same as the old head. Using "next hscb" (guaranteed not to be the same as the first SCB) before clearing the queue could free up the original head hscb to be used during a remove operation placing it again at the head of the qinfifo. aic7xxx.h: Reduce the maximum number of outstanding commands to 253 from 254. To handle our output queue correctly on machines that only support 32bit stores, we must clear the array 4 bytes at a time. To avoid colliding with a DMA write from the sequencer, we must be sure that 4 slots are empty when we write to clear the queue. This reduces us to 253 SCBs: 1 that just completed and the known three additional empty slots in the queue that preceed it. Yahoo was able to force this race on one of their systems. Interrupts were disabled for such a time that the entire output queue was filled (254 entries complete without any processing), and our 32bit write to clear the status clobbered one entry. Add a feature tag for devices that are removable. aic7xxx.reg: Never use the sequencer interrupt value of 0xF0. We need to guanrantee that an INTSTAT value of 0xFF can only occur during card failure or a hot-eject. Align the busy targets table with the begining of scratch space. This seems to appease a chip bug in the aic7895. aic7xxx.seq: Be sure to disable select-out after a bus free event that occurs early in a selection. If we don't disable select-out, we will believe that it is enabled even though a new selection will never occur. Move the clearing of SELDI to just before a jump. This appeases another chip bug of the aic7895. Make the target mode command loop a bit more efficient. AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. Properly cleanup the last SCB we tested against should we fail to properly find an SCB for a reselection. Add some additional sequencer debugging code. aic7xxx_freebsd.c: Limit the driver to 253 outstanding commands per adapter. Guard against overflow in timeout handling. aic7xxx_inline.h: AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. aic7xxx_pci.c: Set the removable feature for the apa1480 cardbus and the 29160C Compact PCI card. Don't report high byte termination information for narrow cards. Use a PCI read rather than a questionable delay when fetching/setting termination settings.
2001-01-22 21:03:48 +00:00
mask NO_FREE_SCB 0xd0|SEQINT /*
aic7xxx.c: Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
* get_free_or_disc_scb failed.
*/
ahc_eisa.c: Initialize rid to 0. This doesn't seem to make any difference (the driver doesn't care what rid it gets and no-one seems to check rid's value), but follows standard conventions. Pass in our device_t to ahc_alloc(). We now use device_T softc storage, so passing NULL results in a panic. Set the unit number in our softc so that the driver core can retrieve it. ahc_pci.c: Set the unit number in our softc so that the driver core can retrieve it. aic7770.c: Insert our softc into the list of softcs when initialization is successful. aic7xxx.c: Remove a workaround for an aic7895 bug we will never trigger. Add additional diagnostic info to ahc_dump_card_state(). Always panic the system if a sequencer assertion fails. AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. Replace a hard coded number with a constant. Guard against looping forever in ahc_pause_and_flushwork(). A hot eject or card failure may make the intstat register return 0xFF, so limit the number of interrupts we'll process. Correct the code in ahc_search_qinfifo() that guarantees that the sequencer will see an abort collision if the qinfifo is modified when a DMA is in progress. We now do this fixup after modifying the queue. This guarantees that the HSCB we place at the head of the queue is not the same as the old head. Using "next hscb" (guaranteed not to be the same as the first SCB) before clearing the queue could free up the original head hscb to be used during a remove operation placing it again at the head of the qinfifo. aic7xxx.h: Reduce the maximum number of outstanding commands to 253 from 254. To handle our output queue correctly on machines that only support 32bit stores, we must clear the array 4 bytes at a time. To avoid colliding with a DMA write from the sequencer, we must be sure that 4 slots are empty when we write to clear the queue. This reduces us to 253 SCBs: 1 that just completed and the known three additional empty slots in the queue that preceed it. Yahoo was able to force this race on one of their systems. Interrupts were disabled for such a time that the entire output queue was filled (254 entries complete without any processing), and our 32bit write to clear the status clobbered one entry. Add a feature tag for devices that are removable. aic7xxx.reg: Never use the sequencer interrupt value of 0xF0. We need to guanrantee that an INTSTAT value of 0xFF can only occur during card failure or a hot-eject. Align the busy targets table with the begining of scratch space. This seems to appease a chip bug in the aic7895. aic7xxx.seq: Be sure to disable select-out after a bus free event that occurs early in a selection. If we don't disable select-out, we will believe that it is enabled even though a new selection will never occur. Move the clearing of SELDI to just before a jump. This appeases another chip bug of the aic7895. Make the target mode command loop a bit more efficient. AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. Properly cleanup the last SCB we tested against should we fail to properly find an SCB for a reselection. Add some additional sequencer debugging code. aic7xxx_freebsd.c: Limit the driver to 253 outstanding commands per adapter. Guard against overflow in timeout handling. aic7xxx_inline.h: AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. aic7xxx_pci.c: Set the removable feature for the apa1480 cardbus and the 29160C Compact PCI card. Don't report high byte termination information for narrow cards. Use a PCI read rather than a questionable delay when fetching/setting termination settings.
2001-01-22 21:03:48 +00:00
mask OUT_OF_RANGE 0xe0|SEQINT
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
mask SEQINT_MASK 0xf0|SEQINT /* SEQINT Status Codes */
mask INT_PEND (BRKADRINT|SEQINT|SCSIINT|CMDCMPLT)
}
/*
* Hard Error (p. 3-53)
* Reporting of catastrophic errors. You usually cannot recover from
* these without a full board reset.
*/
register ERROR {
address 0x092
access_mode RO
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CIOPARERR 0x80 /* Ultra2 only */
field PCIERRSTAT 0x40 /* PCI only */
field MPARERR 0x20 /* PCI only */
field DPARERR 0x10 /* PCI only */
field SQPARERR 0x08
field ILLOPCODE 0x04
field ILLSADDR 0x02
field ILLHADDR 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* Clear Interrupt Status (p. 3-52)
*/
register CLRINT {
address 0x092
access_mode WO
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CLRPARERR 0x10 /* PCI only */
field CLRBRKADRINT 0x08
field CLRSCSIINT 0x04
field CLRCMDINT 0x02
field CLRSEQINT 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
register DFCNTRL {
address 0x093
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field PRELOADEN 0x80 /* aic7890 only */
field WIDEODD 0x40
field SCSIEN 0x20
field SDMAEN 0x10
field SDMAENACK 0x10
field HDMAEN 0x08
field HDMAENACK 0x08
field DIRECTION 0x04
field FIFOFLUSH 0x02
field FIFORESET 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
register DFSTATUS {
address 0x094
access_mode RO
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field PRELOAD_AVAIL 0x80
field DFCACHETH 0x40
field FIFOQWDEMP 0x20
field MREQPEND 0x10
field HDONE 0x08
field DFTHRESH 0x04
field FIFOFULL 0x02
field FIFOEMP 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
Change the delivery mechanism for incoming target commands. We now use a 256 entry ring buffer of descriptersfor this purpose. This allows the use of a simple 8bit counter in the sequencer code for tracking start location. Entries in the ring buffer now contain a "cmd_valid" byte at their tail. As an entry is serviced, this byte is cleared by the kernel and set by the sequencer during its dma of a new entry. Since this byte is the last portion of the command touched during a dma, the kernel can use this byte to ensure the command it processes is completely valid. The new command format requires a fixed sized DMA from the controller to deliver which allowed for additional simplification of the sequencer code. The hack that required 1 SCB slot to be stolen for incoming command delivery notification is also gone.
1998-11-23 01:33:47 +00:00
register DFWADDR {
address 0x95
access_mode RW
}
register DFRADDR {
address 0x97
access_mode RW
}
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
register DFDAT {
address 0x099
access_mode RW
}
/*
* SCB Auto Increment (p. 3-59)
* Byte offset into the SCB Array and an optional bit to allow auto
* incrementing of the address during download and upload operations
*/
register SCBCNT {
address 0x09a
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field SCBAUTO 0x80
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
mask SCBCNT_MASK 0x1f
}
/*
* Queue In FIFO (p. 3-60)
* Input queue for queued SCBs (commands that the seqencer has yet to start)
*/
register QINFIFO {
address 0x09b
access_mode RW
}
/*
* Queue In Count (p. 3-60)
* Number of queued SCBs
*/
register QINCNT {
address 0x09c
access_mode RO
}
/*
* Queue Out FIFO (p. 3-61)
* Queue of SCBs that have completed and await the host
*/
register QOUTFIFO {
address 0x09d
access_mode WO
}
Update copyrights to Y2K. 93cx6.c: Make the SRAM dump output a little prettier. aic7xxx.c: Store all SG entries into our SG array in kernel space. This makes data-overrun and other error reporting more useful as we can dump all SG entries. In the past, we only stored the SG entries that the sequencer might need to access, which meant we skipped the first element that is embedded into the SCB. Add a table of chip strings and replace ugly switch statements with table lookups. Add a table with bus phase strings and message reponses to parity errors in those phases. Use the table to pretty print bus phase messages as well as collapse another switch statement. Fix a bug in target mode that could cause us to unpause the sequencer early in bus reset processing. Add the 80MHz/DT mode into our syncrate table. This rate is not yet used or enabled. Correct some comments, clean up some code... aic7xxx.h: Add U160 controller feature information. Add some more bit fields for various SEEPROM formats. aic7xxx.reg: Add U160 register and register bit definitions. aic7xxx.seq: Make phasemis state tracking more straight forward. This avoids the consumption of SINDEX which is a very useful register. For the U160 chips, you must use the 'mov' instruction to update DFCNTRL. Using 'or' to set the PRELOADED bit is completely ineffective. At the end of the command phase, wair for our ACK signal to de-assert before disabling the SCSI dma engine. For slow devices, this avoids clearing the ACK before the other end has had a chance to see it and lower REQ.
2000-01-07 23:08:20 +00:00
register CRCCONTROL1 {
address 0x09d
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CRCONSEEN 0x80
field CRCVALCHKEN 0x40
field CRCENDCHKEN 0x20
field CRCREQCHKEN 0x10
field TARGCRCENDEN 0x08
field TARGCRCCNTEN 0x04
Update copyrights to Y2K. 93cx6.c: Make the SRAM dump output a little prettier. aic7xxx.c: Store all SG entries into our SG array in kernel space. This makes data-overrun and other error reporting more useful as we can dump all SG entries. In the past, we only stored the SG entries that the sequencer might need to access, which meant we skipped the first element that is embedded into the SCB. Add a table of chip strings and replace ugly switch statements with table lookups. Add a table with bus phase strings and message reponses to parity errors in those phases. Use the table to pretty print bus phase messages as well as collapse another switch statement. Fix a bug in target mode that could cause us to unpause the sequencer early in bus reset processing. Add the 80MHz/DT mode into our syncrate table. This rate is not yet used or enabled. Correct some comments, clean up some code... aic7xxx.h: Add U160 controller feature information. Add some more bit fields for various SEEPROM formats. aic7xxx.reg: Add U160 register and register bit definitions. aic7xxx.seq: Make phasemis state tracking more straight forward. This avoids the consumption of SINDEX which is a very useful register. For the U160 chips, you must use the 'mov' instruction to update DFCNTRL. Using 'or' to set the PRELOADED bit is completely ineffective. At the end of the command phase, wair for our ACK signal to de-assert before disabling the SCSI dma engine. For slow devices, this avoids clearing the ACK before the other end has had a chance to see it and lower REQ.
2000-01-07 23:08:20 +00:00
}
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
* Queue Out Count (p. 3-61)
* Number of queued SCBs in the Out FIFO
*/
register QOUTCNT {
address 0x09e
access_mode RO
}
Update copyrights to Y2K. 93cx6.c: Make the SRAM dump output a little prettier. aic7xxx.c: Store all SG entries into our SG array in kernel space. This makes data-overrun and other error reporting more useful as we can dump all SG entries. In the past, we only stored the SG entries that the sequencer might need to access, which meant we skipped the first element that is embedded into the SCB. Add a table of chip strings and replace ugly switch statements with table lookups. Add a table with bus phase strings and message reponses to parity errors in those phases. Use the table to pretty print bus phase messages as well as collapse another switch statement. Fix a bug in target mode that could cause us to unpause the sequencer early in bus reset processing. Add the 80MHz/DT mode into our syncrate table. This rate is not yet used or enabled. Correct some comments, clean up some code... aic7xxx.h: Add U160 controller feature information. Add some more bit fields for various SEEPROM formats. aic7xxx.reg: Add U160 register and register bit definitions. aic7xxx.seq: Make phasemis state tracking more straight forward. This avoids the consumption of SINDEX which is a very useful register. For the U160 chips, you must use the 'mov' instruction to update DFCNTRL. Using 'or' to set the PRELOADED bit is completely ineffective. At the end of the command phase, wair for our ACK signal to de-assert before disabling the SCSI dma engine. For slow devices, this avoids clearing the ACK before the other end has had a chance to see it and lower REQ.
2000-01-07 23:08:20 +00:00
register SCSIPHASE {
address 0x09e
access_mode RO
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field STATUS_PHASE 0x20
field COMMAND_PHASE 0x10
field MSG_IN_PHASE 0x08
field MSG_OUT_PHASE 0x04
field DATA_IN_PHASE 0x02
field DATA_OUT_PHASE 0x01
ahc_eisa.c: ahc_pci.c: Prepare for making ahc a module by adding module dependency and version info. aic7770.c: Remove linux header ifdefs. The headers are handled differently in Linux where local includes (those using "'s instead of <>'s) are allowed. Don't map our interrupt until after we are fully setup to handle interrupts. Our interrupt line may be shared so an interrupt could occur at any time. aic7xxx.c: Remove linux header ifdefs. current->curr to avoid Linux's use of current as a #define for the current task on some architectures. Add a helper function, ahc_assert_atn(), for use in message phases we handle manually. This hides the fact that U160 chips with the expected phase matching disabled need to have SCSISIGO updated differently. if (ahc_check_residual(scb) != 0) ahc_calc_residual(scb); else ahc_set_residual(scb, 0); becomes: ahc_update_residual(scb); Modify scsi parity error (or CRC error) handling to reflect expected phase being disabled on U160 chips. Move SELTO handling above BUSFREE handling so we can use the new busfree interrupt behavior on U160 chips. In ahc_build_transfer_msg() filter the period and ppr_options prior to deciding whether a PPR message is required. ppr_options may be forced to zero which will effect our decision. Correct a long standing but latent bug in ahc_find_syncrate(). We could choose a DT only rate even though DT transfers were disabled. In the CAM environment this was unlikely as CAM filters our rate to a non-DT value if the device does not support such rates. When displaing controller characteristics, include the speed of the chip. This way we can modify the transfer speed based on optional features that are enabled/disabled in a particular application. Add support for switching from fully blown tagged queing to just using simple queue tags should the device reject an ordered tag. Remove per-target "current" disconnect and tag queuing enable flags. These should be per-device and are not referenced internally be the driver, so we let the OSM track this state if it needs to. Use SCSI-3 message terminology. aic7xxx.h: The real 7850 does not support Ultra modes, but there are several cards that use the generic 7850 PCI ID even though they are using an Ultra capable chip (7859/7860). We start out with the AHC_ULTRA feature set and then check the DEVSTATUS register to determine if the capability is really present. current -> curr ahc_calc_residual() is no longer static allowing it to be called from ahc_update_residual() in aic7xxx_inline.h. Update some serial eeprom definitions for the latest BIOS versions. aic7xxx.reg: Add a combined DATA_PHASE mask to the SCSIPHASE register definition to simplify some sequencer code. aic7xxx.seq: Take advantage of some performance features available only on the U160 chips. The auto-ack feature allows us to ack data-in phases up to the data-fifo size while the sequencer is still setting up the DMA engine. This greatly reduces read transfer latency and simplifies testing for transfer complete (check SCSIEN only). We also disable the expected phase feature, and enable the new bus free interrupt behavior, to avoid a few instructions. Re-arrange the Ultra2+ data phase handling to allow us to do more work in parallel with the data fifo flushing on a read. On an SDTR, ack the message immediately so the target can prepare the next phase or message byte in parallel with our work to honor the message. aic7xxx_93cx6.c: Remove linux header ifdefs. aic7xxx_freebsd.c: current -> curr Add a module event handler. Handle tag downgrades in our ahc_send_async() handler. We won't be able to downgrade to "basic queuing" until CAM is made aware of this queuing type. aic7xxx_freebsd.h: Include cleanups. Define offsetof if required. Correct a few comments. Update prototype of ahc_send_async(). aic7xxx_inline.h: Implement ahc_update_residual(). aic7xxx_pci.c: Remove linux header ifdefs. Correct a few product strings. Enable several U160 performance enhancing features. Modify Ultra capability determination so we will enable Ultra speeds on devices with a 7850 PCI id that happen to really be a 7859 or 7860. Don't map our interrupt until after we are fully setup to handle interrupts. Our interrupt line may be shared so an interrupt could occur at any time.
2001-05-15 19:41:12 +00:00
mask DATA_PHASE_MASK 0x03
Update copyrights to Y2K. 93cx6.c: Make the SRAM dump output a little prettier. aic7xxx.c: Store all SG entries into our SG array in kernel space. This makes data-overrun and other error reporting more useful as we can dump all SG entries. In the past, we only stored the SG entries that the sequencer might need to access, which meant we skipped the first element that is embedded into the SCB. Add a table of chip strings and replace ugly switch statements with table lookups. Add a table with bus phase strings and message reponses to parity errors in those phases. Use the table to pretty print bus phase messages as well as collapse another switch statement. Fix a bug in target mode that could cause us to unpause the sequencer early in bus reset processing. Add the 80MHz/DT mode into our syncrate table. This rate is not yet used or enabled. Correct some comments, clean up some code... aic7xxx.h: Add U160 controller feature information. Add some more bit fields for various SEEPROM formats. aic7xxx.reg: Add U160 register and register bit definitions. aic7xxx.seq: Make phasemis state tracking more straight forward. This avoids the consumption of SINDEX which is a very useful register. For the U160 chips, you must use the 'mov' instruction to update DFCNTRL. Using 'or' to set the PRELOADED bit is completely ineffective. At the end of the command phase, wair for our ACK signal to de-assert before disabling the SCSI dma engine. For slow devices, this avoids clearing the ACK before the other end has had a chance to see it and lower REQ.
2000-01-07 23:08:20 +00:00
}
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
/*
* Special Function
*/
register SFUNCT {
address 0x09f
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field ALT_MODE 0x80
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
}
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
* SCB Definition (p. 5-4)
*/
scb {
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
address 0x0a0
size 64
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
SCB_CDB_PTR {
size 4
alias SCB_RESIDUAL_DATACNT
alias SCB_CDB_STORE
}
SCB_RESIDUAL_SGPTR {
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
size 4
}
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
SCB_SCSI_STATUS {
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
size 1
}
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
SCB_TARGET_PHASES {
size 1
}
SCB_TARGET_DATA_DIR {
size 1
}
SCB_TARGET_ITAG {
size 1
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
SCB_DATAPTR {
size 4
}
SCB_DATACNT {
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
/*
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
* The last byte is really the high address bits for
* the data address.
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
*/
size 4
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field SG_LAST_SEG 0x80 /* In the fourth byte */
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
mask SG_HIGH_ADDR_BITS 0x7F /* In the fourth byte */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
SCB_SGPTR {
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
size 4
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field SG_RESID_VALID 0x04 /* In the first byte */
field SG_FULL_RESID 0x02 /* In the first byte */
field SG_LIST_NULL 0x01 /* In the first byte */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
Pull the correct file over to freefall.
2000-09-16 20:59:12 +00:00
SCB_CONTROL {
size 1
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field TARGET_SCB 0x80
Bring in many bugfixes and changes obtained from formal testing: aic7xxx.c: aic7xxx.h: aic7xxx.reg: aic7xxx.seq: Bring in the protocol violation handler from the U320 driver and replace the NO_IDENT sequencer interrupt code with the PROTO_VIOLATION code. Support for this code required the following changes: SEQ_FLAGS: IDENTIFY_SEEN -> NOT_IDENTIFIED Added NO_CDB_SENT SCB_CONTROL: TARGET_SCB == STATUS_RCVD for initiator mode scb->flags: Added SCB_TARGET_SCB since we cannot rely on TARGET_SCB as a target/initiator differentiator due to it being overloaded in initiator mode to indicate that status has been received. aic7xxx.seq: Move data fifo CLRCHN to mesgin_rdptrs which is a safer location for doing this operation. This also saves a sequencer instruction. aic7xxx.c: aic7xxx.h: Change ahc/ahd_upate_neg_request() to take a "negotiation type" enum that allows us to negotiate: o only if the goal and current parameters differ. o only if the goal is non-async o always - even if the negotiation will be for async. aic7xxx.seq: Reset the FIFO whenever a short CDB transfer occurs so that the FIFO contents do not corrupt a future CDB transfer retry. Add support for catching the various protocol violations handled by ahc_handle_protocol_violation. Reformat some comments. aic7xxx.c: aic7xxx.h: Just for safety, have the aic7xxx driver probe the stack depth. aic7xxx.c: aic7xxx.h: Save and restore stack contents during diagnostics. Some chip variants overwrite stale entries on a stack "pop". Don't use 0 to probe the stack depth. 0 is the typical value used to backfill the stack if entries are overwritten on a "pop". aic7xxx.h: Add a missing typedef. Collapse SCB flag entries so they are bit contiguous. Add AHD_ULTRA2_XFER_PERIOD for narrow fallback calculations aic7xxx.c: Don't panic (as a diagnostic to catch bugs) if we decided to force the renegotiation of async even if we believe we are already async. This should allow us to negotiate async instead of the full user goal rate during startup if bus resets are disabled. Add a space to the end of the ahc/ahd_print_devinfo routines so that it behaves as expected by the code that uses it. Only force a renegotiation on a selection timeout if the SCB was valid. Doing otherwise may be dangerous as the connection was not valid for an unknown reason. Add additional diagnostic output to ahc_dump_card_state(), and have it use the register pretty printing functions. Update ahc_reg_print() to handle a NULL cur_col. Add a newline to ahc_dump_card_state() output. Bring back "use_ppr". We need to use_ppr anytime doppr is true or we have non-zero protocol options. The later case was not handled in the recent removal of use_ppr. Move a comment and remove a useless clearing of use_ppr. Don't disable ENBUSFREE when single stepping on a DT capable controller. We cannot re-enable unexpected busfree detection, so we must clear BUSFREE on each step instead. Correct the lookup of the SCB ID in ahc_handle_proto_error. Remove a diagnostic printf. Remove unecessary restoration of the STACK for older chips. Approved by: re (blanket)
2002-11-30 19:30:09 +00:00
field STATUS_RCVD 0x80
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field DISCENB 0x40
field TAG_ENB 0x20
field MK_MESSAGE 0x10
field ULTRAENB 0x08
field DISCONNECTED 0x04
Pull the correct file over to freefall.
2000-09-16 20:59:12 +00:00
mask SCB_TAG_TYPE 0x03
}
SCB_SCSIID {
size 1
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field TWIN_CHNLB 0x80
Pull the correct file over to freefall.
2000-09-16 20:59:12 +00:00
mask TWIN_TID 0x70
mask TID 0xf0
mask OID 0x0f
}
SCB_LUN {
Correct/Simplify ignore wide residue message handling aic7xxx.c: In ahc_handle_ign_wide_residue(): o Use SCB_XFERLEN_ODD SCB field to determine transfer "oddness" rather than the DATA_COUNT_ODD logic. SCB_XFERLEN_ODD is toggled on every ignore wide residue message so that multiple ignore wide residue messages for the same transaction are properly supported. o If the sg list has been exausted, the sequencer doesn't bother to update the residual data count since it is known to be zero. Perform the zeroing manually before calculating the remaining data count. o Ensure that SG_LIST_NULL is cleared in the residual sg pointer for "mid-transfer" ignore wide residue cases. o Use multibyte in/out macros instead of shifting/masking by hand. aic7xxx.h: Modify the SCB_GET_LUN() macro to mask the lun hardware SCB field with LID. This leaves two bits in the LUN field that can be used for other purposes. aic7xxx.reg: Change LID to be 0x3F. This is the maximum supported lun size for non-packetized SCSI. Map the top bit of the lun to SCB_XFERLEN_ODD. The host must set this bit whenever a transfer is an odd length. Remove the ODD_SEG bit field that was used to carry the odd transfer length information through the SG cache. This is obviated by SCB_XFERLEN_ODD field. Remove the DATA_COUNT_ODD scratch ram byte that was used dynamicaly compute data transfer oddness. This is obviated by SCB_XFERLEN_ODD field. aic7xxx.seq: Be more careful in our handling of the SCB_LUN field. It must be masked with LID if only lun information is desired. Remove all updates to the DATA_COUNT_ODD scratch ram field. Remove all uses of ODD_SEG. These two save quite a few sequencer instructions. Use SCB_XFERLEN_ODD to validate the end of transfer ignore wide residue message case. aic7xxx_inline.h: In ahc_queue_scb(), setup the SCB_XFERLEN_ODD field. Approved by: RE
2003-05-26 21:24:01 +00:00
field SCB_XFERLEN_ODD 0x80
mask LID 0x3f
Pull the correct file over to freefall.
2000-09-16 20:59:12 +00:00
size 1
}
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
SCB_TAG {
size 1
}
Pull the correct file over to freefall.
2000-09-16 20:59:12 +00:00
SCB_CDB_LEN {
size 1
}
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
SCB_SCSIRATE {
size 1
}
SCB_SCSIOFFSET {
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
size 1
}
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
SCB_NEXT {
size 1
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
}
Pull the correct file over to freefall.
2000-09-16 20:59:12 +00:00
SCB_64_SPARE {
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
size 16
}
Pull the correct file over to freefall.
2000-09-16 20:59:12 +00:00
SCB_64_BTT {
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
size 16
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
}
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
Pull the correct file over to freefall.
2000-09-16 20:59:12 +00:00
const SCB_UPLOAD_SIZE 32
const SCB_DOWNLOAD_SIZE 32
const SCB_DOWNLOAD_SIZE_64 48
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
const SG_SIZEOF 0x08 /* sizeof(struct ahc_dma) */
/* --------------------- AHA-2840-only definitions -------------------- */
register SEECTL_2840 {
address 0x0c0
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CS_2840 0x04
field CK_2840 0x02
field DO_2840 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
register STATUS_2840 {
address 0x0c1
access_mode RW
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field EEPROM_TF 0x80
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
mask BIOS_SEL 0x60
mask ADSEL 0x1e
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field DI_2840 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/* --------------------- AIC-7870-only definitions -------------------- */
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
register CCHADDR {
address 0x0E0
size 8
}
register CCHCNT {
address 0x0E8
}
register CCSGRAM {
address 0x0E9
}
register CCSGADDR {
address 0x0EA
}
register CCSGCTL {
address 0x0EB
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CCSGDONE 0x80
field CCSGEN 0x08
field SG_FETCH_NEEDED 0x02 /* Bit used for software state */
field CCSGRESET 0x01
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
}
register CCSCBCNT {
address 0xEF
}
register CCSCBCTL {
address 0x0EE
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CCSCBDONE 0x80
field ARRDONE 0x40 /* SCB Array prefetch done */
field CCARREN 0x10
field CCSCBEN 0x08
field CCSCBDIR 0x04
field CCSCBRESET 0x01
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
}
register CCSCBADDR {
address 0x0ED
}
register CCSCBRAM {
address 0xEC
}
/*
* SCB bank address (7895/7896/97 only)
*/
register SCBBADDR {
address 0x0F0
access_mode RW
}
register CCSCBPTR {
address 0x0F1
}
register HNSCB_QOFF {
address 0x0F4
}
register SNSCB_QOFF {
address 0x0F6
}
register SDSCB_QOFF {
address 0x0F8
}
register QOFF_CTLSTA {
address 0x0FA
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field SCB_AVAIL 0x40
field SNSCB_ROLLOVER 0x20
field SDSCB_ROLLOVER 0x10
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
mask SCB_QSIZE 0x07
mask SCB_QSIZE_256 0x06
}
register DFF_THRSH {
address 0x0FB
mask WR_DFTHRSH 0x70
mask RD_DFTHRSH 0x07
mask RD_DFTHRSH_MIN 0x00
mask RD_DFTHRSH_25 0x01
mask RD_DFTHRSH_50 0x02
mask RD_DFTHRSH_63 0x03
mask RD_DFTHRSH_75 0x04
mask RD_DFTHRSH_85 0x05
mask RD_DFTHRSH_90 0x06
mask RD_DFTHRSH_MAX 0x07
mask WR_DFTHRSH_MIN 0x00
mask WR_DFTHRSH_25 0x10
mask WR_DFTHRSH_50 0x20
mask WR_DFTHRSH_63 0x30
mask WR_DFTHRSH_75 0x40
mask WR_DFTHRSH_85 0x50
mask WR_DFTHRSH_90 0x60
mask WR_DFTHRSH_MAX 0x70
}
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
register SG_CACHE_PRE {
access_mode WO
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
address 0x0fc
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
mask SG_ADDR_MASK 0xf8
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field LAST_SEG 0x02
field LAST_SEG_DONE 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
register SG_CACHE_SHADOW {
access_mode RO
address 0x0fc
mask SG_ADDR_MASK 0xf8
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field LAST_SEG 0x02
field LAST_SEG_DONE 0x01
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
}
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/* ---------------------- Scratch RAM Offsets ------------------------- */
/* These offsets are either to values that are initialized by the board's
* BIOS or are specified by the sequencer code.
*
* The host adapter card (at least the BIOS) uses 20-2f for SCSI
* device information, 32-33 and 5a-5f as well. As it turns out, the
* BIOS trashes 20-2f, writing the synchronous negotiation results
* on top of the BIOS values, so we re-use those for our per-target
* scratchspace (actually a value that can be copied directly into
* SCSIRATE). The kernel driver will enable synchronous negotiation
* for all targets that have a value other than 0 in the lower four
* bits of the target scratch space. This should work regardless of
* whether the bios has been installed.
*/
scratch_ram {
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
address 0x020
size 58
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
* 1 byte per target starting at this address for configuration values
*/
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
BUSY_TARGETS {
ahc_eisa.c: Initialize rid to 0. This doesn't seem to make any difference (the driver doesn't care what rid it gets and no-one seems to check rid's value), but follows standard conventions. Pass in our device_t to ahc_alloc(). We now use device_T softc storage, so passing NULL results in a panic. Set the unit number in our softc so that the driver core can retrieve it. ahc_pci.c: Set the unit number in our softc so that the driver core can retrieve it. aic7770.c: Insert our softc into the list of softcs when initialization is successful. aic7xxx.c: Remove a workaround for an aic7895 bug we will never trigger. Add additional diagnostic info to ahc_dump_card_state(). Always panic the system if a sequencer assertion fails. AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. Replace a hard coded number with a constant. Guard against looping forever in ahc_pause_and_flushwork(). A hot eject or card failure may make the intstat register return 0xFF, so limit the number of interrupts we'll process. Correct the code in ahc_search_qinfifo() that guarantees that the sequencer will see an abort collision if the qinfifo is modified when a DMA is in progress. We now do this fixup after modifying the queue. This guarantees that the HSCB we place at the head of the queue is not the same as the old head. Using "next hscb" (guaranteed not to be the same as the first SCB) before clearing the queue could free up the original head hscb to be used during a remove operation placing it again at the head of the qinfifo. aic7xxx.h: Reduce the maximum number of outstanding commands to 253 from 254. To handle our output queue correctly on machines that only support 32bit stores, we must clear the array 4 bytes at a time. To avoid colliding with a DMA write from the sequencer, we must be sure that 4 slots are empty when we write to clear the queue. This reduces us to 253 SCBs: 1 that just completed and the known three additional empty slots in the queue that preceed it. Yahoo was able to force this race on one of their systems. Interrupts were disabled for such a time that the entire output queue was filled (254 entries complete without any processing), and our 32bit write to clear the status clobbered one entry. Add a feature tag for devices that are removable. aic7xxx.reg: Never use the sequencer interrupt value of 0xF0. We need to guanrantee that an INTSTAT value of 0xFF can only occur during card failure or a hot-eject. Align the busy targets table with the begining of scratch space. This seems to appease a chip bug in the aic7895. aic7xxx.seq: Be sure to disable select-out after a bus free event that occurs early in a selection. If we don't disable select-out, we will believe that it is enabled even though a new selection will never occur. Move the clearing of SELDI to just before a jump. This appeases another chip bug of the aic7895. Make the target mode command loop a bit more efficient. AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. Properly cleanup the last SCB we tested against should we fail to properly find an SCB for a reselection. Add some additional sequencer debugging code. aic7xxx_freebsd.c: Limit the driver to 253 outstanding commands per adapter. Guard against overflow in timeout handling. aic7xxx_inline.h: AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. aic7xxx_pci.c: Set the removable feature for the apa1480 cardbus and the 29160C Compact PCI card. Don't report high byte termination information for narrow cards. Use a PCI read rather than a questionable delay when fetching/setting termination settings.
2001-01-22 21:03:48 +00:00
alias TARG_SCSIRATE
size 16
aic7xxx.c: Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
}
/*
* Bit vector of targets that have ULTRA enabled as set by
* the BIOS. The Sequencer relies on a per-SCB field to
* control whether to enable Ultra transfers or not. During
* initialization, we read this field and reuse it for 2
* entries in the busy target table.
*/
ULTRA_ENB {
ahc_eisa.c: Initialize rid to 0. This doesn't seem to make any difference (the driver doesn't care what rid it gets and no-one seems to check rid's value), but follows standard conventions. Pass in our device_t to ahc_alloc(). We now use device_T softc storage, so passing NULL results in a panic. Set the unit number in our softc so that the driver core can retrieve it. ahc_pci.c: Set the unit number in our softc so that the driver core can retrieve it. aic7770.c: Insert our softc into the list of softcs when initialization is successful. aic7xxx.c: Remove a workaround for an aic7895 bug we will never trigger. Add additional diagnostic info to ahc_dump_card_state(). Always panic the system if a sequencer assertion fails. AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. Replace a hard coded number with a constant. Guard against looping forever in ahc_pause_and_flushwork(). A hot eject or card failure may make the intstat register return 0xFF, so limit the number of interrupts we'll process. Correct the code in ahc_search_qinfifo() that guarantees that the sequencer will see an abort collision if the qinfifo is modified when a DMA is in progress. We now do this fixup after modifying the queue. This guarantees that the HSCB we place at the head of the queue is not the same as the old head. Using "next hscb" (guaranteed not to be the same as the first SCB) before clearing the queue could free up the original head hscb to be used during a remove operation placing it again at the head of the qinfifo. aic7xxx.h: Reduce the maximum number of outstanding commands to 253 from 254. To handle our output queue correctly on machines that only support 32bit stores, we must clear the array 4 bytes at a time. To avoid colliding with a DMA write from the sequencer, we must be sure that 4 slots are empty when we write to clear the queue. This reduces us to 253 SCBs: 1 that just completed and the known three additional empty slots in the queue that preceed it. Yahoo was able to force this race on one of their systems. Interrupts were disabled for such a time that the entire output queue was filled (254 entries complete without any processing), and our 32bit write to clear the status clobbered one entry. Add a feature tag for devices that are removable. aic7xxx.reg: Never use the sequencer interrupt value of 0xF0. We need to guanrantee that an INTSTAT value of 0xFF can only occur during card failure or a hot-eject. Align the busy targets table with the begining of scratch space. This seems to appease a chip bug in the aic7895. aic7xxx.seq: Be sure to disable select-out after a bus free event that occurs early in a selection. If we don't disable select-out, we will believe that it is enabled even though a new selection will never occur. Move the clearing of SELDI to just before a jump. This appeases another chip bug of the aic7895. Make the target mode command loop a bit more efficient. AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. Properly cleanup the last SCB we tested against should we fail to properly find an SCB for a reselection. Add some additional sequencer debugging code. aic7xxx_freebsd.c: Limit the driver to 253 outstanding commands per adapter. Guard against overflow in timeout handling. aic7xxx_inline.h: AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. aic7xxx_pci.c: Set the removable feature for the apa1480 cardbus and the 29160C Compact PCI card. Don't report high byte termination information for narrow cards. Use a PCI read rather than a questionable delay when fetching/setting termination settings.
2001-01-22 21:03:48 +00:00
alias CMDSIZE_TABLE
aic7xxx.c: Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
size 2
}
/*
* Bit vector of targets that have disconnection disabled as set by
* the BIOS. The Sequencer relies in a per-SCB field to control the
* disconnect priveldge. During initialization, we read this field
* and reuse it for 2 entries in the busy target table.
*/
DISC_DSB {
size 2
}
ahc_eisa.c: Initialize rid to 0. This doesn't seem to make any difference (the driver doesn't care what rid it gets and no-one seems to check rid's value), but follows standard conventions. Pass in our device_t to ahc_alloc(). We now use device_T softc storage, so passing NULL results in a panic. Set the unit number in our softc so that the driver core can retrieve it. ahc_pci.c: Set the unit number in our softc so that the driver core can retrieve it. aic7770.c: Insert our softc into the list of softcs when initialization is successful. aic7xxx.c: Remove a workaround for an aic7895 bug we will never trigger. Add additional diagnostic info to ahc_dump_card_state(). Always panic the system if a sequencer assertion fails. AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. Replace a hard coded number with a constant. Guard against looping forever in ahc_pause_and_flushwork(). A hot eject or card failure may make the intstat register return 0xFF, so limit the number of interrupts we'll process. Correct the code in ahc_search_qinfifo() that guarantees that the sequencer will see an abort collision if the qinfifo is modified when a DMA is in progress. We now do this fixup after modifying the queue. This guarantees that the HSCB we place at the head of the queue is not the same as the old head. Using "next hscb" (guaranteed not to be the same as the first SCB) before clearing the queue could free up the original head hscb to be used during a remove operation placing it again at the head of the qinfifo. aic7xxx.h: Reduce the maximum number of outstanding commands to 253 from 254. To handle our output queue correctly on machines that only support 32bit stores, we must clear the array 4 bytes at a time. To avoid colliding with a DMA write from the sequencer, we must be sure that 4 slots are empty when we write to clear the queue. This reduces us to 253 SCBs: 1 that just completed and the known three additional empty slots in the queue that preceed it. Yahoo was able to force this race on one of their systems. Interrupts were disabled for such a time that the entire output queue was filled (254 entries complete without any processing), and our 32bit write to clear the status clobbered one entry. Add a feature tag for devices that are removable. aic7xxx.reg: Never use the sequencer interrupt value of 0xF0. We need to guanrantee that an INTSTAT value of 0xFF can only occur during card failure or a hot-eject. Align the busy targets table with the begining of scratch space. This seems to appease a chip bug in the aic7895. aic7xxx.seq: Be sure to disable select-out after a bus free event that occurs early in a selection. If we don't disable select-out, we will believe that it is enabled even though a new selection will never occur. Move the clearing of SELDI to just before a jump. This appeases another chip bug of the aic7895. Make the target mode command loop a bit more efficient. AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. Properly cleanup the last SCB we tested against should we fail to properly find an SCB for a reselection. Add some additional sequencer debugging code. aic7xxx_freebsd.c: Limit the driver to 253 outstanding commands per adapter. Guard against overflow in timeout handling. aic7xxx_inline.h: AHC_SCB_BTT is a "flag" not a "feature". Check the right field in the softc. aic7xxx_pci.c: Set the removable feature for the apa1480 cardbus and the 29160C Compact PCI card. Don't report high byte termination information for narrow cards. Use a PCI read rather than a questionable delay when fetching/setting termination settings.
2001-01-22 21:03:48 +00:00
CMDSIZE_TABLE_TAIL {
aic7xxx.c: Filter incoming transfer negotiation requests to ensure they never exceed the settings specified by the user. In restart sequencer attempt to deal with a bug in the aic7895. If a third party reset occurs at just the right time, the stack register can lock up. When restarting the sequencer after handling the SCSI reset, poke SEQADDR1 before resting the sequencers program counter. When something strange happens, dump the card's transaction state via ahc_dump_card_state(). This should aid in debugging. Handle request sense transactions via the QINFIFO instead of attaching them to the waiting queue directly. The waiting queue consumes card SCB resources and, in the pathological case of every target on the bus beating our selection attemps and issuing a check condition, could have caused us to run out of SCBs. I have never seen this happen, and only early cards with 3 or 4 SCBs had any real chance of ever getting into this state. Add additional sequencer interrupt codes to support firmware diagnostics. The diagnostic code is enabled with the AHC_DEBUG_SEQUENCER kernel option. Make it possible to switch into and out of target mode on the fly. The card comes up by default as an initiator but will switch into target mode as soon as an enable lun operation is performed. As always, target mode behavior is gated by the AHC_TMODE_ENABLE kernel option so most users will not be affected by this change. In ahc_update_target_msg_request(), also issue a new request if the ppr_options have changed. Never issue a PPR as a target. It is forbidden by the spec. Correct a bug in ahc_parse_msg() that prevented us from responding to PPR messages as a target. Mark SCBs that are on the untagged queue with a flag instead of checking several fields in the SCB to see if the SCB should be on the queue. This makes it easier for things like automatic request sense requests to be queued without touching the untagged queues even though they are untagged requests. When dealing with ignore wide residue messages that occur in the middle of a transfer, reset HADDR, not SHADDR for non-ultra2 chips. Although SHADDR is where the firmware fetches the ending transfer address for a save data pointers request, it is readonly. Setting HADDR has the side effect of also updating SHADDR. Cleanup the output of ahc_dump_card_state() by nulling out the free scb list in the non-paging case. The free list is only used if we must page SCBs. Correct the transmission of cdbs > 12 bytes in length. When swapping HSCBs prior to notifing the sequencer of the new transaction, the bus address pointer for the cdb must also be recalculated to reflect its new location. We now defer the calculation of the cdb address until just before queing it to the card. When pulling transfer negotiation settings out of scratch ram, convert 5MHz/clock doubled settings to 10MHz. Add a new function ahc_qinfifo_requeue_tail() for use by error recovery actions and auto-request sense operations. These operations always occur when the sequencer is paused, so we can avoid the extra expense incurred in the normal SCB queue method. Use the BMOV instruction for all single byte moves on controllers that support it. The bmov instruction is twice as fast as an AND with an immediate of 0xFF as is used on older controllers. Correct a few bugs in ahc_dump_card_state(). If we have hardware assisted queue registers, use them to get the sequencer's idea of the head of the queue. When enumerating the untagged queue, it helps to use the correct index for the queue. aic7xxx.h: Indicate via a feature flag, which controllers can take on both the target and the initiator role at the same time. Add the AHC_SEQUENCER_DEBUG flag. Add the SCB_CDB32_PTR flag used for dealing with cdbs with lengths between 13 and 32 bytes. Add new prototypes. aic7xxx.reg: Allow the SCSIBUSL register to be written to. This is required to fix a selection timeout problem on the 7892/99. Cleanup the sequencer interrupt codes so that all debugging codes are grouped at the end of the list. Correct the definition of the ULTRA_ENB and DISC_DSB locations in scratch ram. This prevented the driver from properly honoring these settings when no serial eeprom was available. Remove an unused sequencer flag. aic7xxx.seq: Just before a potential select-out, clear the SCSIBUSL register. Occasionally, during a selection timeout, the contents of the register may be presented on the bus, causing much confusion. Add sequencer diagnostic code to detect software and or hardware bugs. The code attempts to verify most list operations so any corruption is caught before it occurs. We also track information about why a particular reconnection request was rejected. Don't clobber the digital REQ/ACK filter setting in SXFRCTL0 when clearing the channel. Fix a target mode bug that would cause us to return busy status instead of queue full in respnse to a tagged transaction. Cleanup the overrun case. It turns out that by simply butting the chip in bitbucket mode, it will ack any bytes until the phase changes. This drasticaly simplifies things. Prior to leaving the data phase, make sure that the S/G preload queue is empty. Remove code to place a request sense request on the waiting queue. This is all handled by the kernel now. Change the semantics of "findSCB". In the past, findSCB ensured that a freshly paged in SCB appeared on the disconnected list. The problem with this is that there is no guarantee that the paged in SCB is for a disconnected transation. We now defer any list manipulation to the caller who usually discards the SCB via the free list. Inline some busy target table operations. Add a critical section to protect adding an SCB to the disconnected list. aic7xxx_freebsd.c: Handle changes in the transfer negotiation setting API to filter incoming requests. No filtering is necessary for "goal" requests from the XPT. Set the SCB_CDB32_PTR flag when queing a transaction with a large cdb. In ahc_timeout, only take action if the active SCB is the timedout SCB. This deals with the case of two transactions to the same device with different timeout values. Use ahc_qinfifo_requeu_tail() instead of home grown version. aic7xxx_inline.h: Honor SCB_CDB32_PTR when queuing a new request. aic7xxx_pci.c: Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
size 4
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
/*
Convert the driver to use a single DMA for fetching new commands instead of two (one to access the circular input fifo, the other to get the SCB). This costs us a command slot so the driver can now only queue 254 simultaneous commands. Have the kernel driver honor critical sections in sequencer code. When prefetching S/G segments only pull a cacheline's worth but never less than two elements. This reduces the impact of the prefetch on the main data transfer when compared to the 128 byte fetches the driver used to do. Add "bootverbose" logging for transfer negotiations. Correct a bug in ahc_set_syncrate() that would prevent an update of the sync parameters if only the ppr_options had changed. Correct locking for calls to ahc_free_scb(). ahc_free_scb() is no longer protected internally to simplify ports to other platforms. Make sure we unfreeze our SIMQ if a resource shortage has occurred and an SCB is been freed. ahc_pci.c: Turn on cacheline streaming for all controllers that support it. Clarify diagnostic messages about PCI interrupts.
2000-10-05 04:24:14 +00:00
* Partial transfer past cacheline end to be
* transferred using an extra S/G.
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
*/
Convert the driver to use a single DMA for fetching new commands instead of two (one to access the circular input fifo, the other to get the SCB). This costs us a command slot so the driver can now only queue 254 simultaneous commands. Have the kernel driver honor critical sections in sequencer code. When prefetching S/G segments only pull a cacheline's worth but never less than two elements. This reduces the impact of the prefetch on the main data transfer when compared to the 128 byte fetches the driver used to do. Add "bootverbose" logging for transfer negotiations. Correct a bug in ahc_set_syncrate() that would prevent an update of the sync parameters if only the ppr_options had changed. Correct locking for calls to ahc_free_scb(). ahc_free_scb() is no longer protected internally to simplify ports to other platforms. Make sure we unfreeze our SIMQ if a resource shortage has occurred and an SCB is been freed. ahc_pci.c: Turn on cacheline streaming for all controllers that support it. Clarify diagnostic messages about PCI interrupts.
2000-10-05 04:24:14 +00:00
MWI_RESIDUAL {
size 1
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
alias TARG_IMMEDIATE_SCB
Convert the driver to use a single DMA for fetching new commands instead of two (one to access the circular input fifo, the other to get the SCB). This costs us a command slot so the driver can now only queue 254 simultaneous commands. Have the kernel driver honor critical sections in sequencer code. When prefetching S/G segments only pull a cacheline's worth but never less than two elements. This reduces the impact of the prefetch on the main data transfer when compared to the 128 byte fetches the driver used to do. Add "bootverbose" logging for transfer negotiations. Correct a bug in ahc_set_syncrate() that would prevent an update of the sync parameters if only the ppr_options had changed. Correct locking for calls to ahc_free_scb(). ahc_free_scb() is no longer protected internally to simplify ports to other platforms. Make sure we unfreeze our SIMQ if a resource shortage has occurred and an SCB is been freed. ahc_pci.c: Turn on cacheline streaming for all controllers that support it. Clarify diagnostic messages about PCI interrupts.
2000-10-05 04:24:14 +00:00
}
/*
* SCBID of the next SCB to be started by the controller.
*/
NEXT_QUEUED_SCB {
size 1
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
* Single byte buffer used to designate the type or message
* to send to a target.
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
*/
MSG_OUT {
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
size 1
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/* Parameters for DMA Logic */
DMAPARAMS {
size 1
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field PRELOADEN 0x80
field WIDEODD 0x40
field SCSIEN 0x20
field SDMAEN 0x10
field SDMAENACK 0x10
field HDMAEN 0x08
field HDMAENACK 0x08
field DIRECTION 0x04 /* Set indicates PCI->SCSI */
field FIFOFLUSH 0x02
field FIFORESET 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
SEQ_FLAGS {
size 1
Bring in many bugfixes and changes obtained from formal testing: aic7xxx.c: aic7xxx.h: aic7xxx.reg: aic7xxx.seq: Bring in the protocol violation handler from the U320 driver and replace the NO_IDENT sequencer interrupt code with the PROTO_VIOLATION code. Support for this code required the following changes: SEQ_FLAGS: IDENTIFY_SEEN -> NOT_IDENTIFIED Added NO_CDB_SENT SCB_CONTROL: TARGET_SCB == STATUS_RCVD for initiator mode scb->flags: Added SCB_TARGET_SCB since we cannot rely on TARGET_SCB as a target/initiator differentiator due to it being overloaded in initiator mode to indicate that status has been received. aic7xxx.seq: Move data fifo CLRCHN to mesgin_rdptrs which is a safer location for doing this operation. This also saves a sequencer instruction. aic7xxx.c: aic7xxx.h: Change ahc/ahd_upate_neg_request() to take a "negotiation type" enum that allows us to negotiate: o only if the goal and current parameters differ. o only if the goal is non-async o always - even if the negotiation will be for async. aic7xxx.seq: Reset the FIFO whenever a short CDB transfer occurs so that the FIFO contents do not corrupt a future CDB transfer retry. Add support for catching the various protocol violations handled by ahc_handle_protocol_violation. Reformat some comments. aic7xxx.c: aic7xxx.h: Just for safety, have the aic7xxx driver probe the stack depth. aic7xxx.c: aic7xxx.h: Save and restore stack contents during diagnostics. Some chip variants overwrite stale entries on a stack "pop". Don't use 0 to probe the stack depth. 0 is the typical value used to backfill the stack if entries are overwritten on a "pop". aic7xxx.h: Add a missing typedef. Collapse SCB flag entries so they are bit contiguous. Add AHD_ULTRA2_XFER_PERIOD for narrow fallback calculations aic7xxx.c: Don't panic (as a diagnostic to catch bugs) if we decided to force the renegotiation of async even if we believe we are already async. This should allow us to negotiate async instead of the full user goal rate during startup if bus resets are disabled. Add a space to the end of the ahc/ahd_print_devinfo routines so that it behaves as expected by the code that uses it. Only force a renegotiation on a selection timeout if the SCB was valid. Doing otherwise may be dangerous as the connection was not valid for an unknown reason. Add additional diagnostic output to ahc_dump_card_state(), and have it use the register pretty printing functions. Update ahc_reg_print() to handle a NULL cur_col. Add a newline to ahc_dump_card_state() output. Bring back "use_ppr". We need to use_ppr anytime doppr is true or we have non-zero protocol options. The later case was not handled in the recent removal of use_ppr. Move a comment and remove a useless clearing of use_ppr. Don't disable ENBUSFREE when single stepping on a DT capable controller. We cannot re-enable unexpected busfree detection, so we must clear BUSFREE on each step instead. Correct the lookup of the SCB ID in ahc_handle_proto_error. Remove a diagnostic printf. Remove unecessary restoration of the STACK for older chips. Approved by: re (blanket)
2002-11-30 19:30:09 +00:00
field NOT_IDENTIFIED 0x80
field NO_CDB_SENT 0x40
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field TARGET_CMD_IS_TAGGED 0x40
field DPHASE 0x20
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
/* Target flags */
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field TARG_CMD_PENDING 0x10
field CMDPHASE_PENDING 0x08
field DPHASE_PENDING 0x04
field SPHASE_PENDING 0x02
field NO_DISCONNECT 0x01
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* Temporary storage for the
* target/channel/lun of a
* reconnecting target
*/
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
SAVED_SCSIID {
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
size 1
}
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
SAVED_LUN {
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
size 1
}
/*
* The last bus phase as seen by the sequencer.
*/
LASTPHASE {
size 1
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CDI 0x80
field IOI 0x40
field MSGI 0x20
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
mask PHASE_MASK CDI|IOI|MSGI
mask P_DATAOUT 0x00
mask P_DATAIN IOI
mask P_COMMAND CDI
mask P_MESGOUT CDI|MSGI
mask P_STATUS CDI|IOI
mask P_MESGIN CDI|IOI|MSGI
mask P_BUSFREE 0x01
}
/*
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
* head of list of SCBs awaiting
* selection
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
*/
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
WAITING_SCBH {
size 1
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
/*
* head of list of SCBs that are
* disconnected. Used for SCB
* paging.
*/
DISCONNECTED_SCBH {
size 1
}
/*
* head of list of SCBs that are
* not in use. Used for SCB paging.
*/
FREE_SCBH {
size 1
}
aic7xxx.c: Style nits. Make sure that our selection hardware is disabled as soon as possible after detecting a busfree and even go so far as to disable the selection hardware in advance of an event that will cause a busfree (ABORT or BUS DEVICE RESET message). The concern is that the selection hardware will select a target for which, after processing the bus free, there will be no commands pending. The sequencer idle loop will re-enable the selection should it still be necessary. In ahc_handle_scsiint(), clear SSTAT0 events several PCI transactions (most notably reads) prior to clearing SCSIINT. The newer chips seem to take a bit of time to see the change which can make the clearing of SCSIINT ineffective. Don't bother panicing at the end of ahc_handle_scsiint(). Getting to the final else just means we lost the race with clearing SCSIINT. In ahc_free(), handle init-level 0. This can happen when we fail the attach for RAID devices. While I'm here, also kill the parent dma tag. In ahc_match_scb(), consider initiator ccbs to be any that are not from the target mode group. This fixes a bug where an external target reset CCB was not getting cleaned up by the reset code. Don't bother freezing a ccb in any of our "abort" routines when the status is set to CAM_REQ_CMP. This can happen for a target reset ccb. aic7xxx.reg: Reserve space for a completion queue. This will be used to enhance performance in the near future. aic7xxx.seq: Remove an optimization for the 7890 autoflush bug that turned out to allow, in rare cases, some data to get lost. Implement a simpler, faster, fix for the PCI_2_1 retry bug that hangs the sequencer on an SCB dma for certain chips. Test against SAVED_SCSIID rather than SELID during target reselections. This is how we always did it in the past, but the code was modified while trying to work around an issue with the 7895. SAVED_SCSIID takes into account twin channel adapters such as the 2742T, whereas SELID does not have the channel bit. This caused invalid selection warnings and other strangeness on these cards. aic7xxx_pci.c Use the correct mask for checking the generic aic7892 entry.
2001-02-10 18:04:27 +00:00
/*
* head of list of SCBs that have
* completed but have not been
* put into the qoutfifo.
*/
COMPLETE_SCBH {
size 1
}
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
/*
* Address of the hardware scb array in the host.
*/
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
HSCB_ADDR {
size 4
}
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
/*
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
* Base address of our shared data with the kernel driver in host
Convert the driver to use a single DMA for fetching new commands instead of two (one to access the circular input fifo, the other to get the SCB). This costs us a command slot so the driver can now only queue 254 simultaneous commands. Have the kernel driver honor critical sections in sequencer code. When prefetching S/G segments only pull a cacheline's worth but never less than two elements. This reduces the impact of the prefetch on the main data transfer when compared to the 128 byte fetches the driver used to do. Add "bootverbose" logging for transfer negotiations. Correct a bug in ahc_set_syncrate() that would prevent an update of the sync parameters if only the ppr_options had changed. Correct locking for calls to ahc_free_scb(). ahc_free_scb() is no longer protected internally to simplify ports to other platforms. Make sure we unfreeze our SIMQ if a resource shortage has occurred and an SCB is been freed. ahc_pci.c: Turn on cacheline streaming for all controllers that support it. Clarify diagnostic messages about PCI interrupts.
2000-10-05 04:24:14 +00:00
* memory. This includes the qoutfifo and target mode
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
* incoming command queue.
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
*/
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
SHARED_DATA_ADDR {
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
size 4
}
KERNEL_QINPOS {
size 1
}
QINPOS {
size 1
}
QOUTPOS {
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
size 1
}
Add a spin lock that prevents the sequencer from attempting to add an entry to the QOUTFIFO when it is full. This should eliminate the "Timed out while idle" problems that many have reported. In truth, this is somewhat of a hack. Although are interrupt latency is low enough that we should be able to always service the queue in time, since each entry must be passed up to the higher SCSI layer for what can be a large amount of processing (perhaps even resulting in a new command being queued) with interrupts disabled, we need this mechanism to avoid overflow. In the future, these additional tasks will be offloaded to a software interrupt handler which should make this hack unnecessary.
1997-08-13 17:02:47 +00:00
/*
Change the delivery mechanism for incoming target commands. We now use a 256 entry ring buffer of descriptersfor this purpose. This allows the use of a simple 8bit counter in the sequencer code for tracking start location. Entries in the ring buffer now contain a "cmd_valid" byte at their tail. As an entry is serviced, this byte is cleared by the kernel and set by the sequencer during its dma of a new entry. Since this byte is the last portion of the command touched during a dma, the kernel can use this byte to ensure the command it processes is completely valid. The new command format requires a fixed sized DMA from the controller to deliver which allowed for additional simplification of the sequencer code. The hack that required 1 SCB slot to be stolen for incoming command delivery notification is also gone.
1998-11-23 01:33:47 +00:00
* Kernel and sequencer offsets into the queue of
* incoming target mode command descriptors. The
Keep track of negotiated transfer parameters for each initiator<->target connection. Clean up support for devices featuring the multiple target SCSI ID feature. On aic7890/91/96/97 chips, we can now assume the target role on multiple target ids simultaneously. Although these chips also have sufficient instruction space to hold to support the initiator and target role at the same time, the initiator role is currently disabled as it will conflict (chip design restriction) with the multi-tid feature. I'll probably add a nob to enable the initiator (there-by disabling multi-tid) some time in the future. Return queue full or busy, depending on the tagged nature of the incoming request, if our command input queue fills up in host memeory. Deal with accept target I/O resource shortages. If we get an underrun on a transaction that wasn't supposed to transmit any data, don't attempt to print out the S/G list. The code would run until hitting a non-present page. (oops)
1999-03-05 23:35:48 +00:00
* queue is full when the KERNEL_TQINPOS == TQINPOS.
Add a spin lock that prevents the sequencer from attempting to add an entry to the QOUTFIFO when it is full. This should eliminate the "Timed out while idle" problems that many have reported. In truth, this is somewhat of a hack. Although are interrupt latency is low enough that we should be able to always service the queue in time, since each entry must be passed up to the higher SCSI layer for what can be a large amount of processing (perhaps even resulting in a new command being queued) with interrupts disabled, we need this mechanism to avoid overflow. In the future, these additional tasks will be offloaded to a software interrupt handler which should make this hack unnecessary.
1997-08-13 17:02:47 +00:00
*/
Change the delivery mechanism for incoming target commands. We now use a 256 entry ring buffer of descriptersfor this purpose. This allows the use of a simple 8bit counter in the sequencer code for tracking start location. Entries in the ring buffer now contain a "cmd_valid" byte at their tail. As an entry is serviced, this byte is cleared by the kernel and set by the sequencer during its dma of a new entry. Since this byte is the last portion of the command touched during a dma, the kernel can use this byte to ensure the command it processes is completely valid. The new command format requires a fixed sized DMA from the controller to deliver which allowed for additional simplification of the sequencer code. The hack that required 1 SCB slot to be stolen for incoming command delivery notification is also gone.
1998-11-23 01:33:47 +00:00
KERNEL_TQINPOS {
size 1
}
TQINPOS {
Add a spin lock that prevents the sequencer from attempting to add an entry to the QOUTFIFO when it is full. This should eliminate the "Timed out while idle" problems that many have reported. In truth, this is somewhat of a hack. Although are interrupt latency is low enough that we should be able to always service the queue in time, since each entry must be passed up to the higher SCSI layer for what can be a large amount of processing (perhaps even resulting in a new command being queued) with interrupts disabled, we need this mechanism to avoid overflow. In the future, these additional tasks will be offloaded to a software interrupt handler which should make this hack unnecessary.
1997-08-13 17:02:47 +00:00
size 1
}
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
ARG_1 {
size 1
Revamp the way that exceptional message handling is performed so that it is more robust and common code can be used for both the target and iniator roles. The mechanism for tracking negotiation state has also been simplified. Add support for sync/wide negotiation in target mode and fix many of the target mode bugs running at higher speeds uncovered. Make a first stab at getting all of the bus skew delays correct. Sync+Wide dataout transfers still cause problems, but this may be an initiator problem. Ensure that we exit BITBUCKET mode if the controller is restarted. Add support for target mode only firmware downloads. This has been tested on the aic7880, but should mean that we can perform target mode on any aic7xxx controller. Mixed mode (initiator and target roles in the same firmware load) is currently only supported on the aic7890, but with optimization, may fit on chips with less instruction space.
1998-12-10 04:14:50 +00:00
mask SEND_MSG 0x80
mask SEND_SENSE 0x40
mask SEND_REJ 0x20
mask MSGOUT_PHASEMIS 0x10
mask EXIT_MSG_LOOP 0x08
mask CONT_MSG_LOOP 0x04
mask CONT_TARG_SESSION 0x02
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
alias RETURN_1
}
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
ARG_2 {
size 1
alias RETURN_2
}
/*
* Snapshot of MSG_OUT taken after each message is sent.
*/
LAST_MSG {
size 1
}
Perform a save data pointers operation if a data transfer was performed in target mode, but we are not completing the command. Use a template of allowed bus arbitration phases to selectively and dynamically enable/disable initiator or target (re)selection. Properly handle timeouts for target role transactions - just go to the bus free state and report the error to the peripheral driver. Checkpoint support for the XPT_ABORT_CCB function code. This currently handles the accept tio and immediate notify ccb types, but does not handle the continue target I/O or SCSI I/O ccb types. This is enough to handle dynamic target enable/disable events. Clean up the SCSI reset code so that we perform at most 1 SCSI bus reset at initialization, the reset requested by the XPT layer.
1998-12-15 08:22:42 +00:00
/*
* Sequences the kernel driver has okayed for us. This allows
* the driver to do things like prevent initiator or target
* operations.
*/
SCSISEQ_TEMPLATE {
size 1
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field ENSELO 0x40
field ENSELI 0x20
field ENRSELI 0x10
field ENAUTOATNO 0x08
field ENAUTOATNI 0x04
field ENAUTOATNP 0x02
Perform a save data pointers operation if a data transfer was performed in target mode, but we are not completing the command. Use a template of allowed bus arbitration phases to selectively and dynamically enable/disable initiator or target (re)selection. Properly handle timeouts for target role transactions - just go to the bus free state and report the error to the peripheral driver. Checkpoint support for the XPT_ABORT_CCB function code. This currently handles the accept tio and immediate notify ccb types, but does not handle the continue target I/O or SCSI I/O ccb types. This is enough to handle dynamic target enable/disable events. Clean up the SCSI reset code so that we perform at most 1 SCSI bus reset at initialization, the reset requested by the XPT layer.
1998-12-15 08:22:42 +00:00
}
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
}
scratch_ram {
address 0x056
size 4
/*
* These scratch ram locations are initialized by the 274X BIOS.
* We reuse them after capturing the BIOS settings during
* initialization.
*/
Add support for routing initiator transactions to disabled luns to the black hole device. The controller will now only accept selections if the black hole device is present and some other target/lun is enabled for target mode. Handle the IGNORE WIDE RESIDUE message. This support has not been tested. Checkpoint work on handling ABORT, BUS DEVICE RESET, TERMINATE I/O PROCESS, and CLEAR QUEUE messages as a target. Fix a few problems with tagged command handling in target mode. Wait until the sync offset counter falls to 0 before changing phase after a data-in transfer completes as the DMA logic seems to indicate transfer complete as soon as our last REQ is issued. Simplify some of the target mode message handling code in the sequencer.
1999-01-14 06:14:15 +00:00
/*
* The initiator specified tag for this target mode transaction.
*/
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
HA_274_BIOSGLOBAL {
size 1
field HA_274_EXTENDED_TRANS 0x01
alias INITIATOR_TAG
Add support for routing initiator transactions to disabled luns to the black hole device. The controller will now only accept selections if the black hole device is present and some other target/lun is enabled for target mode. Handle the IGNORE WIDE RESIDUE message. This support has not been tested. Checkpoint work on handling ABORT, BUS DEVICE RESET, TERMINATE I/O PROCESS, and CLEAR QUEUE messages as a target. Fix a few problems with tagged command handling in target mode. Wait until the sync offset counter falls to 0 before changing phase after a data-in transfer completes as the DMA logic seems to indicate transfer complete as soon as our last REQ is issued. Simplify some of the target mode message handling code in the sequencer.
1999-01-14 06:14:15 +00:00
}
This is an MFC candidate. ahc_eisa.c: Change aic7770_map_int to take an additional irq parameter. Although we can get the irq from the eisa dev under FreeBSD, we can't do this under linux, so the OSM interface must supply this. ahc_pci.c: Move ahc_power_state_change() to the OSM. This allows us to use a platform supplied function that does the same thing. -current will move to the FreeBSD native API in the near future. aic7770.c: Sync up with core changes to support Linux EISA. We now store a 2 bit primary channel number rather than a bit flag that only allows b to be the primary channel. Adjust for this change. aic7xxx.c: Namespace and staticization cleanup. All exported symbols use an "ahc_" prefix to avoid collisions with other modules. Correct a logic bug that prevented us from dropping ATN during some exceptional conditions during message processing. Take advantage of a new flag managed by the sequencer that indicates if an SCB fetch is in progress. If so, the currently selected SCB needs to be returned to the free list to prevent an SCB leak. This leak is a rarity and would only occur if a bus reset or timeout resulting in a bus reset occurred in the middle of an SCB fetch. Don't attempt to perform ULTRA transfers on ultra capable adapters missing the external precision resistor required for ultra speeds. I've never encountered an adapter configured this way, but better safe than sorry. Handle the case of 5MHz user sync rate set as "0" instead of 0x1c in scratch ram. If we lookup a period of 0 in our table (async), clear the scsi offset. aic7xxx.h: Adjust for the primary channel being represented as a 2 bit integer in the flags member of the ahc softc. Cleanup the flags definitions so that comment blocks are not cramped. Update seeprom definitions to correctly reflect the fact that the primary channel is represented as a 2 bit integer. Add AHC_ULTRA_DIASABLED softc flag to denote controllers missing the external precision resistor. aic7xxx.reg: Add DFCACHETH to the definition of DFSTATUS for completness sake. Add SEQ_FLAGS2 which currently only contains the SCB_DMA (SCB DMA in progress) flag. aic7xxx.seq: Correct a problem when one lun has a disconnected untagged transaction and another lun has disconnected tagged transactions. Just because an entry is found in the untagged table doesn't mean that it will match. If the match on the lun fails, cleanup the SCB (return it to the disconnected list or free it), and snoop for a tag message. Before this change, we reported an unsolicited reselection. This bug was introduced about a month ago during an overly aggressive optimization pass on the reselection code. When cleaning up an SCB, we can't just blindly free the SCB. In the paging case, if the SCB came off of the disconnected list, its state may never have been updated in host memory. So, check the disconnected bit in SCB_CONTROL and return the SCB to the disconnected list if appropriate. Manage the SCB_DMA flag of SEQ_FLAGS2. More carefully shutdown the S/G dma engine in all cases by using a subroutine. Supposedly not doing this can cause an arbiter hang on some ULTRA2 chips. Formatting cleanup. On some chips, at least the aic7856, the transition from MREQPEND to HDONE can take a full 4 clock cycles. Test HDONE one more time to avoid this race. We only want our FIFO hung recovery code to execute when the engine is really hung. aic7xxx_93cx6.c: Sync perforce ids. aic7xxx_freebsd.c: Adjust for the primary channel being a 2 bit integer rather than a flag for 'B' channel being the primary. Namespace cleanup. Unpause the sequencer in one error recovery path that neglected to do so. This could have caused us to perform a bus reset when a recovery message might have otherwise been successful. aic7xxx_freebsd.h: Use AHC_PCI_CONFIG for controlling compilation of PCI support consistently throughout the driver. Move ahc_power_state_change() to OSM. aic7xxx_inline.h Namespace cleanup. Adjust our interrupt handler so it will work in the edge interrupt case. We must process all interrupt sources when the interrupt fires or risk not ever getting an interrupt again. This involves marking the fact that we are relying on an edge interrupt in ahc->flags and checking for this condition in addition to the AHC_ALL_INTERRUPTS flag. This fixes hangs on the 284X and any other aic7770 installation where level interrupts are not available. aic7xxx_pci.c: Move the powerstate manipulation code into the OSM. Several OSes now provide this functionality natively. Take another shot at using the data stored in scratch ram if the SCB2 signature is correct and no SEEPROM data is available. In the past this failed if external SCB ram was configured because the memory port was locked. We now release the memory port prior to testing the values in SCB2 and re-acquire it prior to doing termination control. Adjust for new 2 bit primary channel setting. Trust the STPWLEVEL setting on v 3.X BIOSes too. Configure any 785X ID in the same fashion and assume that any device with a rev id of 1 or higher has the PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
SEQ_FLAGS2 {
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
size 1
field SCB_DMA 0x01
field TARGET_MSG_PENDING 0x02
This is an MFC candidate. ahc_eisa.c: Change aic7770_map_int to take an additional irq parameter. Although we can get the irq from the eisa dev under FreeBSD, we can't do this under linux, so the OSM interface must supply this. ahc_pci.c: Move ahc_power_state_change() to the OSM. This allows us to use a platform supplied function that does the same thing. -current will move to the FreeBSD native API in the near future. aic7770.c: Sync up with core changes to support Linux EISA. We now store a 2 bit primary channel number rather than a bit flag that only allows b to be the primary channel. Adjust for this change. aic7xxx.c: Namespace and staticization cleanup. All exported symbols use an "ahc_" prefix to avoid collisions with other modules. Correct a logic bug that prevented us from dropping ATN during some exceptional conditions during message processing. Take advantage of a new flag managed by the sequencer that indicates if an SCB fetch is in progress. If so, the currently selected SCB needs to be returned to the free list to prevent an SCB leak. This leak is a rarity and would only occur if a bus reset or timeout resulting in a bus reset occurred in the middle of an SCB fetch. Don't attempt to perform ULTRA transfers on ultra capable adapters missing the external precision resistor required for ultra speeds. I've never encountered an adapter configured this way, but better safe than sorry. Handle the case of 5MHz user sync rate set as "0" instead of 0x1c in scratch ram. If we lookup a period of 0 in our table (async), clear the scsi offset. aic7xxx.h: Adjust for the primary channel being represented as a 2 bit integer in the flags member of the ahc softc. Cleanup the flags definitions so that comment blocks are not cramped. Update seeprom definitions to correctly reflect the fact that the primary channel is represented as a 2 bit integer. Add AHC_ULTRA_DIASABLED softc flag to denote controllers missing the external precision resistor. aic7xxx.reg: Add DFCACHETH to the definition of DFSTATUS for completness sake. Add SEQ_FLAGS2 which currently only contains the SCB_DMA (SCB DMA in progress) flag. aic7xxx.seq: Correct a problem when one lun has a disconnected untagged transaction and another lun has disconnected tagged transactions. Just because an entry is found in the untagged table doesn't mean that it will match. If the match on the lun fails, cleanup the SCB (return it to the disconnected list or free it), and snoop for a tag message. Before this change, we reported an unsolicited reselection. This bug was introduced about a month ago during an overly aggressive optimization pass on the reselection code. When cleaning up an SCB, we can't just blindly free the SCB. In the paging case, if the SCB came off of the disconnected list, its state may never have been updated in host memory. So, check the disconnected bit in SCB_CONTROL and return the SCB to the disconnected list if appropriate. Manage the SCB_DMA flag of SEQ_FLAGS2. More carefully shutdown the S/G dma engine in all cases by using a subroutine. Supposedly not doing this can cause an arbiter hang on some ULTRA2 chips. Formatting cleanup. On some chips, at least the aic7856, the transition from MREQPEND to HDONE can take a full 4 clock cycles. Test HDONE one more time to avoid this race. We only want our FIFO hung recovery code to execute when the engine is really hung. aic7xxx_93cx6.c: Sync perforce ids. aic7xxx_freebsd.c: Adjust for the primary channel being a 2 bit integer rather than a flag for 'B' channel being the primary. Namespace cleanup. Unpause the sequencer in one error recovery path that neglected to do so. This could have caused us to perform a bus reset when a recovery message might have otherwise been successful. aic7xxx_freebsd.h: Use AHC_PCI_CONFIG for controlling compilation of PCI support consistently throughout the driver. Move ahc_power_state_change() to OSM. aic7xxx_inline.h Namespace cleanup. Adjust our interrupt handler so it will work in the edge interrupt case. We must process all interrupt sources when the interrupt fires or risk not ever getting an interrupt again. This involves marking the fact that we are relying on an edge interrupt in ahc->flags and checking for this condition in addition to the AHC_ALL_INTERRUPTS flag. This fixes hangs on the 284X and any other aic7770 installation where level interrupts are not available. aic7xxx_pci.c: Move the powerstate manipulation code into the OSM. Several OSes now provide this functionality natively. Take another shot at using the data stored in scratch ram if the SCB2 signature is correct and no SEEPROM data is available. In the past this failed if external SCB ram was configured because the memory port was locked. We now release the memory port prior to testing the values in SCB2 and re-acquire it prior to doing termination control. Adjust for new 2 bit primary channel setting. Trust the STPWLEVEL setting on v 3.X BIOSes too. Configure any 785X ID in the same fashion and assume that any device with a rev id of 1 or higher has the PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
}
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
}
scratch_ram {
address 0x05a
size 6
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/*
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
* These are reserved registers in the card's scratch ram on the 2742.
* The EISA configuraiton chip is mapped here. On Rev E. of the
* aic7770, the sequencer can use this area for scratch, but the
* host cannot directly access these registers. On later chips, this
* area can be read and written by both the host and the sequencer.
* Even on later chips, many of these locations are initialized by
* the BIOS.
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
*/
SCSICONF {
size 1
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field TERM_ENB 0x80
field RESET_SCSI 0x40
field ENSPCHK 0x20
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
mask HSCSIID 0x07 /* our SCSI ID */
mask HWSCSIID 0x0f /* our SCSI ID if Wide Bus */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
Today is just not my day. Really get the right file.
2000-09-16 21:55:31 +00:00
INTDEF {
address 0x05c
size 1
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field EDGE_TRIG 0x80
Today is just not my day. Really get the right file.
2000-09-16 21:55:31 +00:00
mask VECTOR 0x0f
}
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
HOSTCONF {
address 0x05d
size 1
}
HA_274_BIOSCTRL {
address 0x05f
size 1
mask BIOSMODE 0x30
mask BIOSDISABLED 0x30
Convert to new assembler field syntax. Document the SXFRCTL2 register found on U2 and U160 controllers. Overload the MWI_RESIDUAL field for use as the SCB to be downloaded for "immediate" (or those without the disconnect privledge) transactions. Add scratch ram locations for the 274X that give us a bit more information including whether to enable extended translation.
2002-08-31 06:42:38 +00:00
field CHANNEL_B_PRIMARY 0x08
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
Major update to the aic7xxx driver: ahc_eisa.c: ahc_pci.c: Conform to new aic7xxx IRQ API. Adapt to aic7xxx_freebsd -> aic7xxx_osm changes. aic7770.c: Disable card generated interrupt early in our probe for "extra safety" Commonize some seeprom code with the PCI side of the driver. aic7xxx.c: Correctly initialize a few scratch ram locations during a sequencer restart. This avoids spurious sequencer ram parity errors in some configurations. Include the softc in ahc_update_residual calls. We need it for some diagnostics in this code path. Flag a data overrun on an auto-request sense failure as a CAM_AUTOSENSE_FAIL rather than a CAM_DATA_RUN_ERR. Force a renegotiation after noticing a parity error. This covers targets that lose our negotiation settings but don't bother to give us a unit attention condition. This can happen if a target fails during a reselection of us during a cable pull. Convert some code to using constants. Fix some typos. Correct target mode message loop handling. ahc_clear_msg_state was not clearing the "need to go to message out phase" bit once our loop was over. Simplify some abort handling code. Include tag information in target mode immediate notify events. When shutting down EISA controllers, don't EISA BIOS settings in the high portions of scratch ram. This fixes warm boot issues on some systems. Save a bit of space by only allocating the SCBs that we can use. Avoid some code paths in ahc_abort_scbs() if we are currently acting as a target. Correctly cleanup stranded SCBs in the card's SCB array. These are SCBs who's mapping has already been torn down by code that aborted the SCB by seeing it in another list first. Add a comment about some potential bus reset issues for target mode on Twin (EISA only) controllers. aic7xxx.h: Cleanup the hardware scb definitions a bit. Allocate a ful 256 byte scb mapping index. This simplifies the lookup code since the table covers all possible (and potentially bogus) values. Make AHC_DEBUG work again. aic7xxx.reg: Updates to hardware SCB definition. New definitions for target mode fixes. aic7xxx.seq: In target mode, initialize SAVED_LUN just after we receive the identify message. It may be required in the error recovery path when a normal cdb packet (includes lun) is not sent up to the host for processing. Respond to irregular messages during a selection in target mode. Defer looking for space for a cdb packet until we are about to enter command phase. We want to be able to handle irregular messages even if we would otherwise return QUEUE_FULL or BUSY. Add support for sending Ignore Wide Residue messages as a target. In the disable disconnect case in target mode, set our transfer rate correctly once data are availble. aic7xxx_93cx6.c: aic7xxx_93cx6.h: Add the ability to write and erase the seeprom. aic7xxx_inline.h: Correct Big Endian handling of large cdb sizes (> 12 bytes). Adaptec to changes in the calc_residual API. Correct a target mode bug where we always attempted to service the input queue even if no progress could be made due to lack of ATIOs. aic7xxx_osm.c: Adaptec to new IRQ mapping API. The new API allows the core to only enable our IRQ mapping once it is safe (sufficient initialization) to do so. Slap bootverbose protection around some diagnostics. Only attempt DT phases if we are wide. aic7xxx_osm.h: Enable big endian support. Adjust for IRQ API change. aic7xxx_pci.c: Be more careful about relying on subvendor 9005 information. We now only trust it for HBAs. This should allow the driver to attach to some MBs where the subvendor/device information does not follow the Adaptec spec. Only enable interrupts on the card once we are fully setup. Disable external SCB ram usage on the aic7895. I have not been able to make it 100% reliable. Adjust to seeprom routines being properly prefixed with "ahc". Fix a few bugs in the external SCB ram probing routine. We need to clear any parity errors we've triggered during the probe to avoid future, fatal, interrupts. If we detect an invalid cable combination, pretent there are no cable at all. This will enable all of the terminators which is probably the safest configuration we can "guess". MFC after: 4 days
2002-04-24 16:58:51 +00:00
}
scratch_ram {
address 0x070
size 16
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
/*
* Per target SCSI offset values for Ultra2 controllers.
*/
TARG_OFFSET {
size 16
}
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
}
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
const TID_SHIFT 4
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
const SCB_LIST_NULL 0xff
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
const TARGET_CMD_CMPLT 0xfe
const CCSGADDR_MAX 0x80
const CCSGRAM_MAXSEGS 16
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
/* WDTR Message values */
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
const BUS_8_BIT 0x00
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
const BUS_16_BIT 0x01
const BUS_32_BIT 0x02
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
/* Offset maximums */
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c: New sequencer assembler for the aic7xxx adapters. This assembler performs some amount of register type checking, allows bit manipulation of symbolic constants, and generates "patch tables" for conditionalized downloading of portions of the program. This makes it easier to take full advantage of the different features of the aic7xxx cards without imposing run time penalies or being bound to the small memory footprints of the low end cards for features like target mode. aic7xxx.reg: New, assembler parsed, register definitions fo the aic7xxx cards. This was done primarily in anticipation of 7810 support which will have a different register layout, but should be able to use the same assembler. The kernel aic7xxx driver consumes a generated file in the compile directory to get the definitions of the register locations. aic7xxx.seq: Convert to the slighly different syntax of the new assembler. Conditionalize SCB_PAGING, ultra, and twin features which shaves quite a bit of space once the program is downloaded. Add code to leave the selection hardware enabled during reconnects that win bus arbitration. This ensures that we will rearbitrate as soon as the bus goes free instead of delaying for a bit. When we expect the bus to go free, perform all of the cleanup associated with that event "up front" and enter a loop awaiting bus free. If we see a REQ first, complain, but attempt to continue. This will hopefully address, or at least help diagnose, the "target didn't send identify" messages that have been reported. Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
const MAX_OFFSET_8BIT 0x0f
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
const MAX_OFFSET_16BIT 0x08
const MAX_OFFSET_ULTRA2 0x7f
aic7xxx.c: aic7xxx.h: Split out core chip initialization into ahc_chip_init(). This will allow us to reset the chip correctly at times other than initial chip setup. aic7770.c aic7xxx_pci.c: Flesh out bus chip init methods for our two bus attachments and use these, in addition to bus suspend/resume hooks to get the core in better shape for handling these events. When disabling PCI parity error checking, use FAILDIS. Although the chip docs indicate that clearing PERRESPEN should also work, it does not. Auto-disable pci parity error checking after informing the user of AHC_PCI_TARGET_PERR_THRESH number of parity errors observed as a target. aic7xxx.h: aic7xxx_pci.c aic7770.c aic7xxx.c Add the instruction_ram_size softc field. Remove the now unused stack_size softc field. Modify ahc_loadseq to return a failure code and to actually check the downloaded instruction count against the limit set in our softc. Modify callers of ahc_loadseq to handle load failures as appropriate. Set instruction RAM sizes for each chip type. aic7xxx_pci.c: Add some delay in the aic785X termination control code. This may fix problems with the 2930. Be consistent in how we access config space registers. 16bit registers are accessed using 16bit ops. aic7xxx.c: Correct spelling errors. Have ahc_force_renegotiation() take a devinfo as is done in the U320 driver. Use this argument to correct a bug in the selection timeout handler where we forced a renegotiation with the last device that had set SAVED_SCSIID. SAVED_SCSIID is only updated once a selection is *sucessfull* and so is stale for any selection timeout. Cleanup the setup of the devinfo for busfree events. We now use this devinfo for a call to ahc_force_renegotiation() at the bottom of the routine, so it must be initialized in all cases. In ahc_pause_and_flushwork(), adjust the loop so that it will exit in the hot-eject case even if the INT_PEND mask is something other than 0xFF (as it is in this driver). Correct a wrapping string constant. Call ahc_fini_scbdata() after shutdown so that any ahc_chip_init() routine that might access SCB data will not access free'd memory. Correctly setup our buffer tag to indicate that 39bit addressing is available if in 39bit addressing mode. Rearrange some variable declarations based on type size. aic7xxx.c aic7xxx.h: aic7xxx.reg: Consistently use MAX_OFFSET for the user max syncrate set from non-volatile storage. This ensures that the offset does not conflict with AHC_OFFSET_UNKNOWN. Change AHC_OFFSET_UNKNOWN to 0xFF. This is a value that the curr->offset can never be, unlike '0' which we previously used. This fixes code that only checks for a non-zero offset to determine if a sync negotiation is required since it will fire in the unknown case even if the goal is async. Change MAX_OFFSET to 0x7f which is the max offset U160 aic7xxx controllers can negotiate. This ensures that curr->offset will not match AHC_OFFSET_UNKNOWN. aic7xxx_inline.h: Have our inline interrupt handler return with a value indicating whether we serviced a real interrupt. This is required for Linux support. Return earlier if the interrupt is not for us.
2003-05-03 23:55:38 +00:00
const MAX_OFFSET 0x7f
Massive overhaul of the aic7xxx driver: - Convert to CAM - Use a new DMA based queuing and paging scheme - Add preliminary target mode support - Add support for the aic789X chips - Take advantage of external SRAM on more controllers. - Numerous bug fixes and performance improvements.
1998-09-15 07:24:17 +00:00
const HOST_MSG 0xff
/* Target mode command processing constants */
const CMD_GROUP_CODE_SHIFT 0x05
Keep track of negotiated transfer parameters for each initiator<->target connection. Clean up support for devices featuring the multiple target SCSI ID feature. On aic7890/91/96/97 chips, we can now assume the target role on multiple target ids simultaneously. Although these chips also have sufficient instruction space to hold to support the initiator and target role at the same time, the initiator role is currently disabled as it will conflict (chip design restriction) with the multi-tid feature. I'll probably add a nob to enable the initiator (there-by disabling multi-tid) some time in the future. Return queue full or busy, depending on the tagged nature of the incoming request, if our command input queue fills up in host memeory. Deal with accept target I/O resource shortages. If we get an underrun on a transaction that wasn't supposed to transmit any data, don't attempt to print out the S/G list. The code would run until hitting a non-present page. (oops)
1999-03-05 23:35:48 +00:00
const STATUS_BUSY 0x08
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
const STATUS_QUEUE_FULL 0x28
const TARGET_DATA_IN 1
Add support to aicasm for "downloaded constants". These are immediate operands that are set during seqeuncer program download instead of at assembly time. Convert the sequencer code to use" downloaded constants" for four run time constants that vary depending on the board type. This frees up 4 bytes of sequencer scratch ram space where these constants used to be stored and also removes the additional instructions required to load their values into the accumulator prior to using them. Remove the REJBYTE sram variable. The host driver can just as easly read the accumulator to get this value. The scratch ram savings is important as the old code used to clober the SCSICONF register on 274X cards which sits near the top of scratch ram space. The SCSICONF register controls bus termination, and clobbering it is not a good thing. Now we have 4 bytes to spare. This should fix the reported problems with cards that don't have devices attached to them failing with a stream of "Somone reset bus X" messages. Doug Ledford determined the cause of the problem, fixes by me.
1997-09-27 19:37:31 +00:00
/*
* Downloaded (kernel inserted) constants
*/
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
/* Offsets into the SCBID array where different data is stored */
const QOUTFIFO_OFFSET download
const QINFIFO_OFFSET download
Pull the correct file over to freefall.
2000-09-16 20:59:12 +00:00
const CACHESIZE_MASK download
const INVERTED_CACHESIZE_MASK download
Convert the driver to use a single DMA for fetching new commands instead of two (one to access the circular input fifo, the other to get the SCB). This costs us a command slot so the driver can now only queue 254 simultaneous commands. Have the kernel driver honor critical sections in sequencer code. When prefetching S/G segments only pull a cacheline's worth but never less than two elements. This reduces the impact of the prefetch on the main data transfer when compared to the 128 byte fetches the driver used to do. Add "bootverbose" logging for transfer negotiations. Correct a bug in ahc_set_syncrate() that would prevent an update of the sync parameters if only the ppr_options had changed. Correct locking for calls to ahc_free_scb(). ahc_free_scb() is no longer protected internally to simplify ports to other platforms. Make sure we unfreeze our SIMQ if a resource shortage has occurred and an SCB is been freed. ahc_pci.c: Turn on cacheline streaming for all controllers that support it. Clarify diagnostic messages about PCI interrupts.
2000-10-05 04:24:14 +00:00
const SG_PREFETCH_CNT download
const SG_PREFETCH_ALIGN_MASK download
const SG_PREFETCH_ADDR_MASK download
Reference in New Issue Copy Permalink