Add definitions for bits in condition code register and the load store
unit control registers. Move tstate definitions to their own file. Submitted by: tmm
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40
sys/sparc64/include/ccr.h
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40
sys/sparc64/include/ccr.h
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/*-
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* Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_CCR_H_
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#define _MACHINE_CCR_H_
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#define ICC_C (1UL << 0)
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#define ICC_V (1UL << 1)
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#define ICC_Z (1UL << 2)
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#define ICC_N (1UL << 3)
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#define XCC_C (1UL << 4)
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#define XCC_V (1UL << 5)
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#define XCC_Z (1UL << 6)
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#define XCC_N (1UL << 7)
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#endif /* !_MACHINE_CCR_H_ */
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52
sys/sparc64/include/lsu.h
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52
sys/sparc64/include/lsu.h
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/*-
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* Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_LSU_H_
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#define _MACHINE_LSU_H_
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#define LSU_IC (1UL << 0)
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#define LSU_DC (1UL << 1)
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#define LSU_IM (1UL << 2)
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#define LSU_DM (1UL << 3)
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#define LSU_FM_SHIFT 4
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#define LSU_FM_BITS 16
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#define LSU_FM_MASK (((1UL << LSU_FM_BITS) - 1) << LSU_FM_SHIFT)
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#define LSU_VM_SHIFT 25
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#define LSU_VM_BITS 8
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#define LSU_VM_MASK (((1UL << LSU_VM_BITS) - 1) << LSU_VM_SHIFT)
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#define LSU_PM_SHIFT 33
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#define LSU_PM_BITS 8
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#define LSU_PM_MASK (((1UL << LSU_PM_BITS) - 1) << LSU_PM_SHIFT)
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#define LSU_VW (1UL << 21)
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#define LSU_VR (1UL << 22)
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#define LSU_PW (1UL << 23)
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#define LSU_PR (1UL << 24)
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#endif /* _MACHINE_LSU_H_ */
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@ -47,19 +47,6 @@
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#define PSTATE_MG (1<<10)
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#define PSTATE_IG (1<<11)
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#define TSTATE_PSTATE_SHIFT 8
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#define TSTATE_PSTATE(x) ((x) << TSTATE_PSTATE_SHIFT)
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#define TSTATE_AG TSTATE_PSTATE(PSTATE_AG)
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#define TSTATE_IE TSTATE_PSTATE(PSTATE_IE)
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#define TSTATE_PRIV TSTATE_PSTATE(PSTATE_PRIV)
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#define TSTATE_AM TSTATE_PSTATE(PSTATE_AM)
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#define TSTATE_PEF TSTATE_PSTATE(PSTATE_PEF)
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#define TSTATE_RED TSTATE_PSTATE(PSTATE_RED)
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#define TSTATE_TLE TSTATE_PSTATE(PSTATE_TLE)
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#define TSTATE_CLE TSTATE_PSTATE(PSTATE_CLE)
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#define TSTATE_MG TSTATE_PSTATE(PSTATE_MG)
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#define TSTATE_IG TSTATE_PSTATE(PSTATE_IG)
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#define VER_MANUF_SHIFT (48)
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#define VER_IMPL_SHIFT (32)
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#define VER_MASK_SHIFT (24)
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72
sys/sparc64/include/tstate.h
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72
sys/sparc64/include/tstate.h
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@ -0,0 +1,72 @@
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/*-
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* Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_TSTATE_H_
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#define _MACHINE_TSTATE_H_
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#include <machine/pstate.h>
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#include <machine/ccr.h>
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#define TSTATE_CWP_SHIFT 0
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#define TSTATE_CWP_BITS 5
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#define TSTATE_CWP_MASK \
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(((1 << TSTATE_CWP_BITS) - 1) << TSTATE_CWP_SHIFT)
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#define TSTATE_CWP(x) ((x & TSTATE_CWP_MASK) >> TSTATE_CWP_SHIFT)
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#define TSTATE_PSTATE_SHIFT 8
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#define TSTATE_PSTATE_BITS 12
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#define TSTATE_PSTATE_MASK \
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(((1 << TSTATE_PSTATE_BITS) - 1) << TSTATE_PSTATE_SHIFT)
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#define TSTATE_PSTATE(x) ((x) << TSTATE_PSTATE_SHIFT)
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#define TSTATE_AG TSTATE_PSTATE(PSTATE_AG)
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#define TSTATE_IE TSTATE_PSTATE(PSTATE_IE)
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#define TSTATE_PRIV TSTATE_PSTATE(PSTATE_PRIV)
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#define TSTATE_AM TSTATE_PSTATE(PSTATE_AM)
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#define TSTATE_PEF TSTATE_PSTATE(PSTATE_PEF)
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#define TSTATE_RED TSTATE_PSTATE(PSTATE_RED)
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#define TSTATE_TLE TSTATE_PSTATE(PSTATE_TLE)
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#define TSTATE_CLE TSTATE_PSTATE(PSTATE_CLE)
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#define TSTATE_MG TSTATE_PSTATE(PSTATE_MG)
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#define TSTATE_IG TSTATE_PSTATE(PSTATE_IG)
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#define TSTATE_ASI_SHIFT 24
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#define TSTATE_ASI_BITS 8
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#define TSTATE_ASI_MASK \
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(((1 << TSTATE_ASI_BITS) - 1) << TSTATE_ASI_SHIFT)
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#define TSTATE_ASI(x) ((x & TSTATE_ASI_MASK) >> TSTATE_ASI_SHIFT)
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#define TSTATE_CCR_SHIFT 32
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#define TSTATE_CCR(x) ((x) << TSTATE_CCR_SHIFT)
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#define TSTATE_ICC_C TSTATE_CCR(ICC_C)
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#define TSTATE_ICC_V TSTATE_CCR(ICC_V)
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#define TSTATE_ICC_Z TSTATE_CCR(ICC_Z)
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#define TSTATE_ICC_N TSTATE_CCR(ICC_N)
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#define TSTATE_XCC_C TSTATE_CCR(XCC_C)
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#define TSTATE_XCC_V TSTATE_CCR(XCC_V)
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#define TSTATE_XCC_Z TSTATE_CCR(XCC_Z)
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#define TSTATE_XCC_N TSTATE_CCR(XCC_N)
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#endif /* !_MACHINE_TSTATE_H_ */
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