Rename hard-coded value 1 << 14 with BGE_RX_CPU_DRV_EVENT.

This bit(SW event 7 in publicly available data sheet) is used to
make RX CPU handle a firmware command and the bit is automatically
cleared after RX CPU completed the command.
Generally firmware command takes the following steps.
 1. Write BGE_SRAM_FW_CMD_MB with a command.
 2. Write BGE_SRAM_FW_CMD_LEN_MB with the length of the command in bytes.
 3. Write BGE_SRAM_FW_CMD_DATA_MB with actual command data.
 4. Generate BGE_RX_CPU_EVENT and let firmware handle the command.
 5. Wait for the ACK of the firmware command.

No functional changes.
This commit is contained in:
Pyun YongHyeon 2011-10-27 21:27:37 +00:00
parent 8017fd8eb9
commit 9931ba85e3
2 changed files with 7 additions and 3 deletions

View File

@ -1370,10 +1370,11 @@ bge_stop_fw(struct bge_softc *sc)
if (sc->bge_asf_mode) {
bge_writemem_ind(sc, BGE_SRAM_FW_CMD_MB, BGE_FW_CMD_PAUSE);
CSR_WRITE_4(sc, BGE_RX_CPU_EVENT,
CSR_READ_4(sc, BGE_RX_CPU_EVENT) | (1 << 14));
CSR_READ_4(sc, BGE_RX_CPU_EVENT) | BGE_RX_CPU_DRV_EVENT);
for (i = 0; i < 100; i++ ) {
if (!(CSR_READ_4(sc, BGE_RX_CPU_EVENT) & (1 << 14)))
if (!(CSR_READ_4(sc, BGE_RX_CPU_EVENT) &
BGE_RX_CPU_DRV_EVENT))
break;
DELAY(10);
}
@ -4111,7 +4112,8 @@ bge_asf_driver_up(struct bge_softc *sc)
bge_writemem_ind(sc, BGE_SRAM_FW_CMD_LEN_MB, 4);
bge_writemem_ind(sc, BGE_SRAM_FW_CMD_DATA_MB, 3);
CSR_WRITE_4(sc, BGE_RX_CPU_EVENT,
CSR_READ_4(sc, BGE_RX_CPU_EVENT) | (1 << 14));
CSR_READ_4(sc, BGE_RX_CPU_EVENT) |
BGE_RX_CPU_DRV_EVENT);
}
}
}

View File

@ -1901,6 +1901,8 @@
#define BGE_EE_DELAY 0x6848
#define BGE_FASTBOOT_PC 0x6894
#define BGE_RX_CPU_DRV_EVENT 0x00004000
/*
* NVRAM Control registers
*/