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- Increase timeouts to 100 milliseconds, 1 millisecond is definitely not

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enough for PCI controller to get into shape

Thanks to: adrian@
This commit is contained in:
Oleksandr Tymoshenko 2010-01-28 21:55:56 +00:00
parent 4ff467dc65
commit c1517c0df5
1 changed files with 3 additions and 3 deletions
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6
sys/mips/atheros/ar71xx_pci.c
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@ -297,12 +297,12 @@ ar71xx_pci_attach(device_t dev)
reset |= (RST_RESET_PCI_CORE | RST_RESET_PCI_BUS);
ATH_WRITE_REG(AR71XX_RST_RESET, reset);
ATH_READ_REG(AR71XX_RST_RESET);
DELAY(1000);
DELAY(100000);
reset &= ~(RST_RESET_PCI_CORE | RST_RESET_PCI_BUS);
ATH_WRITE_REG(AR71XX_RST_RESET, reset);
ATH_READ_REG(AR71XX_RST_RESET);
DELAY(1000);
DELAY(100000);
/* Init PCI windows */
ATH_WRITE_REG(AR71XX_PCI_WINDOW0, PCI_WINDOW0_ADDR);
@ -313,7 +313,7 @@ ar71xx_pci_attach(device_t dev)
ATH_WRITE_REG(AR71XX_PCI_WINDOW5, PCI_WINDOW5_ADDR);
ATH_WRITE_REG(AR71XX_PCI_WINDOW6, PCI_WINDOW6_ADDR);
ATH_WRITE_REG(AR71XX_PCI_WINDOW7, PCI_WINDOW7_CONF_ADDR);
DELAY(1000);
DELAY(100000);
ar71xx_pci_check_bus_error();