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Disable the timer and clear any pending bit, then setup the new counter

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register values, then restart the timer.  This prevents a situation where
an old event fires just as we're about to load a new value into the timer,
when the start routine is called to change the time of the current event.

Also re-nest the parens properly for casting the result of converting
time and frequency to a count.  This doesn't actually change the result of
the calcs, but will some day prevent a loss-of-precision warning on the
assignment, if that warning gets enabled.
This commit is contained in:
Ian Lepore 2014-04-02 18:32:27 +00:00
parent 9e24f23880
commit c878f70aae
1 changed files with 5 additions and 2 deletions
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7
sys/arm/arm/mpcore_timer.c
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@ -173,6 +173,9 @@ arm_tmr_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
uint32_t load, count;
uint32_t ctrl;
tmr_prv_write_4(PRV_TIMER_CTRL, 0);
tmr_prv_write_4(PRV_TIMER_INTR, PRV_TIMER_INTR_EVENT);
ctrl = PRV_TIMER_CTRL_IRQ_ENABLE | PRV_TIMER_CTRL_TIMER_ENABLE;
if (period != 0) {
@ -182,14 +185,14 @@ arm_tmr_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
load = 0;
if (first != 0)
count = ((uint32_t)et->et_frequency * first) >> 32;
count = (uint32_t)((et->et_frequency * first) >> 32);
else
count = load;
tmr_prv_write_4(PRV_TIMER_LOAD, load);
tmr_prv_write_4(PRV_TIMER_COUNT, count);
tmr_prv_write_4(PRV_TIMER_CTRL, ctrl);
return (0);
}