d/freebsd-nq
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Update comments around various structs.

Browse Source 
Add speeds S800, S1600 and S3200
This commit is contained in:
Sean Bruno 2009-02-12 03:05:42 +00:00
parent f3e39d2a7b
commit d717909f5a
3 changed files with 27 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
sys/dev/firewire/firewire.h
View File

@ -99,9 +99,16 @@ struct fw_reg_req_t {
#define FWRCODE_ER_TYPE 6
#define FWRCODE_ER_ADDR 7
/*
* Defined 1394a-2000
* Table 5B-1
*/
#define FWSPD_S100 0
#define FWSPD_S200 1
#define FWSPD_S400 2
#define FWSPD_S800 3
#define FWSPD_S1600 4
#define FWSPD_S3200 5
#define FWP_TL_VALID (1 << 7)

17
sys/dev/firewire/fwohcireg.h
View File

@ -411,32 +411,31 @@ struct fwohci_trailer{
#define OHCI_CNTL_PHYPKT (0x1 << 10)
#define OHCI_CNTL_SID (0x1 << 9)
/*
* defined in OHCI 1.1
* chapter 6.1
*/
#define OHCI_INT_DMA_ATRQ (0x1 << 0)
#define OHCI_INT_DMA_ATRS (0x1 << 1)
#define OHCI_INT_DMA_ARRQ (0x1 << 2)
#define OHCI_INT_DMA_ARRS (0x1 << 3)
#define OHCI_INT_DMA_PRRQ (0x1 << 4)
#define OHCI_INT_DMA_PRRS (0x1 << 5)
#define OHCI_INT_DMA_IT (0x1 << 6)
#define OHCI_INT_DMA_IR (0x1 << 7)
#define OHCI_INT_PW_ERR (0x1 << 8)
#define OHCI_INT_LR_ERR (0x1 << 9)
#define OHCI_INT_DMA_IT (0x1 << 6)
#define OHCI_INT_DMA_IR (0x1 << 7)
#define OHCI_INT_PW_ERR (0x1 << 8)
#define OHCI_INT_LR_ERR (0x1 << 9)
#define OHCI_INT_PHY_SID (0x1 << 16)
#define OHCI_INT_PHY_BUS_R (0x1 << 17)
#define OHCI_INT_REG_FAIL (0x1 << 18)
#define OHCI_INT_PHY_INT (0x1 << 19)
#define OHCI_INT_CYC_START (0x1 << 20)
#define OHCI_INT_CYC_64SECOND (0x1 << 21)
#define OHCI_INT_CYC_LOST (0x1 << 22)
#define OHCI_INT_CYC_ERR (0x1 << 23)
#define OHCI_INT_ERR (0x1 << 24)
#define OHCI_INT_CYC_LONG (0x1 << 25)
#define OHCI_INT_PHY_REG (0x1 << 26)
#define OHCI_INT_EN (0x1 << 31)
#define IP_CHANNELS 0x0234

12
sys/dev/firewire/fwphyreg.h
View File

@ -34,6 +34,10 @@
* $FreeBSD$
*/
/*
* IEEE 1394a
* Figure 5B - 1
*/
struct phyreg_base {
#if BYTE_ORDER == BIG_ENDIAN
uint8_t phy_id:6,
@ -100,6 +104,10 @@ struct phyreg_base {
#endif
};
/*
* IEEE 1394a
* Figure 5B - 2
*/
struct phyreg_page0 {
#if BYTE_ORDER == BIG_ENDIAN
uint8_t astat:2,
@ -160,6 +168,10 @@ struct phyreg_page0 {
#endif
};
/*
* IEEE 1394a
* Figure 5B - 3
*/
struct phyreg_page1 {
uint8_t compliance;
uint8_t :8;