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- Flush PCI register write before delay

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Spotted by: Pyun YongHyeon
This commit is contained in:
Oleksandr Tymoshenko 2009-06-19 05:00:17 +00:00
parent 6846a68073
commit d7766b4586
1 changed files with 2 additions and 2 deletions
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4
sys/mips/atheros/ar71xx_pci.c
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@ -296,13 +296,13 @@ ar71xx_pci_attach(device_t dev)
reset = ATH_READ_REG(AR71XX_RST_RESET);
reset |= (RST_RESET_PCI_CORE | RST_RESET_PCI_BUS);
ATH_WRITE_REG(AR71XX_RST_RESET, reset);
DELAY(1000);
ATH_READ_REG(AR71XX_RST_RESET);
DELAY(1000);
reset &= ~(RST_RESET_PCI_CORE | RST_RESET_PCI_BUS);
ATH_WRITE_REG(AR71XX_RST_RESET, reset);
DELAY(1000);
ATH_READ_REG(AR71XX_RST_RESET);
DELAY(1000);
/* Init PCI windows */
ATH_WRITE_REG(AR71XX_PCI_WINDOW0, PCI_WINDOW0_ADDR);