Remove CPU_HAVEFPU.

Instead, use a runtime decision to handle COP1 traps.  If floating point
support is present in the current CPU, enable saving of the floating point
state.  If support is not present, fail with SIGILL.

Reviewed by:	imp, br
Sponsored by:	DARPA / AFRL
Differential Revision:	https://reviews.freebsd.org/D12707
This commit is contained in:
John Baldwin 2017-10-18 17:23:16 +00:00
parent 1ff30c6af0
commit d8371cb18e
3 changed files with 8 additions and 11 deletions

@ -184,9 +184,6 @@ CFLAGS.gcc+= -mcall-aixdesc
.if ${MACHINE_CPUARCH} == "mips"
CFLAGS+= -msoft-float
INLINE_LIMIT?= 8000
.if ${MACHINE_ARCH:Mmips*hf} != ""
CFLAGS+= -DCPU_HAVEFPU
.endif
.endif
#

@ -39,7 +39,6 @@ CPU_PROAPTIV opt_global.h
CPU_MIPS32 opt_global.h
CPU_MIPS64 opt_global.h
CPU_SENTRY5 opt_global.h
CPU_HAVEFPU opt_global.h
CPU_SB1 opt_global.h
CPU_CNMIPS opt_global.h
CPU_RMI opt_global.h

@ -75,6 +75,7 @@ __FBSDID("$FreeBSD$");
#include <machine/trap.h>
#include <machine/cpu.h>
#include <machine/cpuinfo.h>
#include <machine/pte.h>
#include <machine/pmap.h>
#include <machine/md_var.h>
@ -970,12 +971,13 @@ dofault:
case T_COP_UNUSABLE + T_USER:
cop = (trapframe->cause & MIPS_CR_COP_ERR) >> MIPS_CR_COP_ERR_SHIFT;
if (cop == 1) {
#if !defined(CPU_HAVEFPU)
/* FP (COP1) instruction */
log_illegal_instruction("COP1_UNUSABLE", trapframe);
i = SIGILL;
break;
#else
/* FP (COP1) instruction */
if (cpuinfo.fpu_id == 0) {
log_illegal_instruction("COP1_UNUSABLE",
trapframe);
i = SIGILL;
break;
}
addr = trapframe->pc;
MipsSwitchFPState(PCPU_GET(fpcurthread), td->td_frame);
PCPU_SET(fpcurthread, td);
@ -986,7 +988,6 @@ dofault:
#endif
td->td_md.md_flags |= MDTD_FPUSED;
goto out;
#endif
}
#ifdef CPU_CNMIPS
else if (cop == 2) {