cxgbe(4): Check if the firmware supports 512 SGL per FR MR.
Firmwares >= 1.25.6.0 support 512 SGL entries in a single memory registration request. Obtained from: Chelsio Communications MFC after: 1 week Sponsored by: Chelsio Communications
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@ -405,6 +405,7 @@ struct adapter_params {
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bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */
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bool fr_nsmr_tpte_wr_support; /* FW support for FR_NSMR_TPTE_WR */
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bool dev_512sgl_mr; /* FW support for 512 SGL per FR MR */
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bool viid_smt_extn_support; /* FW returns vin, vfvld & smt index? */
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unsigned int max_pkts_per_eth_tx_pkts_wr;
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};
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@ -5222,6 +5222,14 @@ get_params__post_init(struct adapter *sc)
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else
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sc->params.fr_nsmr_tpte_wr_support = false;
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/* Support for 512 SGL entries per FR MR. */
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param[0] = FW_PARAM_DEV(DEV_512SGL_MR);
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rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
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if (rc == 0)
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sc->params.dev_512sgl_mr = val[0] != 0;
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else
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sc->params.dev_512sgl_mr = false;
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param[0] = FW_PARAM_PFVF(MAX_PKTS_PER_ETH_TX_PKTS_WR);
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rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
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if (rc == 0)
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