Enable/Disable Ultra mode on a per target basis. This allows the driver
to use the full range of settings from 3.6-20MHz on any target. Remove all Ultra settings except for the top three that are documented to work. This fixes some problem reports with the last revision of the driver since at least the 5.7MHz entry doesn't work in Ultra mode.
This commit is contained in:
Justin T. Gibbs
parent
61538c3003
commit
f6ca14f03c
@ -31,7 +31,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: aic7xxx.c,v 1.65 1996/04/28 19:21:19 gibbs Exp $
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* $Id: aic7xxx.c,v 1.66 1996/05/10 16:21:02 gibbs Exp $
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*/
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/*
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* TODO:
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@ -133,8 +133,6 @@
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#include <dev/aic7xxx/aic7xxx_reg.h>
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#define PAGESIZ 4096
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#include <sys/kernel.h>
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#define KVTOPHYS(x) vtophys(x)
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@ -231,7 +229,8 @@ static int ahc_reset_device __P((struct ahc_data *ahc, int target,
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static void ahc_reset_current_bus __P((u_long iobase));
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static void ahc_run_done_queue __P((struct ahc_data *ahc));
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static void ahc_scsirate __P((struct ahc_data* ahc, u_char *scsirate,
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int period, int offset, int target));
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int period, int offset, char channel,
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int target));
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static timeout_t
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ahc_timeout;
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static void ahc_busy_target __P((int target, char channel,
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@ -288,11 +287,6 @@ static struct {
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{ 0x100, 50, "20.0" },
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{ 0x110, 62, "16.0" },
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{ 0x120, 75, "13.4" },
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{ 0x130, 175, "5.7" },
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{ 0x140, 200, "5.0" },
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{ 0x150, 225, "4.4" },
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{ 0x160, 250, "4.0" },
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{ 0x170, 275, "3.6" },
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{ 0x000, 100, "10.0" },
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{ 0x010, 125, "8.0" },
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{ 0x020, 150, "6.67" },
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@ -386,39 +380,52 @@ ahc_reset(iobase)
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* Look up the valid period to SCSIRATE conversion in our table.
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*/
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static void
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ahc_scsirate(ahc, scsirate, period, offset, target )
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ahc_scsirate(ahc, scsirate, period, offset, channel, target )
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struct ahc_data *ahc;
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u_char *scsirate;
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short period;
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u_char offset;
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char channel;
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int target;
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{
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int i;
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for (i = 0; i < ahc_num_syncrates; i++) {
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u_char ultra_enb;
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u_long ultra_enb_addr;
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if ((ahc_syncrates[i].period - period) >= 0) {
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/*
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* Watch out for Ultra speeds when ultra is not
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* enabled and vice-versa.
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*/
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if (ahc->type & AHC_ULTRA) {
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if (!(ahc_syncrates[i].sxfr & ULTRA_SXFR))
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break; /* Use Async */
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}
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else {
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if (ahc_syncrates[i].sxfr & ULTRA_SXFR) {
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/*
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* This should only happen if the
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* drive is the first to negotiate
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* and chooses a high rate. We'll
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* just move down the table util
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* we hit a non ultra speed.
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*/
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continue;
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}
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if(!(ahc->type & AHC_ULTRA)
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&& (ahc_syncrates[i].sxfr & ULTRA_SXFR)) {
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/*
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* This should only happen if the
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* drive is the first to negotiate
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* and chooses a high rate. We'll
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* just move down the table util
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* we hit a non ultra speed.
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*/
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continue;
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}
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*scsirate = (ahc_syncrates[i].sxfr) | (offset & 0x0f);
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/*
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* Ensure Ultra mode is set properly for
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* this target.
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*/
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ultra_enb_addr = ahc->baseport + ULTRA_ENB;
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if(channel == 'B' || target > 7)
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ultra_enb_addr++;
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ultra_enb = inb(ultra_enb_addr);
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if (ahc_syncrates[i].sxfr & ULTRA_SXFR)
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ultra_enb |= 0x01 << (target & 0x07);
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else
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ultra_enb &= ~(0x01 << (target & 0x07));
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outb(ultra_enb_addr, ultra_enb);
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if(bootverbose) {
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printf("ahc%d: target %d synchronous at %sMHz,"
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" offset = 0x%x\n", ahc->unit, target,
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@ -765,7 +772,7 @@ ahc_intr(arg)
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switch (intstat & SEQINT_MASK) {
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case BAD_PHASE:
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panic("ahc%d:%c:%d: unknown scsi bus phase. "
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printf("ahc%d:%c:%d: unknown scsi bus phase. "
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"Attempting to continue\n",
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ahc->unit, channel, target);
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break;
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@ -849,7 +856,6 @@ ahc_intr(arg)
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if(intstat & CMDCMPLT) {
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int scb_index;
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printf("PIC\n");
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outb(CLRINT + iobase, CLRCMDINT);
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scb_index = inb(QOUTFIFO + iobase);
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if(!(inb(QOUTCNT + iobase) & ahc->qcntmask))
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@ -970,9 +976,9 @@ ahc_intr(arg)
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maxoffset = 0x08;
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else
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maxoffset = 0x0f;
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ahc_scsirate(ahc, &rate, period,
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MIN(offset,maxoffset),
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target);
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ahc_scsirate(ahc, &rate, period,
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MIN(offset, maxoffset),
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channel, target);
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/* Preserve the WideXfer flag */
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targ_scratch = rate | (targ_scratch & WIDEXFER);
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outb(TARG_SCRATCH + iobase + scratch_offset,
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@ -1449,10 +1455,7 @@ ahc_intr(arg)
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int scb_index = inb(SCB_TAG + iobase);
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status = inb(SSTAT1 + iobase);
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scb = ahc->scbarray[scb_index];
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xs = scb->xs;
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if (status & SCSIRSTI) {
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char channel;
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@ -1485,6 +1488,7 @@ ahc_intr(arg)
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u_char mesg_out = MSG_NOP;
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u_char lastphase = inb(LASTPHASE + iobase);
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xs = scb->xs;
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sc_print_addr(xs->sc_link);
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switch(lastphase) {
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@ -1536,6 +1540,8 @@ ahc_intr(arg)
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else if (status & SELTO) {
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u_char waiting;
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u_char flags;
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xs = scb->xs;
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xs->error = XS_SELTIMEOUT;
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/*
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* Clear any pending messages for the timed out
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@ -1676,6 +1682,7 @@ ahc_init(ahc)
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{
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u_long iobase = ahc->baseport;
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u_char scsi_conf, sblkctl, i;
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u_short ultraenable = 0;
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int max_targ = 15;
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/*
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* Assume we have a board at this stage and it has been reset.
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@ -1880,6 +1887,16 @@ ahc_init(ahc)
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*/
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target_settings &= 0x7f;
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}
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if(ahc->type & AHC_ULTRA) {
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/*
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* Enable Ultra for any target that
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* has a valid ultra syncrate setting.
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*/
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u_char rate = target_settings & 0x70;
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if( rate == 0x00 || rate == 0x10 ||
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rate == 0x20 )
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ultraenable |= (0x01 << i);
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}
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}
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outb(TARG_SCRATCH+i+iobase,target_settings);
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}
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@ -1898,6 +1915,9 @@ ahc_init(ahc)
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ahc->tagenable = 0;
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ahc->orderedtag = 0;
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outb(ULTRA_ENB + iobase, ultraenable & 0xff);
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outb(ULTRA_ENB + 1 + iobase, (ultraenable >> 8) & 0xff);
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#ifdef AHC_DEBUG
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/* How did we do? */
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if(ahc_debug & AHC_SHOWMISC)
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@ -1970,8 +1990,8 @@ ahcminphys(bp)
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* discontinuous physically, hense the "page per segment" limit
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* enforced here.
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*/
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if (bp->b_bcount > ((AHC_NSEG - 1) * PAGESIZ)) {
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bp->b_bcount = ((AHC_NSEG - 1) * PAGESIZ);
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if (bp->b_bcount > ((AHC_NSEG - 1) * PAGE_SIZE)) {
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bp->b_bcount = ((AHC_NSEG - 1) * PAGE_SIZE);
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}
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}
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@ -2081,8 +2101,8 @@ ahc_scsi_cmd(xs)
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* length
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*/
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/* how far to the end of the page */
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nextphys = (thisphys & (~(PAGESIZ - 1)))
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+ PAGESIZ;
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nextphys = (thisphys & (~(PAGE_SIZE- 1)))
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+ PAGE_SIZE;
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bytes_this_page = nextphys - thisphys;
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/**** or the data ****/
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bytes_this_page = min(bytes_this_page ,datalen);
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@ -2090,8 +2110,8 @@ ahc_scsi_cmd(xs)
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datalen -= bytes_this_page;
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/* get more ready for the next page */
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thiskv = (thiskv & (~(PAGESIZ - 1)))
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+ PAGESIZ;
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thiskv = (thiskv & (~(PAGE_SIZE - 1)))
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+ PAGE_SIZE;
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if (datalen)
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thisphys = KVTOPHYS(thiskv);
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}
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@ -2371,18 +2391,15 @@ ahc_timeout(arg)
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{
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struct scb *scb = (struct scb *)arg;
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struct ahc_data *ahc;
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int s, h, found;
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int s, found;
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u_char bus_state;
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u_long iobase;
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char channel;
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s = splbio();
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h = splhigh();
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if (!(scb->flags & SCB_ACTIVE)) {
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/* Previous timeout took care of me already */
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splx(h);
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splx(s);
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return;
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}
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@ -2414,13 +2431,11 @@ ahc_timeout(arg)
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scb->flags |= SCB_TIMEDOUT;
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timeout(ahc_timeout, (caddr_t)scb,
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(scb->xs->timeout * hz) / 1000);
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splx(h);
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splx(s);
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return;
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}
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}
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ahc->in_timeout = TRUE;
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splx(h);
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/*
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* Ensure that the card doesn't do anything
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