from DWLPX to PCI space. Just a methods holder such that we have a parent
which is a "pcib" and we create a child which is a "pci". Add the appropriate
ivar code (which is for a hose #).
based upon presence/absence of ISA (there is no ISA bus on an 8200- okay,
well, there *could* be one in a DWLPX tray, but we don't support it)).
Most importantly change the interrupt resource map to cover a whole 16
bits. The 8200 uses 16 bit interrupt vectors which we construct that
contain the I/O-board, hose, an pci slot in them, and then we write these
vectors into the appropriate DWLPX registers. At any rate, a flat array
of 64 'IRQs' isn't enough.
was needed to make attach/detach of devices work, which is
needed for the PCCARD support.
(PCCARD support is still not working though, more to come on that)
Support the CMD646 chip which is used on many alphas, sadly only
in WDMA2 mode, as the silicon is broken beyond belief for UDMA modes.
Lots of cosmetic fixes here and there.
Sorry for the size of this megapatchfromhell but it was not
possible otherwise...
newbus patches based on work from: dfr (Doug Rabson)
I was wagering on DEC being elegant & numbering PCI buses normally on
machines with one pchip. It looks like they went with consistent -- buses
behind ppbs begin with bus 2.
tsunami systems and the PCI bus-numbering system of FreeBSD. Eg, the former
allows for 2 PCI bus 2's (one each on hoses 0 and 1) while the latter
needs to give each PCI bus a unique monotonically increasing number.
It has been fairly well tested and correctly maps machines with a ppb on
hose 1 as well as machines with ppbs on both hoses.
DS10s remain untested, as I do not have a pci card with a ppb which will
pass POST in a tsunami.
This is a house of cards.
device_add_child_ordered(). 'ivars' may now be set using the
device_set_ivars() function.
This makes it easier for us to change how arbitrary data structures are
associated with a device_t. Eventually we won't be modifying device_t
to add additional pointers for ivars, softc data etc.
Despite my best efforts I've probably forgotten something so let me know
if this breaks anything. I've been running with this change for months
and its been quite involved actually isolating all the changes from
the rest of the local changes in my tree.
Reviewed by: peter, dfr
registering their interrupts with rman as though they were going through
the ISA pic. This prevents a conflict between isa & pci for irqs on such
machines.
Also hookup the chipset struct before calling platform.pci_intr_init().
This allows me to call inw/outw down in the platform code.
Add interrupt printfs to match the CIA chipset.
Reviewed by: dfr
Tested by: wilko
can deal with from 1GB to 2GB. I have no way to test with >1GB because I
don't have high enough density memory to get any one box over 1GB. However, I
have tested it on xp1000 & ds10 with < 1GB of memory & have verified that it
does no harm.
Merge the contents (less some trivial bordering the silly comments)
of <vm/vm_prot.h> and <vm/vm_inherit.h> into <vm/vm.h>. This puts
the #defines for the vm_inherit_t and vm_prot_t types next to their
typedefs.
This paves the road for the commit to follow shortly: change
useracc() to use VM_PROT_{READ|WRITE} rather than B_{READ|WRITE}
as argument.
* Change the hack used on the alpha for mapping devices into DENSE or
BWX memory spaces to a simpler one. Its still a hack and should be
a seperate api to explicitly map the resource.
* Add $FreeBSD$ as necessary.
Rather than teaching pci_ioctl about hoses, we just pass down a magic number
& let the platform code figure out what the hose is based on what the bus
number is.
concept approved by dfr
(behind the built-in ppb on hose 1) to be found:
When testing the adaptec controller on alpha, I realized I misread the xp1000
documentation and the way I'm calculating the bus number for PCI
config space accesses on the tsunami is wrong. I had thought that a bus
behind a ppb should be numbered as the nth bus in that hose, but it
actually needs to be the nth global bus within the system. The bus number
for the primary bus on a hose must always remain 0 when calculating config
space addresses.
space of PCI devices that don't exist cause PCI master & target aborts
rather than returning ~0 or giving a machine check. Bring in some code
from NetBSD to handle this properly.
obtained from: NetBSD
reviewed by: dfr
equivalent to SYS_RES_MEMORY for x86 but for alpha, the rman_get_virtual()
address of the resource is initialised to point into either dense-mapped
or bwx-mapped space respectively, allowing direct memory pointers to be
used to device memory.
Reviewed by: Andrew Gallatin <gallatin@cs.duke.edu>
Compaq XP1000, AlphaServer DS20, AlphaServer DS10, and DP264
This has been tested *only* on XP1000's. I'll be interested to hear from
owners of other types of DEC_ST6600 alphas.
I'd like to thank Don Rice of Compaq for providing the documentation required
to support this platform on FreeBSD. I'd also like to thank Doug Rabson for newbus,
and for helping me get a multiple hoses working with newbus.
Reviewed by: Doug Rabson <dfr@nlsystems.com>
The specific intent of this commit is to pave the way for importing
Compaq XP1000 support. These changes should not affect the i386 port.
Reviewed by: Doug Rabson <dfr@nlsystems.com>
(actually, he walked me through most of it & deserves more than reviewd-by
credit )
Interrupts under the new scheme are managed by the i386 nexus with the
awareness of the resource manager. There is further room for optimizing
the interfaces still. All the users of register_intr()/intr_create()
should be gone, with the exception of pcic and i386/isa/clock.c.
i386 platform boots, it is no longer ISA-centric, and is fully dynamic.
Most old drivers compile and run without modification via 'compatability
shims' to enable a smoother transition. eisa, isapnp and pccard* are
not yet using the new resource manager. Once fully converted, all drivers
will be loadable, including PCI and ISA.
(Some other changes appear to have snuck in, including a port of Soren's
ATA driver to the Alpha. Soren, back this out if you need to.)
This is a checkpoint of work-in-progress, but is quite functional.
The bulk of the work was done over the last few years by Doug Rabson and
Garrett Wollman.
Approved by: core
The new file pci_eb64plus_intr.s deals with the interrupt hardware
on the EB64PLUS and was obtained from NetBSD with the NetBSD
copyright intact
The apecs chipset support code was altered to allow routing interrupts
through pci if we're not running on an avanti. Avanti's route all
interrupts through isa.
Tested by: Wilko Bulte <wilko@yedi.iaf.nl>
Partially reviewed by: dfr
last cleanup. Since the oid_arg2 field of struct sysctl_oid is not wide
enough to hold a long, the SYSCTL_LONG() macro has been modified to only
support exporting long variables by pointer instead of by value.
Reviewed by: bde
for possible buffer overflow problems. Replaced most sprintf()'s
with snprintf(); for others cases, added terminating NUL bytes where
appropriate, replaced constants like "16" with sizeof(), etc.
These changes include several bug fixes, but most changes are for
maintainability's sake. Any instance where it wasn't "immediately
obvious" that a buffer overflow could not occur was made safer.
Reviewed by: Bruce Evans <bde@zeta.org.au>
Reviewed by: Matthew Dillon <dillon@apollo.backplane.com>
Reviewed by: Mike Spengler <mks@networkcs.com>
* Update drivers to the latest version of the bus interface.
The ISA drivers' use of the new resource api is minimal. Garrett has
some much cleaner drivers which should be more easily shared between
i386 and alpha. This has only been tested on cia based machines. It
should work on lca and apecs but I might have broken something.
routines are necessary to allow the use of certain types of hardware on
the alpha, particularly a Myrinet card.
Submitted by: Andrew Gallatin <gallatin@cs.duke.edu>
address for the LCA PCI configuration register address.
FreeBSD/Alpha now boots on the NoName (aka AXPpci 33, Alpha PC), and probably
also on the Multia (mine hasn't arrived yet, so I can't tell for sure).
Submitted by: Doug Rabson <dfr@freebsd.org>
* Support for AlphaStation 200, 250, 255, 400
* Untested support for UDB, Multia, AXPpci33 (Noname)
* Support for Personal Workstation 433a/433au, 500a/500au, 600a/600au (Miata)
* Some minor fixes and improvements to interrupt handling.
Submitted by: Andrew Gallatin <gallatin@cs.duke.edu> (AS200, Miata)
Obtained from: NetBSD (some code for AS200, Miata, Noname)
Sparse macros have moved to <machine/swiz.h>.
Fix sparse memory access so that it actually works as intended.
Tidy up sparse configuration access slightly.
