666 Commits

Author SHA1 Message Date
Andrew Turner
84cac654ae Revert r334035 for now. It breaks the boot on some boards as er expect to
be able to read UEFI RuntimeData memory via the DMAP region.
2018-05-22 15:52:11 +00:00
Andrew Turner
89b5faf887 On ThunderX2 we need to be careful to only map the memory the firmware
lists in the EFI memory map. As such we need to reduce the mappings to
restrict them to not be the full 1G block. For now reduce this to a 2M
block, however this may be further restricted to be 4k page aligned as
other SoCs may require.

This allows ThunderX2 to boot reliably to userspace without performing
any speculative memory accesses to invalid physical memory.

Sponsored by:	DARPA, AFRL
2018-05-22 11:26:41 +00:00
Andrew Turner
9d0728e04e Stop using the DMAP region to map ACPI memory.
On some arm64 boards we need to access memory in ACPI tables that is not
mapped in the DMAP region. To handle this create the needed mappings in
pmap_mapbios in the KVA space.

Submitted by:	Michal Stanek (mst@semihalf.com)
Sponsored by:	Cavium
Differential Revision:	https://reviews.freebsd.org/D15059
2018-05-22 11:16:45 +00:00
Andrew Turner
79402150c1 Switch arm64 to use the same physmem code as 32-bit arm.
The main advantage of this is to allow us to exclude memory from being
used by the kernel. This may be from the memreserve property, or ranges
marked as no-map under the reserved-memory node.

More work is still needed to remove the physmap array. This is still used
for creating the DMAP region, however other patches need to be committed
before we can remove this.

Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
2018-05-22 11:07:04 +00:00
Andrew Turner
78921ae879 Restrict the faulting addresses we call pmap_fault from to just those that
may fault due to superpage mappings being changed.

Sponsored by:	DARPA, AFRL
2018-05-21 16:14:53 +00:00
Mark Johnston
892bdccca0 Enable kernel dump features in GENERIC for most platforms.
This turns on support for kernel dump encryption and compression, and
netdump. arm and mips platforms are omitted for now, since they are more
constrained and don't benefit as much from these features.

Reviewed by:	cem, manu, rgrimes
Tested by:	manu (arm64)
Relnotes:	yes
Differential Revision:	https://reviews.freebsd.org/D15465
2018-05-19 19:53:23 +00:00
Olivier Houchard
a9772d1a0e Instead of ignoring the VFP registers, set the dumppcb's pcb_fpusaved
field, so that they are saved, as they may be used in the kernel, in the
EFI and the crypto code.

Reviewed by:	andrew
2018-05-18 13:28:02 +00:00
Andrew Turner
00454c400e Enable the Qualcomm MSM UART driver. This is needed for some Qualcomm
Snapdragon SoCs.

Obtained from:	ABT Systems Ltd
Sponsored by:	Turing Robotic Industries
2018-05-18 11:32:48 +00:00
Olivier Houchard
8b2ec5a3a1 In pmap_get_tables(), check that the L2 is indeed a table before attempting
to get the l3.
2018-05-17 22:40:22 +00:00
Olivier Houchard
654a792922 In vfp_save_state(), don't bother trying to save the VFP registers if the
provided PCB doesn't have a pcb_fpusaved. All PCBs associated to a thread
should have one, but the dumppcb used when panic'ing doesn't.
2018-05-17 22:38:16 +00:00
Andriy Gapon
c9c4d38aa8 followup to r332730/r332752: set kdb_why to "trap" for fatal traps
This change updates arm, arm64 and mips achitectures.  Additionally, it
removes redundant checks for kdb_active where it already results in
kdb_reenter() and adds kdb_reenter() calls where they were missing.

Some architectures check the return value of kdb_trap(), but some don't.
I haven't changed any of that.

Some trap handling routines have a return code.  I am not sure if I
provided correct ones for returns after kdb_reenter().  kdb_reenter
should never return unless kdb_jmpbufp is NULL for some reason.

Only compile tested for all affected architectures.  There can be bugs
resulting from my poor understanding of architecture specific details.

Reported by:	jhb
Reviewed by:	jhb, eadler
MFC after:	4 weeks
Differential Revision: https://reviews.freebsd.org/D15431
2018-05-16 06:52:08 +00:00
Andrew Turner
25964cd229 Increase the number of pages we allocate in the arm64 early boot. We are
already close to the limit so increasing the kernel size may cause it to
fail to boot when it runs past the end of allocated memory.

Reported by:	manu
Sponsored by:	DARPA, AFRL
2018-05-15 16:44:35 +00:00
Emmanuel Vadot
43fd679efb arm64: Add ALT_BREAK_TO_DEBUGGER to GENERIC
It is useful to enter kdb with an escape sequence.
While here move the USB_DEBUG with the others debug options and define
nooptions USB_DEBUG for GENERIC-NODEBUG
2018-05-10 09:37:50 +00:00
Emmanuel Vadot
08f3f0f953 arm64: rockchip: cru: Call clk_set_assigned
We need to call clk_set_assigned after all the clock have been registered
to set the parents/rates described in the dtb.
2018-05-07 07:31:25 +00:00
Emmanuel Vadot
dff9720331 arm64: rockchip: clk: Add support to reparent to clk_composite
All clk_composite type have the possibility to reparent (choosing another
parent to find a better frequency), add the support for that.
2018-05-07 07:29:48 +00:00
Emmanuel Vadot
66a4c42756 arm64: rk3328: Add pll rates tables
Add the known value to be safe for the rk3328 PLLs
2018-05-07 07:28:47 +00:00
Emmanuel Vadot
78d07c93a7 arm64: rk: Add support for setting pll rate
Add support for setting pll rate. On RockChip SoC two kind of plls are
supported, integer mode and fractional mode.
The two modes are intended to support more frequencies for the core plls.
While here change the recalc method as it appears that the datasheet is
wrong on the calculation method.
2018-05-07 07:28:10 +00:00
Emmanuel Vadot
178f57b143 arm64: rockchip: rk3328: Add armclk clock
Add the clock definition for the arm clock.
While here remove the indexes in the clock table as we will need clock
with a 0 index (non-exported clocks).
2018-05-07 07:26:48 +00:00
Mark Johnston
20f85b1ddd Print the dump progress indicator after calling dump_start().
Dumpers may wish to print messages from an initialization hook; this
change ensures that such messages aren't mixed with output from the
generic dump code.

MFC after:	1 week
2018-05-01 17:32:43 +00:00
Emmanuel Vadot
590a3c9619 arm64: rockchip: rk_gpio fix rk_gpio_pin_config32
Pointy Hat to:	 me
2018-04-26 22:15:09 +00:00
Emmanuel Vadot
cbf65cf228 arm64: rockchip: Add gpio controller driver
Add a driver that match on 'rockchip,gpio-bank', this compatible
string is found on almost all RockChip SoC so this driver is compatible
with almost all of the RockChip SoCs.

The only features missing for this driver are :
- Interrupts support
- Debouncing
2018-04-26 21:44:00 +00:00
Emmanuel Vadot
d40a1b91c0 arm64: rockchip: RK3328 CRU Add gpio gates
Add the gates for the gpio controller in order to properly support them.
2018-04-26 21:40:05 +00:00
Emmanuel Vadot
a59a485e79 arm64: rockchip: Rk3328 CRU Fix some offset for gates
Some offset of some clock gates where wrong, correct them so we can
use thoses clocks.

Pointy Hat to:	me
2018-04-26 21:38:59 +00:00
Emmanuel Vadot
be2e72c286 arm64: rockchip: Add pinctrl driver
Add pinctrl driver for RockChip SoCs. This device manage which function
to set on which pin and some other properties like pull up/down, drive
strength etc ...
For now the driver only support RK3328 but it is versatile enough to
add support for other RockChip SoC in the future.
2018-04-26 21:37:38 +00:00
Emmanuel Vadot
49755fc6d2 arm64: rockchip: Add GRF driver
RockChip GRF (General Register Files) is present on almost all RockChip
SoC and is used to control some area of the system like iomuxing, gpio
or usb phy.
We need it to be probed and attached early in the boot process so
subclass syscon_generic and set the pass to BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE.
2018-04-26 21:35:04 +00:00
Ed Maste
5f2336efb4 arm64 linuxulator: add generated sysent files
From syscalls.master in r333027

Sponsored by:	Turing Robotic Industries Inc.
2018-04-26 18:46:38 +00:00
Ed Maste
2464626e2c Add arm64 Linux syscall table
This is the first step (after the recent refactoring of some common
code) to supporting the Linuxulator on arm64.

Reviewed by:	andrew
Sponsored by:	Turing Robotic Industries Inc.
Differential Revision:	https://reviews.freebsd.org/D15187
2018-04-26 18:38:59 +00:00
Brooks Davis
9c11d8d483 Remove the unused fuwintr() and suiwintr() functions.
Half of implementations always failed (returned (-1)) and they were
previously used in only one place.

Reviewed by:	kib, andrew
Obtained from:	CheriBSD
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D15102
2018-04-17 18:04:28 +00:00
Ruslan Bukin
5819c3eb8a Enable Qualcomm Debug Subsystem (QDSS) block on MSM8916 SoC.
This is required for ARM Coresight operation on Dragonboard 410c.

Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D14987
2018-04-10 12:53:48 +00:00
Oleksandr Tymoshenko
b7dc17589b Fix one more OF_getprop_alloc instance missed in r332310
X-MFC-With:	r332310
2018-04-08 23:17:51 +00:00
Brooks Davis
6469bdcdb6 Move most of the contents of opt_compat.h to opt_global.h.
opt_compat.h is mentioned in nearly 180 files. In-progress network
driver compabibility improvements may add over 100 more so this is
closer to "just about everywhere" than "only some files" per the
guidance in sys/conf/options.

Keep COMPAT_LINUX32 in opt_compat.h as it is confined to a subset of
sys/compat/linux/*.c.  A fake _COMPAT_LINUX option ensure opt_compat.h
is created on all architectures.

Move COMPAT_LINUXKPI to opt_dontuse.h as it is only used to control the
set of compiled files.

Reviewed by:	kib, cem, jhb, jtl
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D14941
2018-04-06 17:35:35 +00:00
Ruslan Bukin
b09de0b34a Add support for the Coresight technology from ARM Ltd.
ARM Coresight is a solution for debug and trace of complex SoC designs.

This includes a collection of drivers for ARM Coresight interconnect
devices within a small Coresight framework.

Supported devices are:
o Embedded Trace Macrocell v4 (ETMv4)
o Funnel
o Dynamic Replicator
o Trace Memory Controller (TMC)
o CPU debug module

Devices are connected to each other internally in SoC and the
configuration of each device endpoints is described in FDT.

Typical trace flow (as found on Qualcomm Snapdragon 410e):
CPU0 -> ETM0 -> funnel1 -> funnel0 -> ETF -> replicator -> ETR -> DRAM
CPU1 -> ETM1 -^
CPU2 -> ETM2 -^
CPU3 -> ETM3 -^

Note that both Embedded Trace FIFO (ETF) and Embedded Trace Router (ETR)
are hardware configurations of TMC.

This is required for upcoming HWPMC tracing support.

This is tested on single-core system only.

Reviewed by:	andrew (partially)
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D14618
2018-04-05 15:45:54 +00:00
Oleksandr Tymoshenko
de14bffe33 Fix arm64 buildkernel target with "nooptions KDB"
Make kdb_trap in breakpoint exception handler conditional. If "options KDB"
is not present just panic with message that debugger is not enabled.

PR:		224653
2018-04-04 01:13:28 +00:00
Ed Maste
fc2a8776a2 Rename assym.s to assym.inc
assym is only to be included by other .s files, and should never
actually be assembled by itself.

Reviewed by:	imp, bdrewery (earlier)
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D14180
2018-03-20 17:58:51 +00:00
Kyle Evans
63ee68c220 EFIRT: SetVirtualAddressMap with 1:1 mapping after exiting boot services
This fixes a problem encountered on the Lenovo Thinkpad X220/Yoga 11e where
runtime services would try to inexplicably jump to other parts of memory
where it shouldn't be when attempting to enumerate EFI vars, causing a
panic.

The virtual mapping is enabled by default and can be disabled by setting
efi_disable_vmap in loader.conf(5).

Reviewed by:	kib (earlier version)
MFC after:	3 weeks
Differential Revision:	https://reviews.freebsd.org/D14677
2018-03-13 17:10:52 +00:00
Andrew Turner
e150585e9e Use the correct address to write back to memory in the GICv3 ITS driver.
This seems to no be needed on supported hardware as they are cache-coherent,
however this may not be the case on all platforms.

Sponsored by:	DARPA, AFRL
2018-03-09 10:34:44 +00:00
Andrew Turner
fd5b330b19 Bump MAXCPUS on arm64. We are starting to see hardware with more than 96
cores so increase it to the same as amd64.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-03-07 13:54:44 +00:00
Andrew Turner
e0fe10600a Create macros for the ACPI interrupt cross references. This is considered a
band aid until a better solution to find the correct interrupt controller
can be found.

While here fix one place in the GICv3 ITS driver where the offset wasn't
correctly applied.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-03-07 13:16:03 +00:00
Andrew Turner
0f71fc4fc4 Restrict the arm64 DMAP region to the 1G blocks where we have at least
one physical page. This is in preparation for limiting it further as this
is needed on some hardware, however testing has shown issues with further
restricting the DMAP and ACPI.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-03-07 09:58:36 +00:00
Andrew Turner
a29169fda3 Register each GICv3 ITS driver with a useful cross reference. We currently
only use the first driver, however this may change in the future and
hardware exists with multiple ITS devices.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-03-05 10:11:30 +00:00
Andrew Turner
c5691e5922 In the ACPI GICv3 attach function call device_get_children to get the list
of children. We expect this to be populated when configuring the secondary
cores.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-03-05 10:09:18 +00:00
Konstantin Belousov
8c8ee2ee1c Unify bulk free operations in several pmaps.
Submitted by:	Yoshihiro Ota
Reviewed by:	markj
MFC after:	2 weeks
Differential revision:	https://reviews.freebsd.org/D13485
2018-03-04 20:53:20 +00:00
Andrew Turner
b53ff85eb2 Move setting the IRQ base and length into the common GICv3 ITS attach
function. This is common across both ACPI and FDT.

Sponsored by:	ABT Systems Ltd
Sponsored by:	Cavium (Hardware)
2018-03-03 13:20:44 +00:00
Andrew Turner
490ae78090 Add the missing GICv3 dev info struct to the ACPI dev info.Previously we
would read from the resource list when querying from this.

Sponsored by:	ABT Systems Ltd
Sponsored by:	Cavium (Hardware)
2018-03-03 13:19:08 +00:00
Andrew Turner
6d9e17fc83 Count the number of children in the GICv3 ACPI attachment. This is needed
later for assigning IRQ vector space.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-03-02 13:04:21 +00:00
Andrew Turner
e9c0572e4c Allow releasing APs to take more time, as long as we are making progress.
On large core count machines this can be slow while all the CPUs update
the online counter.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-02-28 16:03:40 +00:00
Andrew Turner
cf0afdaab6 Count the number of GIC redistributors in the ACPI tables. The GICv3 driver
needs this to allocate memory, and connect the CPUs to the interrupt
controller.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
2018-02-28 15:25:47 +00:00
Emmanuel Vadot
925ee294ea rk_cru: Add missing break 2018-02-26 22:57:52 +00:00
Emmanuel Vadot
2a3d5e3364 rk3328: Add support for this SoC
* rk_cru is a cru driver that needs to be subclassed by
  the real CRU driver
* rk_clk_pll handle the pll type clock on RockChip SoC, it's only read
  only for now.
* rk_clk_composite handle the different composite clock types (with gate,
  with mux etc ...)
* rk_clk_gate handle the RockChip gates
* rk_clk_mux handle the RockChip muxes (unused for now)
* Only clocks for supported devices are supported for now, the rest will be
  added when driver support comes
* The assigned-clock* property are not handled for now so we rely a lot on the
  bootloader to setup some initial values for some clocks.
2018-02-26 21:25:50 +00:00
Olivier Houchard
ed8bce2cd5 In do_ast, make sure the interrupts are enabled before calling ast().
We can reach that point with IRQs disabled, and calling ast() with IRQs 
disabled can lead to a deadlock.
This should fix the freezes on arm64 under load.

Reviewed by:	andrew
2018-02-26 13:12:51 +00:00