Commit Graph

273 Commits

Author SHA1 Message Date
Emmanuel Vadot
fd8516cc05 allwinner: A31: Add ccung driver
This adds clocks support for the aw_ccung on the A31 SoC.
Newer DTS files require this.
All the clocks except two CSI are defined and exported on the clock domain.
2017-02-28 15:44:21 +00:00
Emmanuel Vadot
b78b8251c9 allwinner: nkmp: Add MUX capability
Some NKMP clocks have a mux options.
Add the capability to aw_clk_nkmp.
2017-02-28 15:11:33 +00:00
Emmanuel Vadot
511d4e58f3 allwinner: NKMP clock: add update bit
The PLL_DDR clock have an update bit which need to be set after changing
the value, add the possibility to define one for NKMP clocks.

This allow us to add the missing clocks.
We now have the full list of clocks created under the clock domain.
2017-02-28 11:38:11 +00:00
Emmanuel Vadot
7a5603c04a allwinner: NM clock: Add value for fixed factor.
The register func for aw_clk_nm didn't copy the value needed for the fixed
factor, resulting in all fixed factor not working on NM clocks.
2017-02-28 11:05:45 +00:00
Emmanuel Vadot
25d9f6e859 allwinner: Correct some clocks name for H3 CCU. 2017-02-27 17:12:17 +00:00
Emmanuel Vadot
a5ae21c50d allwinner: Order clocks by offset rather than by type for H3 ccu.
Also add a few more supported gates and add comments for which clocks
are missing.
2017-02-27 11:10:36 +00:00
Emmanuel Vadot
d7e3f295fa allwinner: Add support for lock and fractional mode on NM clock
Some PLL have a fractional mode and a lock bit.
Add support for it on the NM clock and export the clocks in the clkdom.
2017-02-27 08:58:27 +00:00
Emmanuel Vadot
f5d1d20574 Add clkng driver for Allwinner SoC
Since Linux 4.9-4.10 DTS doesn't have clocks under /clocks but only a ccu node.
Currently only H3 is supported with almost the same state as HEAD.
(video pll aren't supported for now but we don't support video).
This driver and clocks will also be used for other SoC (A64, A31, H5, H2 etc ...)

Reviewed by:	jmcneill
Differential Revision:	https://reviews.freebsd.org/D9517
2017-02-26 16:00:20 +00:00
Emmanuel Vadot
58256cf76e Rename timer.c to a10_timer.c
Requested by: andrew
2017-02-07 19:28:32 +00:00
Michal Meloun
93a065e749 Remake support for SMP kernel on UP cpu:
- Use new option SMP_ON_UP instead of (mis)using specific CPU type.
   By this, any SMP kernel can be compiled with SMP_ON_UP support.
 - Enable runtime detection of CPU multiprocessor extensions only
   if SMP_ON_UP option is used. In other cases (pure SMP or UP),
   statically compile only required variant.
 - Don't leak multiprocessor instructions to UP kernel.
 - Correctly handle data cache write back to point of unification.
   DCCMVAU is supported on all armv7 cpus.
 - For SMP_ON_UP kernels, detect proper TTB flags on runtime.

Differential Revision: https://reviews.freebsd.org/D9133
2017-02-02 06:14:44 +00:00
Emmanuel Vadot
cf72965fbf Allwinner: Add A33 support
Add basic support for A33/R16 that is enough to boot a kernel.
This adds the platform code, padconf data and the new clocks strings.

MFC after:	2 weeks
2017-01-04 03:35:39 +00:00
Emmanuel Vadot
338af8a097 Allwinner clk: factor M for mod clock is 4 bits, not 5
MFC after:	1 week
2016-12-22 15:01:06 +00:00
Jared McNeill
06785ff66a Split the DesignWare HDMI-specific code from imx6_hdmi.c into a separate
file and add a generic DT binding that takes advantage of the extres
framework for setting up clocks.

Reviewed by:		gonzo
Differential Revision:	https://reviews.freebsd.org/D8826
2016-12-20 01:34:29 +00:00
Emmanuel Vadot
1e64280173 Honor the CLK_SET_DRYRUN for the *set_freq function for allwinner clocks.
Reviewed by:	jmcneill
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D8821
2016-12-16 21:58:48 +00:00
Andrew Turner
6c925b9c81 All armv6 platforms have the same implementation of platform_lastaddr.
Replace them with a default handler that returns devmap_lastaddr.

Reviewed by:	mmel
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D8806
2016-12-16 10:31:13 +00:00
Emmanuel Vadot
74b66ae149 Fix building arm64 kernel after r310117
Pointy hat: me

MFC after:	3 days
2016-12-15 17:26:16 +00:00
Emmanuel Vadot
15b2342cf3 Add information about interrupts in the Allwinner padconf files and
correct some pin numbering.

While here switch to my freebsd mail address in the copyright.

MFC after:	3 days
2016-12-15 15:52:13 +00:00
Emmanuel Vadot
2b0f0faeb6 Add new compatible string "allwinner,sun7i-a20-mmc".
New upstream DTS is using this now for A20 SoC.

MFC after:	3 days
2016-12-14 15:00:24 +00:00
Andrew Turner
ba9f40ca3b Use the platform_*_t typedefs to help check the platform function types are
correct.

Sponsored by:	ABT Systems Ltd
2016-12-13 13:46:09 +00:00
Andrew Turner
59249a516a Add the missing void to function signatures in much of the arm code.
Sponsored by:	ABT Systems Ltd
2016-12-13 13:43:22 +00:00
Emmanuel Vadot
def44246f2 PLL3 have a fractional mode where an explicit frequency (297Mhz or 270)
can be selected for it. If the desired frequency is one of those two, use
this mode instead of the integer one.
When calculating the PLL3 freq for the dotclock, check if it is a multiple
of the fracional frequencies.

MFC after:	2 weeks
2016-11-26 10:36:48 +00:00
Emmanuel Vadot
49ba3f32c8 Enable the SCL and SDA i2c line for DDC.
This is an undocumented register that we need to set if we do not want to
rely on u-boot or other bootloader.
2016-11-24 01:24:26 +00:00
Emmanuel Vadot
183a6b3de6 Test that the emac device is enabled in probe function
MFC after:	3 days
2016-11-23 18:07:44 +00:00
Emmanuel Vadot
5e2be2f660 Do not attempt to disable/release clock if it had not been enabled.
While here fix a style(9) issue.

MFC after:	1 week
2016-11-23 01:44:28 +00:00
Jared McNeill
0a30b4b2a5 On H3, initialize alarm and shutdown trip points and do temperature
conversion as it is done in the BSP.
2016-11-19 14:56:22 +00:00
Jared McNeill
ce4e4d612b On command error, reset only DMA and FIFO engines instead of the entire
controller. Fixes eMMC device detection on OrangePi Plus 2e (and likely
others).
2016-11-15 23:48:30 +00:00
Jared McNeill
02b2e3c5fb Allow the MMC frequency to be set up to 52MHz for MMC high speed timings. 2016-11-15 23:46:01 +00:00
Emmanuel Vadot
51503e707b Upstream DTS provides PLL3 and PLL7 nodes (and their x2 form),
so remove them from our DTS and adapt the code to handle them correctly.
This fix HDMI video on A20.
2016-11-15 07:08:33 +00:00
Andrew Turner
222102cfca Move including fdt_pinctrl.h after openfirm.h to get th edefinition of
phandle_t and remove the need for including fdt_common.h.

Sponsored by:	ABT Systems Ltd
2016-11-14 11:52:22 +00:00
Andrew Turner
df7675353e Stop including fdt_common.h from the arm code when it's unneeded.
Sponsored by:	ABT Systems Ltd
2016-11-14 11:41:22 +00:00
Andrew Turner
87acb7f815 Use the modern spelling of ofw_bus_node_is_compatible in sys/arm.
Sponsored by:	ABT Systems Ltd
2016-11-11 15:13:30 +00:00
Andrew Turner
feabce61dc Start to remove the old pre-INTRNG code from the arm platforms. These have
all moved to use INTRNG.

Reviewed by:	manu, mmel
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D8469
2016-11-08 12:15:57 +00:00
Emmanuel Vadot
328dd395ba Do not fail to attach the clock if we cannot set the assigned parents as this
property isn't mandatory.

MFC after:	2 weeks
2016-11-08 10:06:43 +00:00
Emmanuel Vadot
6988dd5e61 Add support for AXP221 Power Management Unit.
AXP221 is used on board with A31/A31S and is mostly compatible with AXP209.
Regulators, GPIO and Sensors are supported.

MFC after:	2 weeks
2016-11-04 20:02:52 +00:00
Emmanuel Vadot
73e62e8c5c Fix r308306 by spelling variable correctly. 2016-11-04 19:23:52 +00:00
Emmanuel Vadot
1ca819f642 Set rst_apb to NULL to avoid panic when release. 2016-11-04 19:21:11 +00:00
Emmanuel Vadot
e3454ae8b3 For AHB clock we need to set the assigned parents for cpufreq(4) to work.
MFC after:	2 weeks
2016-11-04 17:13:47 +00:00
Jared McNeill
16025c357f Add support for Allwinner H3 audio codec.
The audio controller in the H3 is more or less the same as A10/A20 except
some registers are shuffled around. The mixer interface, however, is
completely different between SoCs. Separate a10_mixer_class and
h3_mixer_class implementations are now made available. This will also make
adding support for other SoCs easier in the future.

Reviewed by:		andrew, ganbold
Relnotes:		yes
Differential Revision:	https://reviews.freebsd.org/D8425
2016-11-03 23:22:04 +00:00
Jared McNeill
e1ca1a284c Add support for the integrated DMA controller found in the Allwinner A31,
A64, A83T, and H3 SoCs.

Relnotes:	yes
2016-11-02 23:58:10 +00:00
Jared McNeill
ddfb3d5aa7 Register the device's xref handle at attach time. 2016-11-02 23:53:47 +00:00
Jared McNeill
5f7cfb6035 Add support for H3 PLL2 (PLL_Audio). 2016-11-02 23:49:57 +00:00
Jared McNeill
8c07f7653a The DTS may report fewer than 4 parents for a module clock. Avoid setting
the module clock parent to an out-of-range index in these cases.
2016-11-02 23:46:23 +00:00
Jared McNeill
bd95d8610a Fix H3 temperature reporting. The formula in for V1.0 of the H3 datasheet
seems to be incorrect, so use the same method of conversion as the H3 BSP
instead.
2016-10-30 14:39:33 +00:00
Ganbold Tsagaankhuu
a6e9118bf4 Add support for Allwinner Consumer IR interface.
RX is supported now and the driver is using evdev framework.
It was tested on Cubieboard2 (A20 SoC) using lirc
with dfrobot's IR remote controller.
2016-10-27 04:26:33 +00:00
Andrew Turner
f1ae17fb50 Use the new fdt_intr.h constants in the Allwinner NMI driver.
Sponsored by:	DARPA, AFRL
2016-10-26 16:03:26 +00:00
Andrew Turner
87e1355ba5 Define the Allwinner PLL FDT constants in the file that uses them rather
than including a file from under sys/gnu.

Sponsored by:	DARPA, AFRL
2016-10-26 14:09:30 +00:00
Emmanuel Vadot
1535414c25 The only consumer of pll1 is the CPU clock, we don't need to set it glitch free.
Reported by:	jmcneill
MFC after:	1 week
2016-10-26 08:47:35 +00:00
Emmanuel Vadot
6a9f23793d allwinner A10 Pll1 allow changing freq
PLL1 is used by the cpu core, allowing changing freq is needed for cpufreq.
The factors table contains all the frequencies in the operating point table
present in the DTS.

MFC after:	1 week
2016-10-25 15:21:08 +00:00
Jared McNeill
2e4f934752 Defer cpufreq updates from intr handler to the taskqueue_thread queue. 2016-10-24 22:35:12 +00:00
Emmanuel Vadot
cd2b868b5d allwinner: Add support for P2WI in RSB driver
Push-Pull Two Wire interface is a almost compatible iic like bus used
in sun6i SoC. It's only use is to communicate with the power management IC.

Reviewed by:	jmcneill
MFC after:	1 week
Relnotes:	yes
2016-10-24 20:33:42 +00:00