- Modify the driver to poll the link state and positively set the
MAC to full or half duplex as needed. Previously, it was possible
for the MAC to remain in half duplex even though the PHY had negotiated
full duplex with its link partner, which would result in bursty
performance.
- Program some of the NatSemi's registers as specified by the datasheet.
The manual says these are necessary for "optimum perofrmance," though
a couple of them are marked as reserved in the register map. *shrug*
- Select the TX DMA burst size correctly for 10 and 100mbps modes.
Previously I was using 64 bytes in both modes, which worked in
100mbps mode, but resulting in spotty performance in 10mbps.
32 bytes works much better; without this change, the natsemi
chip yields piss poor performance at 10mbps.
With these fixes, the NatSemi chip finally performs to my satisfaction.
I should be merging the support for this controller into -stable shortly.
Phew.
controller chip. This chip is currently being used on the NetGear
FA312-TX adapter, which I guess is a replacement for the FA310-TX
(PNIC-based).
I added support for this chip by modifying the sis driver since
the SiS 900 and the NS DP83815 have almost the same programming
interface (the RX filter programming and PHY access methods are
different, but the general configuration, DMA scheme and register
layout are identical).
I would have had this done a lot sooner, but getting the damn MAC
address out of the EEPROM proved to be more complicated than expected.
SiS 900 and SiS 7016 PCI fast ethernet chipsets. Full manuals for the
SiS chips can be found at www.sis.com.tw.
This is a fairly simple chipset. The receiver uses a 128-bit multicast
hash table and single perfect entry for the station address. Transmit and
receive DMA and FIFO thresholds are easily tuneable. Documentation is
pretty decent and performance is not bad, even on my crufty 486. This
driver uses newbus and miibus and is supported on both the i386 and
alpha architectures.
