- Just grab Giant in the ixp425_iic(4) driver since this driver uses
a shared address/data register window pair to access the actual
I2C registers. None of the other ixp425 drivers lock access to these
shared address/data registers yet and that would need to be done before
this could use any meaningful locking.
- Add locking to the interrupt handler and 'iicbus_reset' methods of the
at91_twi(4) driver.
- Add locking to the pcf(4) driver. Other pcf(4) fixes include:
- Don't needlessly zero the softc.
- Use bus_foo rather than bus_space_foo and remove bus space tag and
handle from softc.
- The lpbb(4) driver just grabs Giant for now. This will be refined later
when ppbus(4) is locked.
- As was done with smbus earlier, move the DRIVER_MODULE() lines to match
the bus driver (either iicbus or iicbb) to the bridge driver into the
bridge drivers.
Tested by: sam (arm/ixp425)
- Add a mutex to the softc to protect the softc and device hardware.
- Use a private timer routine to drive the transmit watchdog timer instead
of using if_watchdog/if_timer.
- If if_alloc() fails during attach, fail the attach with an error rather
than panic'ing.
- Clear RUNNING and OACTIVE only in sncstop().
- Don't mess with IFF_UP.
- Don't leak 'struct ifnet' on detach.
- Setup interrupt handler after ether_ifattach().
- Call ether_ifdetach() rather than if_detach() in the pccard detach
routine.
Tested by: no one despite repeated requests
PZERO + 1. The sleeping process at the priority <= PZERO is counted as
blocked, or, as comment states, 'disk wait'. PZERO + 1 works as well,
and does not cause user confusion.
Reported by: sam <samflanker at gmail com>
MFC after: 1 week
watchdog timeout issues and the root cause seems to stem from
silicon bug of controller. Personally I couldn't reproduce it on
RTL8169 controller but it seems it's dependent on usage pattern.
For newer PCIe based controllers I have no TSO complaints but
turning off TSO would be more safe. Users who are sure that
their controller works with TSO can still reenable the TSO with
ifconfig(8).
Reported by: Oliver Lehmann (lehmann at ans-netz dot de), Eugene Butusov (ebutusov at gmail dot com)
11bits. This limits the maximum interface MTU size in TSO case
as upper stack should not generate TCP segments with MSS greater
than the limit. Armed with this information, disable TSO if
interface MTU is greater than the limit.
code interfered with Performant mode and legacy interrupts. Also
remove a register read operation on the Simplq code that was
effectively a time-wasting no-op.
proved to be necessary to make the static drivers work
in EITHER/OR or BOTH configurations. Modules will still
build in sys/modules/igb or em as before.
This also updates the igb driver for support for the 82576
adapter, adds shared code fixes, and etc....
MFC after: ASAP
revision and (on Prism cards) the primary firmware revision via
sysctl. Move the printing of this information under bootverbose,
since it is relatively easy to get to it now.
the beginning. There's a race in the shared interrutp case. If
another interrupt happens after the interrupt is setup, then we'd try
to lock an uninitialized mutex. In addition, if we bailed out due to
a too old version of firmware, we'd leave the interrupt enabled with
all the fun that ensues....
The kbd, kbdmux, ugen and uhid drivers included <sys/tty.h>, because
they needed clists, which have been moved to <sys/clist.h> some time
ago. In the MPSAFE TTY branch, <sys/tty.h> does not include
<sys/clist.h>, which means we have to teach these drivers to include
this header file directly.
Approved by: philip (mentor, implicit)
behavior. Specifically, probe Host-PCI bridges in the order they are
encountered in the tree. For CPUs, just use an order of 100000 and assume
that no Host-PCI bridges will be more than 10000 levels deep in the
namespace. This fixes an issue on some boxes where the HPET timer stopped
attaching.
used but MSI to HyperTransport IRQ mapping is enabled, and would act as
if MSI is turned on, resulting in interrupt loss.
This commit will,
1. enable MSI mapping on a device only when MSI is enabled for that
device and the MSI address matches the HT mapping window.
2. enable MSI mapping on a bridge only when a downstream device is
allocated an MSI address in the mapping window
PR: kern/118842
Reviewed by: jhb
MFC after: 1 week
kthread of the mpt(4) driver that hangs around for the entire lifetime of
the thread. Previously the driver would allocate a new CCB using M_WAITOK
with a lock held each time it updated its state. While here, use the
CAM API for allocating a CCB rather than raw malloc(9).
Reviewed by: scottl
MFC after: 1 week
