Randall Stewart
49cd7d2cf3
Cooresponding hack to pass in the irq
2009-11-09 16:43:50 +00:00
Randall Stewart
4c01ca5a19
White space changes.
2009-11-09 16:43:02 +00:00
Randall Stewart
e20f0d885e
- Comment out recrusive call to setup interrupt.
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- Change the way we pass the irq.
2009-11-09 16:42:08 +00:00
Oleksandr Tymoshenko
619ddb52b5
- Add arge1 to hints files, only one port is supported so far
2009-11-08 07:31:42 +00:00
Oleksandr Tymoshenko
bec244c750
- Access to all 5 PHYs goes through registers in MAC0 memory
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space, rewrite miibus accessors respectively
2009-11-08 07:26:02 +00:00
Oleksandr Tymoshenko
40a554d7ac
- Fix: Wrong register is used for initial value reading
2009-11-06 21:53:38 +00:00
Randall Stewart
eac3c4cd27
Ok With this commit we actually get through
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the mi_startup (or to the last of it).. and
hit a panic after :
uart0: <16550 or compatible> on iodi0
Trap cause = 2 (TLB miss....)
I did have to take the pci bus OUT of the
build to get this far, hit a cache error with
the PCI code in. Interesting thing is the machine
reboots too ;-)
2009-11-06 12:52:51 +00:00
Oleksandr Tymoshenko
6450bdc708
- Fix initialization of PLL registers (different shifts for
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arge0/arge1)
- Use base MAC address to generate MACs for arge1 and above
2009-11-06 06:50:45 +00:00
Randall Stewart
798abe2fe1
For XLR adds extern for its bus space routines
2009-11-05 18:15:47 +00:00
Randall Stewart
a856badbb2
white space changes
2009-11-05 18:15:16 +00:00
Randall Stewart
7a7f91f61b
ok we now get so that the uart init's and we can print. We
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cannot set baud rate as they did in 6.4, this hoses things and
we loose our 38400 default term.
We now lock somewhere in tcinit.
2009-11-05 18:14:25 +00:00
Oleksandr Tymoshenko
d6994d3b0e
- Replace dumb cut'n'paste call with not to self (XXX)
2009-11-05 03:54:03 +00:00
Oleksandr Tymoshenko
896ef84ff0
- style(9): replace whitespaces with tabs
2009-11-04 23:34:58 +00:00
Oleksandr Tymoshenko
a0d684a583
- Remove noisy "Implement me" stubs
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- Handle SIOCSIFFLAGS ioctl
2009-11-04 23:33:36 +00:00
Oleksandr Tymoshenko
3682174ee5
- Handle errors when adding children to nexus. This sittuation
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might occure when there is dublicate of child's entry in hints
2009-11-03 06:42:55 +00:00
Randall Stewart
45ab86915b
adds XLR config
2009-11-02 15:43:54 +00:00
Randall Stewart
037a5859a0
Fix spacing
2009-11-02 15:08:59 +00:00
Randall Stewart
83b16fcf66
Fix header file location
2009-11-02 15:08:33 +00:00
Randall Stewart
8fae280afb
With this commit our friend RMI will now compile. I have
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not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
making it run ;-)
2009-10-30 08:53:11 +00:00
Randall Stewart
aa40b001c3
This is a temporary hack so we can get RMI to re-use the
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ns8250 code. We will need to think of a better way for
code reuse for this (see sys/mips/rmi/uart_cpu_mips_xlr.c for where
it is used)
2009-10-30 08:51:37 +00:00
Oleksandr Tymoshenko
12dfccb876
- Fix build with DEVICE_POLLING enabled
2009-10-30 01:40:32 +00:00
Warner Losh
87d11f28e2
Add some newer MIPS CO cores.
2009-10-30 00:37:50 +00:00
Warner Losh
485619feed
db_expr_t is really closer to a register_t.
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Submitted by: bde@
2009-10-30 00:37:04 +00:00
Randall Stewart
748ad3c4ee
adds rmi specific mips extensions file and makes sure
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the includes point to the new place.
2009-10-29 21:30:21 +00:00
Randall Stewart
733a780709
white space changes
2009-10-29 21:23:44 +00:00
Randall Stewart
ebe8d22e40
white space changes
2009-10-29 21:21:01 +00:00
Randall Stewart
f40c80b188
White space changes
2009-10-29 21:14:10 +00:00
Randall Stewart
1b4a3a93ea
updates to rge to get it to compile
2009-10-29 15:55:58 +00:00
Randall Stewart
6e3272ee6f
more Updates on the RMI code close to compiling now ;-)
2009-10-29 15:55:25 +00:00
Neel Natu
131ec9efd8
Deal with overflow of the COUNT register correctly. The 'cycles_per_hz'
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has nothing to do with the rollover.
Approved by: imp (mentor)
2009-10-29 05:18:02 +00:00
Andrew Thompson
64ec125306
Fix build from r198563 (again). Sigh.
2009-10-28 21:41:23 +00:00
Andrew Thompson
394bd883ea
Fix build from r198563
2009-10-28 21:39:33 +00:00
Andrew Thompson
d1c3ac3a7a
Use init_static_kenv() and setenv() to simplify the environment string handling.
2009-10-28 21:36:46 +00:00
Andrew Thompson
3c2330f2e4
Parse and save the command line passed in from RedBoot (exec -c "xxx") and also
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the board specific environment variables.
This is not ar71xx specific and should be shared better.
2009-10-28 21:27:56 +00:00
Andrew Thompson
ed7d70c2bb
Allow a scratch buffer to be set in order to be able to use setenv() while
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booting, before dynamic kenv is running. A few platforms implement their own
scratch+sprintf handling to save data from the boot environment.
2009-10-28 21:25:22 +00:00
Warner Losh
5919fef7ac
Remove useless for statement. i isn't used after it.
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Remove needless braces.
2009-10-28 17:03:20 +00:00
Oleksandr Tymoshenko
1453f4e112
- Fix busdma sync: dcache invalidation operates on cache line aligned
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addresses and could modify areas of memory that share the same cache
line at the beginning and at the ending of the buffer. In order to
prevent a data loss we save these chunks in temporary buffer before
invalidation and restore them afer it.
Idea suggested by: cognet
2009-10-28 03:34:05 +00:00
Oleksandr Tymoshenko
0ffd7b6759
- Remove bunch of declared but not defined cach-related variables
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- Add mips_picache_linesize and mips_pdcache_linesize variables
2009-10-28 00:01:20 +00:00
Oleksandr Tymoshenko
7e60d1a36c
- Replace stubs with actual cache info
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- minor style(9) fix
2009-10-27 23:45:48 +00:00
Randall Stewart
ee09312370
White space changes.
2009-10-26 11:00:37 +00:00
Randall Stewart
8ab98910b4
Fix Copyright ;-)
2009-10-26 10:59:55 +00:00
Andrew Thompson
c64429e2b5
If the FIS entry is smaller than the sector size then set it as hot so g_slice
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calls us to fix it, we then issue a read for a full sector and then copy in/out
the payload. This will happen if Redboot is compiled with
CYGSEM_REDBOOT_FLASH_COMBINED_FIS_AND_CONFIG.
2009-10-25 19:13:39 +00:00
Oleksandr Tymoshenko
c3655ab0d0
- Add write support for mx25l flash chip
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- Some minor style(9) fixes
2009-10-25 08:43:38 +00:00
Neel Natu
abd74e0c14
Remove redundant instructions from tlb.S
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The "_MTC0 v0, COP_0_TLB_HI" is actually incorrect because v0 has not been
initialized at that point. It worked correctly because we subsequently
did the right thing and initialized TLB_HI correctly.
The "li v0, MIPS_KSEG0_START" is redundant because we do exactly the same
thing 2 instructions down.
Approved by: imp (mentor)
2009-10-22 04:35:32 +00:00
Neel Natu
24c8d4c173
Get rid of the hardcoded constants to define cacheable memory:
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SDRAM_ADDR_START, SDRAM_ADDR_END and SDRAM_MEM_SIZE
Instead we now keep a copy of the memory regions enumerated by
platform-specific code and use that to determine whether an address
is cacheable or not.
Approved by: imp (mentor)
2009-10-22 02:51:31 +00:00
Oleksandr Tymoshenko
1a71736fb1
- Keep recovering from "MFC went wrong". Add missing ieee80211_* parts,
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mergeinfo is already in place
2009-10-21 20:33:50 +00:00
Neel Natu
561f0b80b1
Update options.mips to support config options required to build the SWARM
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kernel.
The SWARM kernel does not build yet but at least it gets past the kernel
config stage.
Approved by: imp (mentor)
2009-10-21 00:56:13 +00:00
Oleksandr Tymoshenko
55173ef287
- Commit missing part of "bt" fix: store PC register in pcb_context struct
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in cpu_switch and use it in stack_trace function later. pcb_regs contains
state of the process stored by exception handler and therefor is not
valid for sleeping processes.
2009-10-20 23:13:08 +00:00
Neel Natu
344214e344
Fix a bug where we would think that the L1 instruction and data cache are
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present even though the line size field in the CP0 Config1 register is 0.
Approved by: imp (mentor)
2009-10-20 04:36:08 +00:00
Neel Natu
d428afbbbb
The default KERNLOADADDR does not work on MALTA hardware. On my platform the
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"First free SDRAM address" reported by YAMON is 0x800b6e61.
So use a conservative KERNLOADADDR of 0x80100000.
Approved by: imp (mentor)
2009-10-20 04:31:20 +00:00