initiator iSCSI offload. Pass maximum data segment size supported by
chosen offload module to iscsid(8), and make iscsid(8) not try to negotiate
anything larger than that.
MFC after: 1 month
Sponsored by: The FreeBSD Foundation
ISR that are normally clear. RST is one, though in some overflow cases
it can be set. RDC is only set when a remote DMA is finished from the
memory mapped memory to the transmit rings, which we poll fore in the
code with ED_LOCK around the operation that would set it.
KVM clock shares the same data structures between the guest and the host
as Xen so it makes sense to just have a single copy of this code.
Differential Revision: https://reviews.freebsd.org/D1429
Reviewed by: royger (eariler version)
MFC after: 1 month
we also know that it "can't fail" given the single-threaded nature of
device enumeration. Go ahead and check it just in case, but add a
comment.
CID: 1009393
Sponsored by: Netflix, Inc
Fixed upstream in Linux commit 7ff0ebcc1e30e3216c8c62ee71f59ac830b10364
Differential Revision: https://reviews.freebsd.org/D1762
Reviewed by: hselasky, kib
Sponsored by: The FreeBSD Foundation
allocations if only one element should be allocated per page
cache. Make one allocation per element compile time configurable. Fix
a comment while at it.
Suggested by: ian @
MFC after: 1 week
that we should use a normal-TRB if there are more TRBs extending the
data-stage TRB. Add a dedicated state bit to the internal USB transfer
flags to handle this case.
Reported by: Kohji Okuno <okuno.kohji@jp.panasonic.com>
MFC after: 1 week
In 10.1-RELEASE the default number of MSI vectors used was changed from one
to as many vectors as the HW supports.
This change resulted in an ahci timeouts regression when running on AMD
SB7x0/SB8x0/SB9x0 hardware, so its now limited to 1 MSI by default using
this new quirk.
MFC after: 2 weeks
Sponsored by: Multiplay
controller.
The gpiobus is responsible to keep track of the used pins and serialize
the access to pins.
Some of these features are important to devices that do not descend
directly from gpiobus and as such cannot make use of its features (one
classic example is gpioc that is attached to the GPIO controller and could
not, until now, make use of the gpiobus locking).
this codepath.)
(1<<30) is documented as BLM_PCH_OVERRIDE_ENABLE, which the current
i915 driver in Linux only sets for broadwell chips.
This fixes the backlight control on the Lenovo X230.
Approved by: kib
Obtained from: Linux 7aa1e7f06d6ea1bce3b27630d50769d13da28b1a
Add separate software Tx queue limit for non-TCP traffic to make total
limit higher and avoid local drops of TCP packets because of no
backpressure.
There is no point to make non-TCP limit high since without backpressure
UDP stream easily overflows any sensible limit.
Split early drops statistics since it is better to have separate counter
for each drop reason to make it unabmiguous.
Add software Tx queue high watermark. The information is very useful to
understand how big queues grow under traffic load.
Sponsored by: Solarflare Communications, Inc.
Approved by: gnn (mentor)
Most likely is was just memory leak on the error handling path since
typically efsys_mem_t is filled in by zeros on allocation.
Sponsored by: Solarflare Communications, Inc.
Approved by: gnn (mentor)
sfxge_dma_alloc() calls bus_dmamem_alloc() with BUS_DMA_ZERO flag, so
allocated memory is already filled in by zeros
Sponsored by: Solarflare Communications, Inc.
Approved by: gnn (mentor)
Remove the first member alignment to cacheline since it is nop.
Use __aligned() for the whole structure to make sure that the structure
size is cacheline aligned.
Remove lock alignment to make the structure smaller and fit all members
used on event queue processing into one cacheline (128 bytes) on x86-64.
The lock is obtained as well from different context when event queue
statistics are retrived from sysctl context, but it is infrequent.
Reorder members to avoid padding and go in usage order on event
processing.
As the result all structure members used on event queue processing fit
into exactly one cacheline (128 byte) now.
Sponsored by: Solarflare Communications, Inc.
Approved by: gnn (mentor)
In fact the pointer is used only if more than one TXQ is processed in
one interrupt.
It is used (read-write) on completion path only.
Also it makes the first part of the structure smaller and it fits now
into one 128byte cache line. So, TXQ structure becomes 128 bytes smaller.
Sponsored by: Solarflare Communications, Inc.
Approved by: gnn (mentor)
doesn't get truncated to 32 bits.
Without this, 3x3 NICs transmitting at an MCS rate whose rix (rate
index) in the rate table is > 31 end up returning errors, as the
sample rate code doesn't think the rate is set in the rate table.
Tested:
* AR9380, STA, speaking 3x3 to an AP
