Commit Graph

397 Commits

Author SHA1 Message Date
Warner Losh
715f0e291b Get rid of redundant .kernel in these names. 2009-11-24 14:57:50 +00:00
Warner Losh
96a25a70ad Move the hard-wiring of the dcache on octeon outside of the if
statement.  When no caches support was added, it looks like
TARGET_OCTEON was bogusly moved inside the if.  Also, include
opt_cputype.h to make TARGET_OCTEON actually active.

# now we die in pmap init somewhere...  Most likely because 32MB of RAM is
# too tight given the load address we're using.
2009-11-24 08:35:11 +00:00
Warner Losh
29a21af372 TARGET_OCTEON reqiures opt_cputype.h. 2009-11-24 08:21:48 +00:00
Warner Losh
4a2199914f remove bogus panic.
Don't use fortran style line control.
2009-11-24 08:21:23 +00:00
Warner Losh
d2aaaeac19 Rewrite to try to be more sane:
o Introduce a uart bus space so that we don't have to hack dev/uart to do 8
  byte reads.  This also handles the shift properly, so reset the shift we
  want dev/uart doing to 0.  In effect, this bus space makes the octeon
  registers have an interface to dev/uart that looks just like the old ISA
  bus, but does the necessary 64-bit read/write to the bus.  We only support
  read/write operations.  We do all the widths, but likely could get away
  with only 64-bit and 8-bit given the restricted nature of use of this bus.
o use bus_space_map to set the .bsh rather than a direct assignment.
o Minor cleanup of uart_cpu_getdev to make it conform more to the other
  implementations.
o Add some coments for future work.

# with these changes, we now make it through cninit, but there's still some
# problem that's preventing output, as well as another problem that causes
# us to call panic just after we return from cninit() in platform_start.
2009-11-24 07:50:19 +00:00
Warner Losh
dda960c862 Add size of octeon uart registers to map. 2009-11-24 07:41:15 +00:00
Warner Losh
c37c85b0e4 Prefer ANSI spellings of uintXX_t, etc. 2009-11-24 07:40:38 +00:00
Warner Losh
bdc7523ccf Specify loader script and load address 2009-11-23 07:49:50 +00:00
Warner Losh
714697cd3d Another kludge for 64-bit bus_addr_t with 32-bit pointers... 2009-11-20 16:32:26 +00:00
Warner Losh
10153d080c Horrible kludge to make octeon32 work. I think a better way is to
move the generic code into the config files....
2009-11-20 16:30:35 +00:00
Warner Losh
1e80c0e4aa cast vaddr to uintptr_t before casting it to a bus_space_handle_t.
# I'm sure this indicates a problem, but I'm not sure what...
2009-11-20 16:27:50 +00:00
Warner Losh
e7a9535945 32-bit mixed-mode OCTEON kernel config file. 2009-11-20 16:23:04 +00:00
Warner Losh
6962307a9a If we're ompiling ISA_MIPS32, then use the 32-bit address-size
definitions.
2009-11-20 15:59:41 +00:00
Warner Losh
6ecc37e794 Don't assume register addresses can fit into void *. Minor formatting
simplification while I'm here.
2009-11-20 15:57:45 +00:00
Warner Losh
21ed765c7f Formatting nit. 2009-11-20 15:56:51 +00:00
Oleksandr Tymoshenko
2839b59a94 - Add intr counters for APB interrupts 2009-11-18 22:53:05 +00:00
Oleksandr Tymoshenko
51d85c463d - Add cpu_init_interrupts function that is supposed to
prepeare stuff required for spinning out interrupts later
- Add API for managing intrcnt/intrnames arrays
- Some minor style(9) fixes
2009-11-18 22:52:05 +00:00
Neel Natu
b3d4d25037 Make pmap_copy_page() L2-cache friendly by doing the copy through the
cacheable window on physical memory (KSEG0). On the Sibyte processor
going through the uncacheable window (KSEG1) bypasses both L1 and L2
caches so we may end up with stale contents in the L2 cache.

This also makes it consistent with the rest of the function that
uses cacheable mappings to copy pages.

Approved by: imp (mentor)
2009-11-13 09:24:09 +00:00
Oleksandr Tymoshenko
04709b7c07 - Reorganize hints according to if_arge changes: set media
for multiPHY MAC and use mask to specify PHYs.
2009-11-12 21:33:36 +00:00
Oleksandr Tymoshenko
2b8344b8fa - Handle multiphy MAC case: create interface with
fixed-state media with parameters set via hints
    and configure MAC accordingly to these parameters.
    All the underlying PHY magic is done by boot manager
    on startup. At the moment there is no proper way
    to make active and control all PHYs simultaneously
    from one MII bus and there is no way to associate
    incoming/outgoing packet with specific PHY.
2009-11-12 21:27:58 +00:00
Oleksandr Tymoshenko
445ee40baa - include register definitions for respective controllers 2009-11-12 20:48:04 +00:00
Oleksandr Tymoshenko
874108aed9 MFC @199204 2009-11-12 00:36:22 +00:00
Randall Stewart
e7e9513453 My NFS configured version. 2009-11-11 22:37:17 +00:00
Randall Stewart
4ba9b90b06 Ok set in the values in clock 7 as in the
original codes (I had changed one by accident)
Also do the pic_ack/pic_delayed_ack after the interrupt
so we clear it. The clock with these changes starts working.
Its off doing a short/long short/long warning but it
now runs.

My NFS mount now works but has the same problem with
sbin/init (errno 8 ENOEXEC) so it panics with no init.

Either this is a problem with my buildworld.. OR its a
yet undiscovered RMI issue.
2009-11-11 22:36:19 +00:00
Konstantin Belousov
a7b890448c Extract the code that records syscall results in the frame into MD
function cpu_set_syscall_retval().

Suggested by:	marcel
Reviewed by:	marcel, davidxu
PowerPC, ARM, ia64 changes:	marcel
Sparc64 tested and reviewed by:	marius, also sunv reviewed
MIPS tested by:	gonzo
MFC after:	1 month
2009-11-10 11:43:07 +00:00
Oleksandr Tymoshenko
950e46c329 Unbreak booting of FreeBSD/mips by merging r195429 from projects/mips:
- Move dpcpu initialization to mips_proc0_init. It's
    more appropriate place for it. Besides dpcpu_init
    requires pmap module to be initialized and calling it
    int pmap.c hangs the system
2009-11-09 22:01:58 +00:00
Randall Stewart
4e07ba9045 Ok it helps if you add the bootp options too
so that you can get an address ;-)
2009-11-09 19:56:53 +00:00
Randall Stewart
638c9101a0 Try moving to NFS mount of entire root 2009-11-09 19:26:28 +00:00
Randall Stewart
399804b73b Ok we need to have the clock handlers has filters. This
gets us up to a mount request :-)
2009-11-09 19:25:30 +00:00
Randall Stewart
01f43c2740 a little more paran's 2009-11-09 19:22:57 +00:00
Randall Stewart
4c01ca5a19 White space changes. 2009-11-09 16:43:02 +00:00
Randall Stewart
e20f0d885e - Comment out recrusive call to setup interrupt.
- Change the way we pass the irq.
2009-11-09 16:42:08 +00:00
Oleksandr Tymoshenko
619ddb52b5 - Add arge1 to hints files, only one port is supported so far 2009-11-08 07:31:42 +00:00
Oleksandr Tymoshenko
bec244c750 - Access to all 5 PHYs goes through registers in MAC0 memory
space, rewrite miibus accessors respectively
2009-11-08 07:26:02 +00:00
Oleksandr Tymoshenko
40a554d7ac - Fix: Wrong register is used for initial value reading 2009-11-06 21:53:38 +00:00
Randall Stewart
eac3c4cd27 Ok With this commit we actually get through
the mi_startup (or to the last of it).. and
hit a panic after :

uart0: <16550 or compatible> on iodi0
Trap cause = 2 (TLB miss....)

I did have to take the pci bus OUT of the
build to get this far, hit a cache error with
the PCI code in. Interesting thing is the machine
reboots too ;-)
2009-11-06 12:52:51 +00:00
Oleksandr Tymoshenko
6450bdc708 - Fix initialization of PLL registers (different shifts for
arge0/arge1)
- Use base MAC address to generate MACs for arge1 and above
2009-11-06 06:50:45 +00:00
Randall Stewart
798abe2fe1 For XLR adds extern for its bus space routines 2009-11-05 18:15:47 +00:00
Randall Stewart
a856badbb2 white space changes 2009-11-05 18:15:16 +00:00
Randall Stewart
7a7f91f61b ok we now get so that the uart init's and we can print. We
cannot set baud rate as they did in 6.4, this hoses things and
we loose our 38400 default term.

We now lock somewhere in tcinit.
2009-11-05 18:14:25 +00:00
Oleksandr Tymoshenko
d6994d3b0e - Replace dumb cut'n'paste call with not to self (XXX) 2009-11-05 03:54:03 +00:00
Oleksandr Tymoshenko
896ef84ff0 - style(9): replace whitespaces with tabs 2009-11-04 23:34:58 +00:00
Oleksandr Tymoshenko
a0d684a583 - Remove noisy "Implement me" stubs
- Handle SIOCSIFFLAGS ioctl
2009-11-04 23:33:36 +00:00
Oleksandr Tymoshenko
3682174ee5 - Handle errors when adding children to nexus. This sittuation
might occure when there is dublicate of child's entry in hints
2009-11-03 06:42:55 +00:00
Randall Stewart
45ab86915b adds XLR config 2009-11-02 15:43:54 +00:00
Randall Stewart
037a5859a0 Fix spacing 2009-11-02 15:08:59 +00:00
Randall Stewart
8fae280afb With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
 making it run ;-)
2009-10-30 08:53:11 +00:00
Oleksandr Tymoshenko
12dfccb876 - Fix build with DEVICE_POLLING enabled 2009-10-30 01:40:32 +00:00
Warner Losh
87d11f28e2 Add some newer MIPS CO cores. 2009-10-30 00:37:50 +00:00
Warner Losh
485619feed db_expr_t is really closer to a register_t.
Submitted by:	bde@
2009-10-30 00:37:04 +00:00