Commit Graph

2019 Commits

Author SHA1 Message Date
Luiz Otavio O Souza
8d900240b0 Fix an off-by-one bug in ar71xx_gpio and bcm2835_gpio which makes the last
pin unavailable.

Reported and tested by:	sbruno (ar71xx)
Approved by:	adrian (mentor)
Pointy hat to:	loos
2013-09-06 23:39:56 +00:00
Gleb Smirnoff
2ee9b44cae Fix build with gcc. Move sf_buf_alloc()/sf_buf_free() declarations
to MD headers.
2013-09-06 17:44:13 +00:00
Rui Paulo
dd639923b9 Revert accidental commit. 2013-09-02 17:07:46 +00:00
Rui Paulo
530031a8f1 Initial support for the Digi ConnectCore(c) i.MX53 / Wi-i.MX53 boards.
There are many drivers missing, but we can reach single user mode now.

Hardware graciously donated by Douglas Beattie.
2013-09-01 20:15:35 +00:00
David Chisnall
e1c0c6422a Unconditionally compile the __sync_* atomics support functions into compiler-rt
for ARM.
This is quite ugly, because it has to work around a clang bug that does not
allow built-in functions to be defined, even when they're ones that are
expected to be built as part of a library.

Reviewed by:	ed
2013-08-31 08:50:45 +00:00
Rui Paulo
c2b340cb73 Fix a typo in a comment. 2013-08-31 07:08:21 +00:00
Alan Cox
51321f7c31 Significantly reduce the cost, i.e., run time, of calls to madvise(...,
MADV_DONTNEED) and madvise(..., MADV_FREE).  Specifically, introduce a new
pmap function, pmap_advise(), that operates on a range of virtual addresses
within the specified pmap, allowing for a more efficient implementation of
MADV_DONTNEED and MADV_FREE.  Previously, the implementation of
MADV_DONTNEED and MADV_FREE relied on per-page pmap operations, such as
pmap_clear_reference().  Intuitively, the problem with this implementation
is that the pmap-level locks are acquired and released and the page table
traversed repeatedly, once for each resident page in the range
that was specified to madvise(2).  A more subtle flaw with the previous
implementation is that pmap_clear_reference() would clear the reference bit
on all mappings to the specified page, not just the mapping in the range
specified to madvise(2).

Since our malloc(3) makes heavy use of madvise(2), this change can have a
measureable impact.  For example, the system time for completing a parallel
"buildworld" on a 6-core amd64 machine was reduced by about 1.5% to 2.0%.

Note: This change only contains pmap_advise() implementations for a subset
of our supported architectures.  I will commit implementations for the
remaining architectures after further testing.  For now, a stub function is
sufficient because of the advisory nature of pmap_advise().

Discussed with: jeff, jhb, kib
Tested by:      pho (i386), marcel (ia64)
Sponsored by:   EMC / Isilon Storage Division
2013-08-29 15:49:05 +00:00
Rafal Jaworowski
b949475db0 Introduce superpages support for ARMv6/v7.
Promoting base pages to superpages can increase TLB coverage and allow for
efficient use of page table entries.  This development provides FreeBSD/ARM
with superpages management mechanism roughly equivalent to what we have for
i386 and amd64 architectures.

1. Add mechanism for automatic promotion of 4KB page mappings to 1MB section
   mappings (and demotion when not needed, respectively).

2. Managed and non-kernel mappings are now superpages-aware.

3. The functionality can be enabled by setting "vm.pmap.sp_enabled" tunable to
   a non-zero value (either in loader.conf or by modifying "sp_enabled"
   variable in pmap-v6.c file).  By default, automatic promotion is currently
   disabled.

Submitted by:	Zbigniew Bodek <zbb@semihalf.com>
Reviewed by:	alc
Sponsored by:	The FreeBSD Foundation, Semihalf
2013-08-26 17:12:30 +00:00
Rafal Jaworowski
995c2b63f7 Provide settings for superpage reservation system on ARM.
This allows for enabling and configuring superpages reservation mechanism in
order to allocate and populate 256 4KB base pages (for the purpose of
promotion to a 1MB superpage).

Submitted by:	Zbigniew Bodek <zbb@semihalf.com>
Reviewed by:	alc
Sponsored by:	The FreeBSD Foundation, Semihalf
2013-08-26 16:23:54 +00:00
Rafal Jaworowski
026bf0a293 Add missing TAILQ initializer (omitted in r250634).
Submitted by:	Zbigniew Bodek <zbb@semihalf.com>
Reviewed by:	alc
Sponsored by:	The FreeBSD Foundation, Semihalf
2013-08-26 15:38:27 +00:00
Andrew Turner
30ea211052 Update the root device to be correct for use with crochet. 2013-08-26 10:27:15 +00:00
Andrew Turner
74dcb850cc Revert r251370 as it contains a deadlock. 2013-08-26 10:24:59 +00:00
Andrew Turner
85e8977a2c Add the frame information to cpu_switch to allow us to unwind out of it,
for example when dumping threads in the kernel debugger.
2013-08-25 11:23:38 +00:00
Andrew Turner
da154710c4 Add the unwind information to irq_entry so we can pass through it when
unwinding the stack.
2013-08-25 11:21:03 +00:00
Konstantin Belousov
e68c64f0ba Revert r254501. Instead, reuse the type stability of the struct pmap
which is the part of struct vmspace, allocated from UMA_ZONE_NOFREE
zone.  Initialize the pmap lock in the vmspace zone init function, and
remove pmap lock initialization and destruction from pmap_pinit() and
pmap_release().

Suggested and reviewed by:	alc (previous version)
Tested by:	pho
Sponsored by:	The FreeBSD Foundation
2013-08-22 18:12:24 +00:00
Ian Lepore
aef60d8c4a Add support for uarts other than the serial console in TI OMAP SoCs.
The TI uart hardware is ns16550-compatible, except that before it can
be used the clocks and power have to be enabled and a non-standard
mode control register has to be set to put the device in uart mode
(as opposed to irDa or other serial protocols).  This adds the extra
code in an extension to the standard ns8250 probe routine, and the
rest of the driver is just the standard ns8250 code.
2013-08-21 14:33:02 +00:00
Ian Lepore
14548b7c32 Make the noop clock successfully do nothing, because doing nothing and
returning an error status (which the NULL method pointers caused) isn't
nearly as useful.
2013-08-21 04:49:58 +00:00
Ian Lepore
4169ecbb8f Define the uart clocks so that they can be en/disabled at runtime. 2013-08-21 04:20:17 +00:00
Andrew Turner
9de51f489e Enable VFP on ARMADA XP. 2013-08-20 20:40:20 +00:00
Ian Lepore
59769a581f Make the standard sdhci(4) driver work for the TI OMAP family SoCs.
The MMCHS hardware is pretty much a standard SDHCI v2.0 controller with a
couple quirks, which are now supported by sdhci(4) as of r254507.

This should work for all TI SoCs that use the MMCHS hardware, but it has
only been tested on AM335x right now, so this enables it on those platforms
but leaves the existing ti_mmchs driver in place for other OMAP variants
until they can be tested.

This initial incarnation lacks DMA support (coming soon).  Even without it
this improves performance pretty noticibly over the ti_mmchs driver,
primarily because it now does multiblock IO.
2013-08-20 12:33:35 +00:00
Andrew Turner
618486449c Enable VFP on the Zedboard. 2013-08-19 22:25:36 +00:00
Rafal Jaworowski
836f82ff43 Do not use pv_kva on ARMv6/v7 and save some space on each vm_page. It's only
relevant for older ARM variants (with virtual cache).

Submitted by:	Zbigniew Bodek <zbb@semihalf.com>
Reviewed by:	gber
Sponsored by:	The FreeBSD Foundation, Semihalf
2013-08-19 16:16:49 +00:00
Rafal Jaworowski
ec34d19b9d Simplify and clean up pmap_clearbit()
There is no need for calling vm_page_dirty() when clearing "modified" flag as
it is already set for that page in pmap_fault_fixup() or pmap_enter() thanks
to "modified" bit emulation.

Also, there is no need for checking PTE "referenced" or "writeable" flags.  If
there is a request to clear a particular flag we should just do it.

Submitted by:	Zbigniew Bodek <zbb@semihalf.com>
Reviewed by:	gber
Sponsored by:	The FreeBSD Foundation, Semihalf
2013-08-19 15:58:39 +00:00
Rafal Jaworowski
c438c6eb70 Fix ARMv6/v7 mapping's wired status.
Last input argument in pmap_modify_pv() should be a mask of flags to be set.
In pmap_change_wiring() however, the straight wired status was used, which
does not represent valid flags (and is of type boolean).

This commit fixes the issue so that wired flag is passed to pmap_modify_pv()
properly.

Submitted by:	Zbigniew Bodek <zbb@semihalf.com>
Reviewed by:	gber
Sponsored by:	The FreeBSD Foundation, Semihalf
2013-08-19 15:36:23 +00:00
Rafal Jaworowski
30f7f10e66 Clear all L2 PTE protection bits before their configuration.
Revise L2_S_PROT_MASK to include all of the protection bits.  Notice that
clearing these bits does not always take away the corresponding permissions
(for example, permission is granted when the bit is cleared). The bits are
cleared but are to be set or left cleared accordingly in pmap_set_prot(),
pmap_enter_locked(), etc.

Clear L2_XN along with L2_S_PROT_MASK in pmap_set_prot() so that all
permissions related bits are cleared before actual configuration.

Submitted by:	Zbigniew Bodek <zbb@semihalf.com>
Reviewed by:	gber
Sponsored by:	The FreeBSD Foundation, Semihalf
2013-08-19 15:12:36 +00:00
Rafal Jaworowski
06b6590c4a Simplify pv_entry removal or ARMv6/v7:
- PGA_WRITEABLE indicates that there *might be* a writable mapping for the
  particular page, so to avoid frequent sweeping of the pv_entries whenever
  pmap_nuke_pv(), pmap_modify_pv(), etc. is called, it is sufficient to
  clear that flag if there are no managed mappings for that page anymore
  (notice that only pmap_enter is authorized to set this flag).
- Avoid redundant checking for PVF_WIRED flag when this flag cannot be set
  anyway.
- Clear PGA_WRITEABLE only once for each vm_page instead of multiple,
  redundant clearing it in loop when there are no writeable mappings
  to that page anymore.

Submitted by:	Zbigniew Bodek <zbb@semihalf.com>
Reviewed by:	gber
Sponsored by:	The FreeBSD Foundation, Semihalf
2013-08-19 14:56:17 +00:00
Andrew Turner
55d4588b45 Enable VFP on the Arndale Board. 2013-08-19 08:28:35 +00:00
Olivier Houchard
7f144242fc Increase the max KVA available for general consumption on the Exynos 5.
Submitted by:	Ruslan Bukin <br@bsdpad.com>
2013-08-18 18:08:12 +00:00
Andrew Turner
465f478c8b Enable VFP in the Versatile PB (QEMU) kernel. Tested on QEMU 1.6.0. 2013-08-18 17:18:52 +00:00
Andrew Turner
a61bd6da09 Enable VFP on the CubieBoard and CubieBoard 2. 2013-08-18 16:16:36 +00:00
Andrew Turner
56b8c3f674 Enable VFP support on EFIKA MX. 2013-08-18 11:54:20 +00:00
Ian Lepore
2a21affc5e Enable VFP support for BeagleBone. 2013-08-17 19:29:51 +00:00
Andrew Turner
c5de72378c Rename device vfp to option VFP and retire the ARM_VFP_SUPPORT option. This
simplifies enabling as previously both options were required to be enabled,
now we only need a single option.

While here enable VFP on the PandaBoard.
2013-08-17 18:51:38 +00:00
Andrew Turner
becc01ef96 Remove the ARMFPE option. It is unsupported, and appears to be broken as
arm_fpe_core_changecontext is not a function.
2013-08-17 15:09:14 +00:00
Andrew Turner
65b412607b Remove fpe_sp_state as we don't support fpe. 2013-08-17 14:53:53 +00:00
Andrew Turner
c6af85cce2 Remove unused FPE code. This is not enabled anywhere as it is the only
file I can find containing FAST_FPE. It appears this would not work as
want_resched is not defined anywhere.
2013-08-17 14:52:19 +00:00
Ian Lepore
9908a5a5e1 Rename imx_machdep.c to imx51_machdep.c, because it contains hardware
addresses which are specific to the imx51 chips.
2013-08-13 21:12:28 +00:00
Ian Lepore
e0511b6c67 Add imx6 compatibility and make the driver work for any clock frequency.
There are still a couple references to imx51 ccm driver functions that will
need to be changed after an imx6 ccm driver is written.

Reviewed by:	ray
2013-08-13 13:14:13 +00:00
Olivier Houchard
ae8ab0e2c4 Only allocate 2 bounce pages for maps that can only use them for buffers that
are unaligned on cache lines boundary, as we will never need more.
2013-08-11 21:21:02 +00:00
Olivier Houchard
477f81c83e Use the correct address when calling kva_free()
Pointy hat to:	cognet
Spotted out by:	alc
2013-08-10 00:53:22 +00:00
Olivier Houchard
e32c2d4742 - The address lies in the bus space handle, not in the cookie
- Use the right address when calling kva_free()
(Is there any reason why the s3c2xx0 comes with its own version of bs_map/
 bs_unmap ? It seems to be just the same as in bus_space_generic.c)
2013-08-10 00:31:49 +00:00
Olivier Houchard
e137643ef3 Instead of just trying to do it for arm, make sure vm_kmem_size is properly
aligned in kmeminit(), where it'll work for any arch.

Suggested by:	alc
2013-08-09 22:30:54 +00:00
Olivier Houchard
bdd1acb296 - The address lies in the bus space handle, not in the cookie
- Use the right address when calling kva_free()
2013-08-09 21:56:28 +00:00
Olivier Houchard
c76853ec15 Make sure vm_kmem_size is aligned on a page boundary, since that's what vmem
expects.
2013-08-09 21:53:02 +00:00
Attilio Rao
c7aebda8a1 The soft and hard busy mechanism rely on the vm object lock to work.
Unify the 2 concept into a real, minimal, sxlock where the shared
acquisition represent the soft busy and the exclusive acquisition
represent the hard busy.
The old VPO_WANTED mechanism becames the hard-path for this new lock
and it becomes per-page rather than per-object.
The vm_object lock becames an interlock for this functionality:
it can be held in both read or write mode.
However, if the vm_object lock is held in read mode while acquiring
or releasing the busy state, the thread owner cannot make any
assumption on the busy state unless it is also busying it.

Also:
- Add a new flag to directly shared busy pages while vm_page_alloc
  and vm_page_grab are being executed.  This will be very helpful
  once these functions happen under a read object lock.
- Move the swapping sleep into its own per-object flag

The KPI is heavilly changed this is why the version is bumped.
It is very likely that some VM ports users will need to change
their own code.

Sponsored by:	EMC / Isilon storage division
Discussed with:	alc
Reviewed by:	jeff, kib
Tested by:	gavin, bapt (older version)
Tested by:	pho, scottl
2013-08-09 11:11:11 +00:00
Olivier Houchard
d03426e619 Don't bother trying to work around buffers which are not aligned on a cache
line boundary. It has never been 100% correct, and it can't work on SMP,
because nothing prevents another core from accessing data from an unrelated
buffer in the same cache line while we invalidated it. Just use bounce pages
instead.

Reviewed by:	ian
Approved by:	mux (mentor) (implicit)
2013-08-07 15:44:58 +00:00
Ganbold Tsagaankhuu
696ec285aa Bring initial support for Allwinner A20 SoC (Cubieboard2).
Add support for A20 timer.
	Correct interrupt offset depending from chip.
	Add basic code for CPU configuration module.
	For now, add kernel config and dts file
	(only FDT blob related problem needs to be solved later in
	order to have one kernel for both cubieboard1 and 2).

Approved by: ray@
2013-08-07 11:07:56 +00:00
Jeff Roberson
5df87b21d3 Replace kernel virtual address space allocation with vmem. This provides
transparent layering and better fragmentation.

 - Normalize functions that allocate memory to use kmem_*
 - Those that allocate address space are named kva_*
 - Those that operate on maps are named kmap_*
 - Implement recursive allocation handling for kmem_arena in vmem.

Reviewed by:	alc
Tested by:	pho
Sponsored by:	EMC / Isilon Storage Division
2013-08-07 06:21:20 +00:00
Andrew Turner
6d65b3be10 We no longer need to align the stack before calling swi_handler as it is
already aligned correctly in the PUSHFRAME macro.
2013-08-06 10:03:44 +00:00
Olivier Houchard
7497e6267c Let the platform calculate the timer frequency at runtime, and use that for
the omap4, instead of relying on the (wrong) value provided in the dts.
2013-08-05 20:14:56 +00:00